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net: mvpp2: introduce queue_vector concept
In preparation to the introduction of TX interrupts and improved RX queue distribution, this commit introduces the concept of "queue vector". A queue vector represents a number of RX and/or TX queues, and an associated NAPI instance and interrupt. This commit currently only creates a single queue_vector, so there are no changes in behavior, but it paves the way for additional queue_vector in the next commits. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Thomas Petazzoni
David S. Miller
parent
df089aa0ac
commit
591f4cfab3
@ -686,6 +686,7 @@ enum mvpp2_prs_l3_cast {
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#define MVPP22_ADDR_SPACE_SZ SZ_64K
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#define MVPP2_MAX_THREADS 8
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#define MVPP2_MAX_QVECS MVPP2_MAX_THREADS
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enum mvpp2_bm_type {
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MVPP2_BM_FREE,
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@ -753,6 +754,18 @@ struct mvpp2_port_pcpu {
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struct tasklet_struct tx_done_tasklet;
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};
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struct mvpp2_queue_vector {
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int irq;
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struct napi_struct napi;
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enum { MVPP2_QUEUE_VECTOR_SHARED, MVPP2_QUEUE_VECTOR_PRIVATE } type;
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int sw_thread_id;
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u16 sw_thread_mask;
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int first_rxq;
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int nrxqs;
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u32 pending_cause_rx;
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struct mvpp2_port *port;
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};
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struct mvpp2_port {
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u8 id;
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@ -761,8 +774,6 @@ struct mvpp2_port {
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*/
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int gop_id;
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int irq;
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struct mvpp2 *priv;
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/* Per-port registers' base address */
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@ -776,9 +787,6 @@ struct mvpp2_port {
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int pkt_size;
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u32 pending_cause_rx;
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struct napi_struct napi;
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/* Per-CPU port control */
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struct mvpp2_port_pcpu __percpu *pcpu;
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@ -800,6 +808,9 @@ struct mvpp2_port {
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/* Index of first port's physical RXQ */
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u8 first_rxq;
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struct mvpp2_queue_vector qvecs[MVPP2_MAX_QVECS];
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unsigned int nqvecs;
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};
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/* The mvpp2_tx_desc and mvpp2_rx_desc structures describe the
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@ -4121,22 +4132,40 @@ static int mvpp2_bm_update_mtu(struct net_device *dev, int mtu)
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static inline void mvpp2_interrupts_enable(struct mvpp2_port *port)
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{
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int cpu, cpu_mask = 0;
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int i, sw_thread_mask = 0;
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for (i = 0; i < port->nqvecs; i++)
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sw_thread_mask |= port->qvecs[i].sw_thread_mask;
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for_each_present_cpu(cpu)
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cpu_mask |= 1 << cpu;
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mvpp2_write(port->priv, MVPP2_ISR_ENABLE_REG(port->id),
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MVPP2_ISR_ENABLE_INTERRUPT(cpu_mask));
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MVPP2_ISR_ENABLE_INTERRUPT(sw_thread_mask));
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}
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static inline void mvpp2_interrupts_disable(struct mvpp2_port *port)
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{
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int cpu, cpu_mask = 0;
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int i, sw_thread_mask = 0;
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for (i = 0; i < port->nqvecs; i++)
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sw_thread_mask |= port->qvecs[i].sw_thread_mask;
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for_each_present_cpu(cpu)
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cpu_mask |= 1 << cpu;
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mvpp2_write(port->priv, MVPP2_ISR_ENABLE_REG(port->id),
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MVPP2_ISR_DISABLE_INTERRUPT(cpu_mask));
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MVPP2_ISR_DISABLE_INTERRUPT(sw_thread_mask));
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}
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static inline void mvpp2_qvec_interrupt_enable(struct mvpp2_queue_vector *qvec)
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{
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struct mvpp2_port *port = qvec->port;
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mvpp2_write(port->priv, MVPP2_ISR_ENABLE_REG(port->id),
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MVPP2_ISR_ENABLE_INTERRUPT(qvec->sw_thread_mask));
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}
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static inline void mvpp2_qvec_interrupt_disable(struct mvpp2_queue_vector *qvec)
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{
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struct mvpp2_port *port = qvec->port;
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mvpp2_write(port->priv, MVPP2_ISR_ENABLE_REG(port->id),
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MVPP2_ISR_DISABLE_INTERRUPT(qvec->sw_thread_mask));
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}
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/* Mask the current CPU's Rx/Tx interrupts
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@ -5287,11 +5316,11 @@ err_cleanup:
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/* The callback for per-port interrupt */
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static irqreturn_t mvpp2_isr(int irq, void *dev_id)
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{
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struct mvpp2_port *port = (struct mvpp2_port *)dev_id;
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struct mvpp2_queue_vector *qv = dev_id;
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mvpp2_interrupts_disable(port);
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mvpp2_qvec_interrupt_disable(qv);
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napi_schedule(&port->napi);
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napi_schedule(&qv->napi);
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return IRQ_HANDLED;
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}
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@ -5494,8 +5523,8 @@ static u32 mvpp2_skb_tx_csum(struct mvpp2_port *port, struct sk_buff *skb)
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}
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/* Main rx processing */
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static int mvpp2_rx(struct mvpp2_port *port, int rx_todo,
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struct mvpp2_rx_queue *rxq)
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static int mvpp2_rx(struct mvpp2_port *port, struct napi_struct *napi,
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int rx_todo, struct mvpp2_rx_queue *rxq)
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{
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struct net_device *dev = port->dev;
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int rx_received;
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@ -5573,7 +5602,7 @@ err_drop_frame:
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skb->protocol = eth_type_trans(skb, dev);
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mvpp2_rx_csum(port, rx_status, skb);
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napi_gro_receive(&port->napi, skb);
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napi_gro_receive(napi, skb);
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}
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if (rcvd_pkts) {
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@ -5782,8 +5811,11 @@ static int mvpp2_poll(struct napi_struct *napi, int budget)
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u32 cause_rx_tx, cause_rx, cause_misc;
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int rx_done = 0;
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struct mvpp2_port *port = netdev_priv(napi->dev);
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struct mvpp2_queue_vector *qv;
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int cpu = smp_processor_id();
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qv = container_of(napi, struct mvpp2_queue_vector, napi);
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/* Rx/Tx cause register
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*
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* Bits 0-15: each bit indicates received packets on the Rx queue
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@ -5812,7 +5844,7 @@ static int mvpp2_poll(struct napi_struct *napi, int budget)
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cause_rx = cause_rx_tx & MVPP2_CAUSE_RXQ_OCCUP_DESC_ALL_MASK;
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/* Process RX packets */
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cause_rx |= port->pending_cause_rx;
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cause_rx |= qv->pending_cause_rx;
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while (cause_rx && budget > 0) {
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int count;
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struct mvpp2_rx_queue *rxq;
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@ -5821,7 +5853,7 @@ static int mvpp2_poll(struct napi_struct *napi, int budget)
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if (!rxq)
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break;
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count = mvpp2_rx(port, budget, rxq);
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count = mvpp2_rx(port, napi, budget, rxq);
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rx_done += count;
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budget -= count;
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if (budget > 0) {
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@ -5837,9 +5869,9 @@ static int mvpp2_poll(struct napi_struct *napi, int budget)
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cause_rx = 0;
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napi_complete_done(napi, rx_done);
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mvpp2_interrupts_enable(port);
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mvpp2_qvec_interrupt_enable(qv);
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}
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port->pending_cause_rx = cause_rx;
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qv->pending_cause_rx = cause_rx;
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return rx_done;
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}
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@ -5847,11 +5879,13 @@ static int mvpp2_poll(struct napi_struct *napi, int budget)
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static void mvpp2_start_dev(struct mvpp2_port *port)
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{
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struct net_device *ndev = port->dev;
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int i;
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mvpp2_gmac_max_rx_size_set(port);
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mvpp2_txp_max_tx_size_set(port);
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napi_enable(&port->napi);
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for (i = 0; i < port->nqvecs; i++)
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napi_enable(&port->qvecs[i].napi);
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/* Enable interrupts on all CPUs */
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mvpp2_interrupts_enable(port);
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@ -5865,6 +5899,7 @@ static void mvpp2_start_dev(struct mvpp2_port *port)
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static void mvpp2_stop_dev(struct mvpp2_port *port)
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{
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struct net_device *ndev = port->dev;
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int i;
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/* Stop new packets from arriving to RXQs */
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mvpp2_ingress_disable(port);
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@ -5874,7 +5909,8 @@ static void mvpp2_stop_dev(struct mvpp2_port *port)
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/* Disable interrupts on all CPUs */
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mvpp2_interrupts_disable(port);
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napi_disable(&port->napi);
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for (i = 0; i < port->nqvecs; i++)
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napi_disable(&port->qvecs[i].napi);
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netif_carrier_off(port->dev);
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netif_tx_stop_all_queues(port->dev);
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@ -5960,6 +5996,40 @@ static void mvpp2_phy_disconnect(struct mvpp2_port *port)
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phy_disconnect(ndev->phydev);
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}
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static int mvpp2_irqs_init(struct mvpp2_port *port)
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{
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int err, i;
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for (i = 0; i < port->nqvecs; i++) {
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struct mvpp2_queue_vector *qv = port->qvecs + i;
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err = request_irq(qv->irq, mvpp2_isr, 0, port->dev->name, qv);
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if (err)
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goto err;
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}
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return 0;
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err:
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for (i = 0; i < port->nqvecs; i++) {
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struct mvpp2_queue_vector *qv = port->qvecs + i;
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free_irq(qv->irq, qv);
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}
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return err;
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}
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static void mvpp2_irqs_deinit(struct mvpp2_port *port)
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{
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int i;
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for (i = 0; i < port->nqvecs; i++) {
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struct mvpp2_queue_vector *qv = port->qvecs + i;
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free_irq(qv->irq, qv);
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}
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}
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static int mvpp2_open(struct net_device *dev)
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{
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struct mvpp2_port *port = netdev_priv(dev);
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@ -6002,9 +6072,9 @@ static int mvpp2_open(struct net_device *dev)
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goto err_cleanup_rxqs;
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}
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err = request_irq(port->irq, mvpp2_isr, 0, dev->name, port);
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err = mvpp2_irqs_init(port);
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if (err) {
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netdev_err(port->dev, "cannot request IRQ %d\n", port->irq);
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netdev_err(port->dev, "cannot init IRQs\n");
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goto err_cleanup_txqs;
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}
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@ -6023,7 +6093,7 @@ static int mvpp2_open(struct net_device *dev)
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return 0;
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err_free_irq:
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free_irq(port->irq, port);
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mvpp2_irqs_deinit(port);
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err_cleanup_txqs:
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mvpp2_cleanup_txqs(port);
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err_cleanup_rxqs:
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@ -6043,7 +6113,7 @@ static int mvpp2_stop(struct net_device *dev)
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/* Mask interrupts on all CPUs */
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on_each_cpu(mvpp2_interrupts_mask, port, 1);
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free_irq(port->irq, port);
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mvpp2_irqs_deinit(port);
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for_each_present_cpu(cpu) {
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port_pcpu = per_cpu_ptr(port->pcpu, cpu);
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@ -6361,6 +6431,66 @@ static const struct ethtool_ops mvpp2_eth_tool_ops = {
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.set_link_ksettings = phy_ethtool_set_link_ksettings,
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};
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static int mvpp2_queue_vectors_init(struct mvpp2_port *port,
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struct device_node *port_node)
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{
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struct mvpp2_queue_vector *v = &port->qvecs[0];
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v->first_rxq = 0;
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v->nrxqs = port->nrxqs;
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v->type = MVPP2_QUEUE_VECTOR_SHARED;
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v->sw_thread_id = 0;
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v->sw_thread_mask = *cpumask_bits(cpu_online_mask);
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v->port = port;
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v->irq = irq_of_parse_and_map(port_node, 0);
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if (v->irq <= 0)
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return -EINVAL;
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netif_napi_add(port->dev, &v->napi, mvpp2_poll,
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NAPI_POLL_WEIGHT);
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port->nqvecs = 1;
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return 0;
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}
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static void mvpp2_queue_vectors_deinit(struct mvpp2_port *port)
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{
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int i;
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for (i = 0; i < port->nqvecs; i++)
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irq_dispose_mapping(port->qvecs[i].irq);
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}
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/* Configure Rx queue group interrupt for this port */
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static void mvpp2_rx_irqs_setup(struct mvpp2_port *port)
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{
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struct mvpp2 *priv = port->priv;
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u32 val;
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int i;
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if (priv->hw_version == MVPP21) {
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mvpp2_write(priv, MVPP21_ISR_RXQ_GROUP_REG(port->id),
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port->nrxqs);
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return;
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}
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/* Handle the more complicated PPv2.2 case */
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for (i = 0; i < port->nqvecs; i++) {
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struct mvpp2_queue_vector *qv = port->qvecs + i;
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if (!qv->nrxqs)
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continue;
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val = qv->sw_thread_id;
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val |= port->id << MVPP22_ISR_RXQ_GROUP_INDEX_GROUP_OFFSET;
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mvpp2_write(priv, MVPP22_ISR_RXQ_GROUP_INDEX_REG, val);
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val = qv->first_rxq;
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val |= qv->nrxqs << MVPP22_ISR_RXQ_SUB_GROUP_SIZE_OFFSET;
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mvpp2_write(priv, MVPP22_ISR_RXQ_SUB_GROUP_CONFIG_REG, val);
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}
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}
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/* Initialize port HW */
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static int mvpp2_port_init(struct mvpp2_port *port)
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{
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@ -6442,19 +6572,7 @@ static int mvpp2_port_init(struct mvpp2_port *port)
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port->rxqs[queue] = rxq;
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}
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/* Configure Rx queue group interrupt for this port */
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if (priv->hw_version == MVPP21) {
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mvpp2_write(priv, MVPP21_ISR_RXQ_GROUP_REG(port->id),
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port->nrxqs);
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} else {
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u32 val;
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val = (port->id << MVPP22_ISR_RXQ_GROUP_INDEX_GROUP_OFFSET);
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mvpp2_write(priv, MVPP22_ISR_RXQ_GROUP_INDEX_REG, val);
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val = (port->nrxqs << MVPP22_ISR_RXQ_SUB_GROUP_SIZE_OFFSET);
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mvpp2_write(priv, MVPP22_ISR_RXQ_SUB_GROUP_CONFIG_REG, val);
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}
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mvpp2_rx_irqs_setup(port);
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/* Create Rx descriptor rings */
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for (queue = 0; queue < port->nrxqs; queue++) {
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@ -6545,14 +6663,13 @@ static int mvpp2_port_probe(struct platform_device *pdev,
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dev->ethtool_ops = &mvpp2_eth_tool_ops;
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port = netdev_priv(dev);
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port->dev = dev;
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port->ntxqs = ntxqs;
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port->nrxqs = nrxqs;
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port->irq = irq_of_parse_and_map(port_node, 0);
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if (port->irq <= 0) {
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err = -EINVAL;
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err = mvpp2_queue_vectors_init(port, port_node);
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if (err)
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goto err_free_netdev;
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}
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if (of_property_read_bool(port_node, "marvell,loopback"))
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port->flags |= MVPP2_F_LOOPBACK;
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@ -6572,14 +6689,14 @@ static int mvpp2_port_probe(struct platform_device *pdev,
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port->base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(port->base)) {
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err = PTR_ERR(port->base);
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goto err_free_irq;
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goto err_deinit_qvecs;
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}
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} else {
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if (of_property_read_u32(port_node, "gop-port-id",
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&port->gop_id)) {
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err = -EINVAL;
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dev_err(&pdev->dev, "missing gop-port-id value\n");
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goto err_free_irq;
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goto err_deinit_qvecs;
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}
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port->base = priv->iface_base + MVPP22_GMAC_BASE(port->gop_id);
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@ -6589,7 +6706,7 @@ static int mvpp2_port_probe(struct platform_device *pdev,
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port->stats = netdev_alloc_pcpu_stats(struct mvpp2_pcpu_stats);
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if (!port->stats) {
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err = -ENOMEM;
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goto err_free_irq;
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goto err_deinit_qvecs;
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}
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dt_mac_addr = of_get_mac_address(port_node);
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@ -6610,7 +6727,6 @@ static int mvpp2_port_probe(struct platform_device *pdev,
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port->tx_ring_size = MVPP2_MAX_TXD;
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port->rx_ring_size = MVPP2_MAX_RXD;
|
||||
port->dev = dev;
|
||||
SET_NETDEV_DEV(dev, &pdev->dev);
|
||||
|
||||
err = mvpp2_port_init(port);
|
||||
@ -6645,7 +6761,6 @@ static int mvpp2_port_probe(struct platform_device *pdev,
|
||||
(unsigned long)dev);
|
||||
}
|
||||
|
||||
netif_napi_add(dev, &port->napi, mvpp2_poll, NAPI_POLL_WEIGHT);
|
||||
features = NETIF_F_SG | NETIF_F_IP_CSUM;
|
||||
dev->features = features | NETIF_F_RXCSUM;
|
||||
dev->hw_features |= features | NETIF_F_RXCSUM | NETIF_F_GRO;
|
||||
@ -6673,8 +6788,8 @@ err_free_txq_pcpu:
|
||||
free_percpu(port->txqs[i]->pcpu);
|
||||
err_free_stats:
|
||||
free_percpu(port->stats);
|
||||
err_free_irq:
|
||||
irq_dispose_mapping(port->irq);
|
||||
err_deinit_qvecs:
|
||||
mvpp2_queue_vectors_deinit(port);
|
||||
err_free_netdev:
|
||||
of_node_put(phy_node);
|
||||
free_netdev(dev);
|
||||
@ -6692,7 +6807,7 @@ static void mvpp2_port_remove(struct mvpp2_port *port)
|
||||
free_percpu(port->stats);
|
||||
for (i = 0; i < port->ntxqs; i++)
|
||||
free_percpu(port->txqs[i]->pcpu);
|
||||
irq_dispose_mapping(port->irq);
|
||||
mvpp2_queue_vectors_deinit(port);
|
||||
free_netdev(port->dev);
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user