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arm64: dts: renesas: r8a774e1: Add TMU device nodes
This patch adds TMU[01234] device tree nodes to the r8a774e1 SoC specific DT. Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/1594811350-14066-9-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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@ -542,6 +542,71 @@
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resets = <&cpg 407>;
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};
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tmu0: timer@e61e0000 {
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compatible = "renesas,tmu-r8a774e1", "renesas,tmu";
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reg = <0 0xe61e0000 0 0x30>;
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interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 125>;
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clock-names = "fck";
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power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
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resets = <&cpg 125>;
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status = "disabled";
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};
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tmu1: timer@e6fc0000 {
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compatible = "renesas,tmu-r8a774e1", "renesas,tmu";
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reg = <0 0xe6fc0000 0 0x30>;
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interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 124>;
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clock-names = "fck";
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power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
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resets = <&cpg 124>;
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status = "disabled";
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};
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tmu2: timer@e6fd0000 {
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compatible = "renesas,tmu-r8a774e1", "renesas,tmu";
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reg = <0 0xe6fd0000 0 0x30>;
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interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 123>;
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clock-names = "fck";
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power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
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resets = <&cpg 123>;
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status = "disabled";
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};
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tmu3: timer@e6fe0000 {
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compatible = "renesas,tmu-r8a774e1", "renesas,tmu";
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reg = <0 0xe6fe0000 0 0x30>;
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interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 122>;
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clock-names = "fck";
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power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
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resets = <&cpg 122>;
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status = "disabled";
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};
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tmu4: timer@ffc00000 {
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compatible = "renesas,tmu-r8a774e1", "renesas,tmu";
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reg = <0 0xffc00000 0 0x30>;
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interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 121>;
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clock-names = "fck";
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power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
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resets = <&cpg 121>;
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status = "disabled";
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};
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i2c2: i2c@e6510000 {
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reg = <0 0xe6510000 0 0x40>;
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#address-cells = <1>;
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