clk: mediatek: mt8173: Switch to clk_hw provider APIs

As part of the effort to improve the MediaTek clk drivers, the next step
is to switch from the old 'struct clk' clk prodivder APIs to the new
'struct clk_hw' ones.

The MT8173 clk driver has one clk that is registered directly with the
clk provider APIs, instead of going through the MediaTek clk library.

Switch this instance to use the clk_hw provider API.

Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220519071610.423372-6-wenst@chromium.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Chen-Yu Tsai 2022-05-19 15:16:10 +08:00 committed by Stephen Boyd
parent 6f691a5862
commit 5876ee756c

View File

@ -994,7 +994,6 @@ static void __init mtk_apmixedsys_init(struct device_node *node)
struct clk_hw_onecell_data *clk_data;
void __iomem *base;
struct clk_hw *hw;
struct clk *clk;
int r, i;
base = of_iomap(node, 0);
@ -1023,10 +1022,10 @@ static void __init mtk_apmixedsys_init(struct device_node *node)
clk_data->hws[cku->id] = hw;
}
clk = clk_register_divider(NULL, "hdmi_ref", "tvdpll_594m", 0,
base + 0x40, 16, 3, CLK_DIVIDER_POWER_OF_TWO,
NULL);
clk_data->hws[CLK_APMIXED_HDMI_REF] = __clk_get_hw(clk);
hw = clk_hw_register_divider(NULL, "hdmi_ref", "tvdpll_594m", 0,
base + 0x40, 16, 3, CLK_DIVIDER_POWER_OF_TWO,
NULL);
clk_data->hws[CLK_APMIXED_HDMI_REF] = hw;
r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data);
if (r)