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drm/radeon: update radeon_atom_is_voltage_gpio() for SI
SI uses a new atom table. Required for DPM on SI. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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eaa778aff0
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58653abdd2
@ -2529,13 +2529,13 @@ int btc_dpm_init(struct radeon_device *rdev)
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eg_pi->smu_uvd_hs = true;
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pi->voltage_control =
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radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC);
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radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC, 0);
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pi->mvdd_control =
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radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_MVDDC);
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radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_MVDDC, 0);
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eg_pi->vddci_control =
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radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDCI);
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radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDCI, 0);
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if (atom_parse_data_header(rdev->mode_info.atom_context, index, &size,
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&frev, &crev, &data_offset)) {
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@ -2022,13 +2022,13 @@ int cypress_dpm_init(struct radeon_device *rdev)
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pi->lmp = RV770_LMP_DFLT;
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pi->voltage_control =
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radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC);
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radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC, 0);
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pi->mvdd_control =
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radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_MVDDC);
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radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_MVDDC, 0);
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eg_pi->vddci_control =
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radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDCI);
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radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDCI, 0);
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if (atom_parse_data_header(rdev->mode_info.atom_context, index, &size,
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&frev, &crev, &data_offset)) {
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@ -3977,13 +3977,13 @@ int ni_dpm_init(struct radeon_device *rdev)
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ni_pi->mclk_rtt_mode_threshold = eg_pi->mclk_edc_wr_enable_threshold;
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pi->voltage_control =
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radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC);
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radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC, 0);
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pi->mvdd_control =
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radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_MVDDC);
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radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_MVDDC, 0);
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eg_pi->vddci_control =
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radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDCI);
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radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDCI, 0);
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if (atom_parse_data_header(rdev->mode_info.atom_context, index, &size,
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&frev, &crev, &data_offset)) {
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@ -244,7 +244,8 @@ int radeon_atom_get_max_voltage(struct radeon_device *rdev,
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int radeon_atom_get_voltage_table(struct radeon_device *rdev,
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u8 voltage_type,
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struct atom_voltage_table *voltage_table);
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bool radeon_atom_is_voltage_gpio(struct radeon_device *rdev, u8 voltage_type);
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bool radeon_atom_is_voltage_gpio(struct radeon_device *rdev,
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u8 voltage_type, u8 voltage_mode);
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void radeon_atom_update_memory_dll(struct radeon_device *rdev,
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u32 mem_clock);
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void radeon_atom_set_ac_timing(struct radeon_device *rdev,
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@ -3102,12 +3102,14 @@ int radeon_atom_get_voltage_gpio_settings(struct radeon_device *rdev,
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}
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union voltage_object_info {
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struct _ATOM_VOLTAGE_OBJECT_INFO v1;
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struct _ATOM_VOLTAGE_OBJECT_INFO_V2 v2;
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struct _ATOM_VOLTAGE_OBJECT_INFO v1;
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struct _ATOM_VOLTAGE_OBJECT_INFO_V2 v2;
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struct _ATOM_VOLTAGE_OBJECT_INFO_V3_1 v3;
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};
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bool
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radeon_atom_is_voltage_gpio(struct radeon_device *rdev, u8 voltage_type)
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radeon_atom_is_voltage_gpio(struct radeon_device *rdev,
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u8 voltage_type, u8 voltage_mode)
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{
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int index = GetIndexIntoMasterTable(DATA, VoltageObjectInfo);
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u8 frev, crev;
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@ -3120,27 +3122,54 @@ radeon_atom_is_voltage_gpio(struct radeon_device *rdev, u8 voltage_type)
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voltage_info = (union voltage_object_info *)
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(rdev->mode_info.atom_context->bios + data_offset);
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switch (crev) {
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switch (frev) {
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case 1:
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num_indices = (size - sizeof(ATOM_COMMON_TABLE_HEADER)) /
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sizeof(ATOM_VOLTAGE_OBJECT);
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case 2:
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switch (crev) {
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case 1:
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num_indices = (size - sizeof(ATOM_COMMON_TABLE_HEADER)) /
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sizeof(ATOM_VOLTAGE_OBJECT);
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for (i = 0; i < num_indices; i++) {
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if ((voltage_info->v1.asVoltageObj[i].ucVoltageType == voltage_type) &&
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(voltage_info->v1.asVoltageObj[i].asControl.ucVoltageControlId ==
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VOLTAGE_CONTROLLED_BY_GPIO))
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return true;
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for (i = 0; i < num_indices; i++) {
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if ((voltage_info->v1.asVoltageObj[i].ucVoltageType == voltage_type) &&
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(voltage_info->v1.asVoltageObj[i].asControl.ucVoltageControlId ==
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VOLTAGE_CONTROLLED_BY_GPIO))
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return true;
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}
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break;
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case 2:
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num_indices = (size - sizeof(ATOM_COMMON_TABLE_HEADER)) /
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sizeof(ATOM_VOLTAGE_OBJECT_INFO_V2);
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for (i = 0; i < num_indices; i++) {
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if ((voltage_info->v2.asVoltageObj[i].ucVoltageType == voltage_type) &&
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(voltage_info->v2.asVoltageObj[i].asControl.ucVoltageControlId ==
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VOLTAGE_CONTROLLED_BY_GPIO))
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return true;
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}
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break;
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default:
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DRM_ERROR("unknown voltage object table\n");
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return false;
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}
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break;
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case 2:
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num_indices = (size - sizeof(ATOM_COMMON_TABLE_HEADER)) /
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sizeof(ATOM_VOLTAGE_OBJECT_INFO_V2);
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case 3:
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switch (crev) {
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case 1:
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num_indices = (size - sizeof(ATOM_COMMON_TABLE_HEADER)) /
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sizeof(ATOM_VOLTAGE_OBJECT_INFO_V3_1);
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for (i = 0; i < num_indices; i++) {
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if ((voltage_info->v2.asVoltageObj[i].ucVoltageType == voltage_type) &&
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(voltage_info->v2.asVoltageObj[i].asControl.ucVoltageControlId ==
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VOLTAGE_CONTROLLED_BY_GPIO))
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return true;
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for (i = 0; i < num_indices; i++) {
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if ((voltage_info->v3.asVoltageObj[i].asGpioVoltageObj.sHeader.ucVoltageType ==
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voltage_type) &&
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(voltage_info->v3.asVoltageObj[i].asGpioVoltageObj.sHeader.ucVoltageMode ==
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voltage_mode))
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return true;
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}
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break;
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default:
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DRM_ERROR("unknown voltage object table\n");
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return false;
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}
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break;
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default:
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@ -1933,7 +1933,7 @@ int rv6xx_dpm_init(struct radeon_device *rdev)
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pi->fb_div_scale = 0;
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pi->voltage_control =
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radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC);
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radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC, 0);
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pi->gfx_clock_gating = true;
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@ -2301,10 +2301,10 @@ int rv770_dpm_init(struct radeon_device *rdev)
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pi->lmp = RV770_LMP_DFLT;
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pi->voltage_control =
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radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC);
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radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDC, 0);
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pi->mvdd_control =
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radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_MVDDC);
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radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_MVDDC, 0);
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if (atom_parse_data_header(rdev->mode_info.atom_context, index, &size,
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&frev, &crev, &data_offset)) {
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