Bitmain SoC changes for v5.4:

Most of the basic infrastructure is completed for BM1880 SoC except
 common clock support. We are still couple of patchset away from
 booting a distro from eMMC/SD with mainline. Below are the changes
 for this cycle:
 
 - Added Reset controller support to BM1880 SoC based on reset-simple
   driver.
 - Modified pinctrl memory map for BM1880 SoC. The initial pinctrl support
   included the PWM registers as a part of the pinctrl memory map. But this
   turned out to be useless as PWM registers are not handling any pin muxing
   at all. So removed the PWM registers from pinctrl memory map.
 -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCgAdFiEEZ6VDKoFIy9ikWCeXVZ8R5v6RzvUFAl1FfmoACgkQVZ8R5v6R
 zvXRbwf/ZS8GArYRVLrwLMBA7HpJ4tTTDKKauCsTH/fIdEneTZj6u2gWjKw8cKzt
 hIZqZ0V+djiGuKf4CtXpZKyaOyf8MhPO7r9yrGUFMJVe4XsZijB4s7VVuFyULFHU
 i3+GKPGptHUl7UPLg0+csbBPoY1vyzY/3g8TlKqEmjK6CU6qNIxu6k22AeDnNGmR
 IF0g7/M2ucietDs4OugoVrwSDVtUm2g8voLafRLiKG6/HNTMtMGybv+LFb3yt0qU
 asS2q2WTJMSbahhh5sTd2SRMc9YEPmp+i2xY1hqdM4TOfycH4A8b1Rp7FnSlMWoC
 cpo6RmVIj+L1it5qKICRth2qRy08Tg==
 =8nxl
 -----END PGP SIGNATURE-----

Merge tag 'bitmain-soc-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-bitmain into arm/dt

Bitmain SoC changes for v5.4:

Most of the basic infrastructure is completed for BM1880 SoC except
common clock support. We are still couple of patchset away from
booting a distro from eMMC/SD with mainline. Below are the changes
for this cycle:

- Added Reset controller support to BM1880 SoC based on reset-simple
  driver.
- Modified pinctrl memory map for BM1880 SoC. The initial pinctrl support
  included the PWM registers as a part of the pinctrl memory map. But this
  turned out to be useless as PWM registers are not handling any pin muxing
  at all. So removed the PWM registers from pinctrl memory map.

* tag 'bitmain-soc-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-bitmain:
  arm64: dts: bitmain: Modify pin controller memory map
  arm64: dts: bitmain: Add reset controller support for BM1880 SoC

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2019-09-04 14:45:37 +02:00
commit 58324066aa

View File

@ -5,6 +5,7 @@
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/reset/bitmain,bm1880-reset.h>
/ {
compatible = "bitmain,bm1880";
@ -88,9 +89,15 @@
#size-cells = <1>;
ranges = <0x0 0x0 0x50010000 0x1000>;
pinctrl: pinctrl@50 {
pinctrl: pinctrl@400 {
compatible = "bitmain,bm1880-pinctrl";
reg = <0x50 0x4B0>;
reg = <0x400 0x120>;
};
rst: reset-controller@c00 {
compatible = "bitmain,bm1880-reset";
reg = <0xc00 0x8>;
#reset-cells = <1>;
};
};
@ -154,6 +161,7 @@
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
resets = <&rst BM1880_RST_UART0_1_CLK>;
status = "disabled";
};
@ -163,6 +171,7 @@
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
resets = <&rst BM1880_RST_UART0_1_ACLK>;
status = "disabled";
};
@ -172,6 +181,7 @@
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
resets = <&rst BM1880_RST_UART2_3_CLK>;
status = "disabled";
};
@ -181,6 +191,7 @@
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
resets = <&rst BM1880_RST_UART2_3_ACLK>;
status = "disabled";
};
};