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MIPS: uasm: Add OR instruction.
This is needed for the fix of the M3 workaround. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -84,6 +84,7 @@ Ip_u2s3u1(_lw);
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Ip_u1u2u3(_mfc0);
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Ip_u1u2u3(_mtc0);
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Ip_u2u1u3(_ori);
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Ip_u3u1u2(_or);
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Ip_u2s3u1(_pref);
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Ip_0(_rfe);
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Ip_u2s3u1(_sc);
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@ -64,7 +64,7 @@ enum opcode {
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insn_dmtc0, insn_dsll, insn_dsll32, insn_dsra, insn_dsrl,
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insn_dsrl32, insn_drotr, insn_dsubu, insn_eret, insn_j, insn_jal,
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insn_jr, insn_ld, insn_ll, insn_lld, insn_lui, insn_lw, insn_mfc0,
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insn_mtc0, insn_ori, insn_pref, insn_rfe, insn_sc, insn_scd,
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insn_mtc0, insn_or, insn_ori, insn_pref, insn_rfe, insn_sc, insn_scd,
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insn_sd, insn_sll, insn_sra, insn_srl, insn_rotr, insn_subu, insn_sw,
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insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, insn_xor, insn_xori,
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insn_dins, insn_syscall
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@ -120,6 +120,7 @@ static struct insn insn_table[] __cpuinitdata = {
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{ insn_lw, M(lw_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
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{ insn_mfc0, M(cop0_op, mfc_op, 0, 0, 0, 0), RT | RD | SET},
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{ insn_mtc0, M(cop0_op, mtc_op, 0, 0, 0, 0), RT | RD | SET},
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{ insn_or, M(spec_op, 0, 0, 0, 0, or_op), RS | RT | RD },
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{ insn_ori, M(ori_op, 0, 0, 0, 0, 0), RS | RT | UIMM },
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{ insn_pref, M(pref_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
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{ insn_rfe, M(cop0_op, cop_op, 0, 0, 0, rfe_op), 0 },
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@ -387,6 +388,7 @@ I_u2s3u1(_lw)
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I_u1u2u3(_mfc0)
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I_u1u2u3(_mtc0)
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I_u2u1u3(_ori)
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I_u3u1u2(_or)
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I_u2s3u1(_pref)
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I_0(_rfe)
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I_u2s3u1(_sc)
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