korg/linux
0
0
Fork 0
mirror of https://mirrors.bfsu.edu.cn/git/linux.git synced 2024-12-16 15:34:48 +08:00
Code Issues Packages Projects Releases Wiki Activity

amd64_edac: Rewrite unganged mode code of f10_early_channel_count

Browse Source 
Simplify the procedure by checking if there is any DIMM in each channel.
This patch will fix the bugs such as when there is no DIMMs under
certain node, two DIMMs in the same channel, and only one DIMM in each
channel of the node.

Borislav: minor fixups

Signed-off-by: Wan Wei <wanwei@mail.dawning.com.cn>
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
This commit is contained in:
Wan Wei 2009-08-07 17:04:49 +02:00 committed by Borislav Petkov
parent be3468e8ff
commit 57a30854c8
1 changed files with 10 additions and 35 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

45
drivers/edac/amd64_edac.c
View File

@ -1255,7 +1255,9 @@ static int k8_dbam_map_to_pages(struct amd64_pvt *pvt, int dram_map)
*/ */
static int f10_early_channel_count(struct amd64_pvt *pvt) static int f10_early_channel_count(struct amd64_pvt *pvt)
{ {
int dbams[] = { DBAM0, DBAM1 };
int err = 0, channels = 0; int err = 0, channels = 0;
int i, j;
u32 dbam; u32 dbam;
err = pci_read_config_dword(pvt->dram_f2_ctl, F10_DCLR_0, &pvt->dclr0); err = pci_read_config_dword(pvt->dram_f2_ctl, F10_DCLR_0, &pvt->dclr0);
@ -1288,46 +1290,19 @@ static int f10_early_channel_count(struct amd64_pvt *pvt)
* is more than just one DIMM present in unganged mode. Need to check * is more than just one DIMM present in unganged mode. Need to check
* both controllers since DIMMs can be placed in either one. * both controllers since DIMMs can be placed in either one.
*/ */
channels = 0; for (i = 0; i < ARRAY_SIZE(dbams); i++) {
err = pci_read_config_dword(pvt->dram_f2_ctl, DBAM0, &dbam); err = pci_read_config_dword(pvt->dram_f2_ctl, dbams[i], &dbam);
if (err)
goto err_reg;
if (DBAM_DIMM(0, dbam) > 0)
channels++;
if (DBAM_DIMM(1, dbam) > 0)
channels++;
if (DBAM_DIMM(2, dbam) > 0)
channels++;
if (DBAM_DIMM(3, dbam) > 0)
channels++;
/* If more than 2 DIMMs are present, then we have 2 channels */
if (channels > 2)
channels = 2;
else if (channels == 0) {
/* No DIMMs on DCT0, so look at DCT1 */
err = pci_read_config_dword(pvt->dram_f2_ctl, DBAM1, &dbam);
if (err) if (err)
goto err_reg; goto err_reg;
if (DBAM_DIMM(0, dbam) > 0) for (j = 0; j < 4; j++) {
channels++; if (DBAM_DIMM(j, dbam) > 0) {
if (DBAM_DIMM(1, dbam) > 0) channels++;
channels++; break;
if (DBAM_DIMM(2, dbam) > 0) }
channels++; }
if (DBAM_DIMM(3, dbam) > 0)
channels++;
if (channels > 2)
channels = 2;
} }
/* If we found ALL 0 values, then assume just ONE DIMM-ONE Channel */
if (channels == 0)
channels = 1;
debugf0("MCT channel count: %d\n", channels); debugf0("MCT channel count: %d\n", channels);
return channels; return channels;