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dt-bindings: mfd: Convert stm32 timers bindings to json-schema

Convert the STM32 timers binding to DT schema format using json-schema

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Rob Herring <robh@kernel.org>
This commit is contained in:
Benjamin Gaignard 2019-11-14 11:18:23 +01:00 committed by Rob Herring
parent 93512dad33
commit 56fb34d86e
5 changed files with 162 additions and 167 deletions

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STMicroelectronics STM32 Timer quadrature encoder
STM32 Timer provides quadrature encoder to detect
angular position and direction of rotary elements,
from IN1 and IN2 input signals.
Must be a sub-node of an STM32 Timer device tree node.
See ../mfd/stm32-timers.txt for details about the parent node.
Required properties:
- compatible: Must be "st,stm32-timer-counter".
- pinctrl-names: Set to "default".
- pinctrl-0: List of phandles pointing to pin configuration nodes,
to set CH1/CH2 pins in mode of operation for STM32
Timer input on external pin.
Example:
timers@40010000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40010000 0x400>;
clocks = <&rcc 0 160>;
clock-names = "int";
counter {
compatible = "st,stm32-timer-counter";
pinctrl-names = "default";
pinctrl-0 = <&tim1_in_pins>;
};
};

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STMicroelectronics STM32 Timers IIO timer bindings
Must be a sub-node of an STM32 Timers device tree node.
See ../mfd/stm32-timers.txt for details about the parent node.
Required parameters:
- compatible: Must be one of:
"st,stm32-timer-trigger"
"st,stm32h7-timer-trigger"
- reg: Identify trigger hardware block.
Example:
timers@40010000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40010000 0x400>;
clocks = <&rcc 0 160>;
clock-names = "int";
timer@0 {
compatible = "st,stm32-timer-trigger";
reg = <0>;
};
};

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: STMicroelectronics STM32 Timers bindings
description: |
This hardware block provides 3 types of timer along with PWM functionality:
- advanced-control timers consist of a 16-bit auto-reload counter driven
by a programmable prescaler, break input feature, PWM outputs and
complementary PWM outputs channels.
- general-purpose timers consist of a 16-bit or 32-bit auto-reload counter
driven by a programmable prescaler and PWM outputs.
- basic timers consist of a 16-bit auto-reload counter driven by a
programmable prescaler.
maintainers:
- Benjamin Gaignard <benjamin.gaignard@st.com>
- Fabrice Gasnier <fabrice.gasnier@st.com>
properties:
compatible:
const: st,stm32-timers
reg:
maxItems: 1
clocks:
maxItems: 1
clock-names:
items:
- const: int
reset:
maxItems: 1
dmas:
minItems: 1
maxItems: 7
dma-names:
items:
enum: [ ch1, ch2, ch3, ch4, up, trig, com ]
minItems: 1
maxItems: 7
"#address-cells":
const: 1
"#size-cells":
const: 0
pwm:
type: object
properties:
compatible:
const: st,stm32-pwm
"#pwm-cells":
const: 3
st,breakinput:
description:
One or two <index level filter> to describe break input
configurations.
allOf:
- $ref: /schemas/types.yaml#/definitions/uint32-matrix
- items:
items:
- description: |
"index" indicates on which break input (0 or 1) the
configuration should be applied.
enum: [ 0 , 1]
- description: |
"level" gives the active level (0=low or 1=high) of the
input signal for this configuration
enum: [ 0, 1 ]
- description: |
"filter" gives the filtering value (up to 15) to be applied.
maximum: 15
minItems: 1
maxItems: 2
required:
- "#pwm-cells"
- compatible
patternProperties:
"^timer@[0-9]+$":
type: object
properties:
compatible:
enum:
- st,stm32-timer-trigger
- st,stm32h7-timer-trigger
reg:
description: Identify trigger hardware block.
items:
minimum: 0
maximum: 16
required:
- compatible
- reg
counter:
type: object
properties:
compatible:
const: st,stm32-timer-counter
required:
- compatible
required:
- "#address-cells"
- "#size-cells"
- compatible
- reg
- clocks
- clock-names
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/stm32mp1-clks.h>
timers2: timers@40000000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40000000 0x400>;
clocks = <&rcc TIM2_K>;
clock-names = "int";
dmas = <&dmamux1 18 0x400 0x1>,
<&dmamux1 19 0x400 0x1>,
<&dmamux1 20 0x400 0x1>,
<&dmamux1 21 0x400 0x1>,
<&dmamux1 22 0x400 0x1>;
dma-names = "ch1", "ch2", "ch3", "ch4", "up";
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
st,breakinput = <0 1 5>;
};
timer@0 {
compatible = "st,stm32-timer-trigger";
reg = <0>;
};
counter {
compatible = "st,stm32-timer-counter";
};
};
...

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STM32 Timers driver bindings
This IP provides 3 types of timer along with PWM functionality:
- advanced-control timers consist of a 16-bit auto-reload counter driven by a programmable
prescaler, break input feature, PWM outputs and complementary PWM ouputs channels.
- general-purpose timers consist of a 16-bit or 32-bit auto-reload counter driven by a
programmable prescaler and PWM outputs.
- basic timers consist of a 16-bit auto-reload counter driven by a programmable prescaler.
Required parameters:
- compatible: must be "st,stm32-timers"
- reg: Physical base address and length of the controller's
registers.
- clock-names: Set to "int".
- clocks: Phandle to the clock used by the timer module.
For Clk properties, please refer to ../clock/clock-bindings.txt
Optional parameters:
- resets: Phandle to the parent reset controller.
See ../reset/st,stm32-rcc.txt
- dmas: List of phandle to dma channels that can be used for
this timer instance. There may be up to 7 dma channels.
- dma-names: List of dma names. Must match 'dmas' property. Valid
names are: "ch1", "ch2", "ch3", "ch4", "up", "trig",
"com".
Optional subnodes:
- pwm: See ../pwm/pwm-stm32.txt
- timer: See ../iio/timer/stm32-timer-trigger.txt
- counter: See ../counter/stm32-timer-cnt.txt
Example:
timers@40010000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40010000 0x400>;
clocks = <&rcc 0 160>;
clock-names = "int";
pwm {
compatible = "st,stm32-pwm";
pinctrl-0 = <&pwm1_pins>;
pinctrl-names = "default";
};
timer@0 {
compatible = "st,stm32-timer-trigger";
reg = <0>;
};
counter {
compatible = "st,stm32-timer-counter";
pinctrl-names = "default";
pinctrl-0 = <&tim1_in_pins>;
};
};
Example with all dmas:
timer@40010000 {
...
dmas = <&dmamux1 11 0x400 0x0>,
<&dmamux1 12 0x400 0x0>,
<&dmamux1 13 0x400 0x0>,
<&dmamux1 14 0x400 0x0>,
<&dmamux1 15 0x400 0x0>,
<&dmamux1 16 0x400 0x0>,
<&dmamux1 17 0x400 0x0>;
dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig", "com";
...
child nodes...
};

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STMicroelectronics STM32 Timers PWM bindings
Must be a sub-node of an STM32 Timers device tree node.
See ../mfd/stm32-timers.txt for details about the parent node.
Required parameters:
- compatible: Must be "st,stm32-pwm".
- pinctrl-names: Set to "default".
- pinctrl-0: List of phandles pointing to pin configuration nodes for PWM module.
For Pinctrl properties see ../pinctrl/pinctrl-bindings.txt
- #pwm-cells: Should be set to 3. This PWM chip uses the default 3 cells
bindings defined in pwm.txt.
Optional parameters:
- st,breakinput: One or two <index level filter> to describe break input configurations.
"index" indicates on which break input (0 or 1) the configuration
should be applied.
"level" gives the active level (0=low or 1=high) of the input signal
for this configuration.
"filter" gives the filtering value to be applied.
Example:
timers@40010000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40010000 0x400>;
clocks = <&rcc 0 160>;
clock-names = "int";
pwm {
compatible = "st,stm32-pwm";
#pwm-cells = <3>;
pinctrl-0 = <&pwm1_pins>;
pinctrl-names = "default";
st,breakinput = <0 1 5>;
};
};