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sh: multiple vectors per irq - sh7710.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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@ -1,7 +1,7 @@
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/*
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* SH3 Setup code for SH7710, SH7712
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*
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* Copyright (C) 2006, 2007 Paul Mundt
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* Copyright (C) 2006 - 2009 Paul Mundt
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* Copyright (C) 2007 Nobuhiro Iwamatsu
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*
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* This file is subject to the terms and conditions of the GNU General Public
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@ -20,59 +20,40 @@ enum {
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/* interrupt sources */
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IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5,
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DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3,
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SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI,
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SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI,
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DMAC_DEI4, DMAC_DEI5,
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IPSEC,
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DMAC1, SCIF0, SCIF1, DMAC2, IPSEC,
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EDMAC0, EDMAC1, EDMAC2,
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SIOF0_ERI, SIOF0_TXI, SIOF0_RXI, SIOF0_CCI,
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SIOF1_ERI, SIOF1_TXI, SIOF1_RXI, SIOF1_CCI,
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TMU0, TMU1, TMU2,
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RTC_ATI, RTC_PRI, RTC_CUI,
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WDT,
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REF,
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SIOF0, SIOF1,
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/* interrupt groups */
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RTC, DMAC1, SCIF0, SCIF1, DMAC2, SIOF0, SIOF1,
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TMU0, TMU1, TMU2,
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RTC, WDT, REF,
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};
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static struct intc_vect vectors[] __initdata = {
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/* IRQ0->5 are handled in setup-sh3.c */
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INTC_VECT(DMAC_DEI0, 0x800), INTC_VECT(DMAC_DEI1, 0x820),
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INTC_VECT(DMAC_DEI2, 0x840), INTC_VECT(DMAC_DEI3, 0x860),
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INTC_VECT(SCIF0_ERI, 0x880), INTC_VECT(SCIF0_RXI, 0x8a0),
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INTC_VECT(SCIF0_BRI, 0x8c0), INTC_VECT(SCIF0_TXI, 0x8e0),
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INTC_VECT(SCIF1_ERI, 0x900), INTC_VECT(SCIF1_RXI, 0x920),
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INTC_VECT(SCIF1_BRI, 0x940), INTC_VECT(SCIF1_TXI, 0x960),
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INTC_VECT(DMAC_DEI4, 0xb80), INTC_VECT(DMAC_DEI5, 0xba0),
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INTC_VECT(DMAC1, 0x800), INTC_VECT(DMAC1, 0x820),
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INTC_VECT(DMAC1, 0x840), INTC_VECT(DMAC1, 0x860),
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INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0),
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INTC_VECT(SCIF0, 0x8c0), INTC_VECT(SCIF0, 0x8e0),
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INTC_VECT(SCIF1, 0x900), INTC_VECT(SCIF1, 0x920),
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INTC_VECT(SCIF1, 0x940), INTC_VECT(SCIF1, 0x960),
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INTC_VECT(DMAC2, 0xb80), INTC_VECT(DMAC2, 0xba0),
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#ifdef CONFIG_CPU_SUBTYPE_SH7710
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INTC_VECT(IPSEC, 0xbe0),
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#endif
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INTC_VECT(EDMAC0, 0xc00), INTC_VECT(EDMAC1, 0xc20),
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INTC_VECT(EDMAC2, 0xc40),
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INTC_VECT(SIOF0_ERI, 0xe00), INTC_VECT(SIOF0_TXI, 0xe20),
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INTC_VECT(SIOF0_RXI, 0xe40), INTC_VECT(SIOF0_CCI, 0xe60),
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INTC_VECT(SIOF1_ERI, 0xe80), INTC_VECT(SIOF1_TXI, 0xea0),
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INTC_VECT(SIOF1_RXI, 0xec0), INTC_VECT(SIOF1_CCI, 0xee0),
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INTC_VECT(SIOF0, 0xe00), INTC_VECT(SIOF0, 0xe20),
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INTC_VECT(SIOF0, 0xe40), INTC_VECT(SIOF0, 0xe60),
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INTC_VECT(SIOF1, 0xe80), INTC_VECT(SIOF1, 0xea0),
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INTC_VECT(SIOF1, 0xec0), INTC_VECT(SIOF1, 0xee0),
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INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
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INTC_VECT(TMU2, 0x440),
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INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0),
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INTC_VECT(RTC_CUI, 0x4c0),
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INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
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INTC_VECT(RTC, 0x4c0),
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INTC_VECT(WDT, 0x560),
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INTC_VECT(REF, 0x580),
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};
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static struct intc_group groups[] __initdata = {
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INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
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INTC_GROUP(DMAC1, DMAC_DEI0, DMAC_DEI1, DMAC_DEI2, DMAC_DEI3),
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INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
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INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI),
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INTC_GROUP(DMAC2, DMAC_DEI4, DMAC_DEI5),
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INTC_GROUP(SIOF0, SIOF0_ERI, SIOF0_TXI, SIOF0_RXI, SIOF0_CCI),
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INTC_GROUP(SIOF1, SIOF1_ERI, SIOF1_TXI, SIOF1_RXI, SIOF1_CCI),
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};
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static struct intc_prio_reg prio_registers[] __initdata = {
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{ 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
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{ 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF, 0, 0 } },
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@ -85,7 +66,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
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{ 0xa4080006, 0, 16, 4, /* IPRI */ { 0, 0, SIOF1 } },
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};
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static DECLARE_INTC_DESC(intc_desc, "sh7710", vectors, groups,
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static DECLARE_INTC_DESC(intc_desc, "sh7710", vectors, NULL,
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NULL, prio_registers, NULL);
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static struct resource rtc_resources[] = {
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@ -98,14 +79,6 @@ static struct resource rtc_resources[] = {
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.start = 20,
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.flags = IORESOURCE_IRQ,
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},
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[2] = {
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.start = 21,
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.flags = IORESOURCE_IRQ,
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},
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[3] = {
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.start = 22,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct sh_rtc_platform_info rtc_info = {
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@ -127,12 +100,12 @@ static struct plat_sci_port sci_platform_data[] = {
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.mapbase = 0xa4400000,
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.flags = UPF_BOOT_AUTOCONF,
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.type = PORT_SCIF,
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.irqs = { 52, 53, 55, 54 },
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.irqs = { 52, 52, 52, 52 },
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}, {
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.mapbase = 0xa4410000,
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.flags = UPF_BOOT_AUTOCONF,
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.type = PORT_SCIF,
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.irqs = { 56, 57, 59, 58 },
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.irqs = { 56, 56, 56, 56 },
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}, {
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.flags = 0,
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