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ARM: dts: Fix definition of MSHC device tree nodes for exynos4x12
All SoCs from Exynos4x12 series contain the MSHC block, so its node can be located in exynos4x12.dtsi. In addition, missing clock specifiers are added, generic SoC attributes are moved from board dts files to common dtsi file of SoC family and the node is renamed to a more generic name to follow node naming recommendations. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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@ -38,9 +38,7 @@
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};
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};
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mshc@12550000 {
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#address-cells = <1>;
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#size-cells = <0>;
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mmc@12550000 {
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pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
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pinctrl-names = "default";
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vmmc-supply = <&ldo20_reg &buck8_reg>;
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@ -49,7 +47,6 @@
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num-slots = <1>;
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supports-highspeed;
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broken-cd;
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fifo-depth = <0x80>;
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card-detect-delay = <200>;
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samsung,dw-mshc-ciu-div = <3>;
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samsung,dw-mshc-sdr-timing = <2 3>;
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@ -122,9 +122,7 @@
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status = "okay";
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};
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mshc@12550000 {
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#address-cells = <1>;
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#size-cells = <0>;
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mmc@12550000 {
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pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
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pinctrl-names = "default";
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status = "okay";
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@ -132,7 +130,6 @@
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num-slots = <1>;
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supports-highspeed;
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broken-cd;
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fifo-depth = <0x80>;
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card-detect-delay = <200>;
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samsung,dw-mshc-ciu-div = <3>;
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samsung,dw-mshc-sdr-timing = <2 3>;
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@ -61,13 +61,4 @@
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};
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};
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mshc@12550000 {
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compatible = "samsung,exynos4412-dw-mshc";
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reg = <0x12550000 0x1000>;
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interrupts = <0 77 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock 301>, <&clock 149>;
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clock-name = "biu", "ciu";
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};
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};
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@ -28,6 +28,7 @@
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pinctrl3 = &pinctrl_3;
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fimc-lite0 = &fimc_lite_0;
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fimc-lite1 = &fimc_lite_1;
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mshc0 = &mshc_0;
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};
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pd_isp: isp-power-domain@10023CA0 {
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@ -176,4 +177,16 @@
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};
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};
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};
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mshc_0: mmc@12550000 {
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compatible = "samsung,exynos4412-dw-mshc";
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reg = <0x12550000 0x1000>;
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interrupts = <0 77 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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fifo-depth = <0x80>;
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clocks = <&clock 301>, <&clock 149>;
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clock-names = "biu", "ciu";
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status = "disabled";
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};
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};
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