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synced 2024-11-11 04:18:39 +08:00
Merge branch 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel
* 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel: drm/i915: fix up error path leak in i915_cmdbuffer drm/i915: fix unpaired i915 device mutex on entervt failure. drm/i915: add support for G41 chipset drm/i915: Enable ASLE if present drm/i915: Unregister ACPI video driver when exiting drm/i915: Register ACPI video even when not modesetting drm/i915: fix transition to I915_TILING_NONE drm/i915: Don't let an oops get triggered from irq_emit without dma init. drm/i915: allow tiled front buffers on 965+
This commit is contained in:
commit
56a50adda4
@ -2296,7 +2296,7 @@ static int __init acpi_video_init(void)
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return acpi_video_register();
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}
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static void __exit acpi_video_exit(void)
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void __exit acpi_video_exit(void)
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{
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acpi_bus_unregister_driver(&acpi_video_bus);
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@ -2305,6 +2305,7 @@ static void __exit acpi_video_exit(void)
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return;
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}
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EXPORT_SYMBOL(acpi_video_exit);
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module_init(acpi_video_init);
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module_exit(acpi_video_exit);
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@ -713,18 +713,18 @@ static int i915_cmdbuffer(struct drm_device *dev, void *data,
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mutex_unlock(&dev->struct_mutex);
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if (ret) {
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DRM_ERROR("i915_dispatch_cmdbuffer failed\n");
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goto fail_batch_free;
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goto fail_clip_free;
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}
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if (sarea_priv)
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sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
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fail_batch_free:
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drm_free(batch_data, cmdbuf->sz, DRM_MEM_DRIVER);
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fail_clip_free:
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drm_free(cliprects,
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cmdbuf->num_cliprects * sizeof(struct drm_clip_rect),
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DRM_MEM_DRIVER);
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fail_batch_free:
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drm_free(batch_data, cmdbuf->sz, DRM_MEM_DRIVER);
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return ret;
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}
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@ -1232,7 +1232,7 @@ int i915_driver_unload(struct drm_device *dev)
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if (dev_priv->regs != NULL)
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iounmap(dev_priv->regs);
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intel_opregion_free(dev);
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intel_opregion_free(dev, 0);
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if (drm_core_check_feature(dev, DRIVER_MODESET)) {
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intel_modeset_cleanup(dev);
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@ -77,7 +77,7 @@ static int i915_suspend(struct drm_device *dev, pm_message_t state)
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drm_irq_uninstall(dev);
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}
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intel_opregion_free(dev);
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intel_opregion_free(dev, 1);
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if (state.event == PM_EVENT_SUSPEND) {
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/* Shut down the device */
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@ -674,12 +674,12 @@ extern int i915_restore_state(struct drm_device *dev);
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#ifdef CONFIG_ACPI
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/* i915_opregion.c */
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extern int intel_opregion_init(struct drm_device *dev, int resume);
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extern void intel_opregion_free(struct drm_device *dev);
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extern void intel_opregion_free(struct drm_device *dev, int suspend);
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extern void opregion_asle_intr(struct drm_device *dev);
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extern void opregion_enable_asle(struct drm_device *dev);
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#else
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static inline int intel_opregion_init(struct drm_device *dev, int resume) { return 0; }
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static inline void intel_opregion_free(struct drm_device *dev) { return; }
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static inline void intel_opregion_free(struct drm_device *dev, int suspend) { return; }
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static inline void opregion_asle_intr(struct drm_device *dev) { return; }
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static inline void opregion_enable_asle(struct drm_device *dev) { return; }
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#endif
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@ -787,7 +787,8 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
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(dev)->pci_device == 0x2A42 || \
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(dev)->pci_device == 0x2E02 || \
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(dev)->pci_device == 0x2E12 || \
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(dev)->pci_device == 0x2E22)
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(dev)->pci_device == 0x2E22 || \
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(dev)->pci_device == 0x2E32)
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#define IS_I965GM(dev) ((dev)->pci_device == 0x2A02)
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@ -796,6 +797,7 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
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#define IS_G4X(dev) ((dev)->pci_device == 0x2E02 || \
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(dev)->pci_device == 0x2E12 || \
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(dev)->pci_device == 0x2E22 || \
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(dev)->pci_device == 0x2E32 || \
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IS_GM45(dev))
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#define IS_IGDG(dev) ((dev)->pci_device == 0xa001)
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@ -4087,8 +4087,10 @@ i915_gem_entervt_ioctl(struct drm_device *dev, void *data,
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dev_priv->mm.suspended = 0;
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ret = i915_gem_init_ringbuffer(dev);
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if (ret != 0)
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if (ret != 0) {
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mutex_unlock(&dev->struct_mutex);
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return ret;
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}
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spin_lock(&dev_priv->mm.active_list_lock);
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BUG_ON(!list_empty(&dev_priv->mm.active_list));
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@ -283,7 +283,6 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
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mutex_lock(&dev->struct_mutex);
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if (args->tiling_mode == I915_TILING_NONE) {
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obj_priv->tiling_mode = I915_TILING_NONE;
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args->swizzle_mode = I915_BIT_6_SWIZZLE_NONE;
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} else {
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if (args->tiling_mode == I915_TILING_X)
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@ -406,7 +406,7 @@ int i915_irq_emit(struct drm_device *dev, void *data,
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drm_i915_irq_emit_t *emit = data;
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int result;
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if (!dev_priv) {
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if (!dev_priv || !dev_priv->ring.virtual_start) {
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DRM_ERROR("called with no initialization\n");
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return -EINVAL;
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}
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@ -386,6 +386,7 @@ int intel_opregion_init(struct drm_device *dev, int resume)
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if (mboxes & MBOX_ASLE) {
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DRM_DEBUG("ASLE supported\n");
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opregion->asle = base + OPREGION_ASLE_OFFSET;
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opregion_enable_asle(dev);
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}
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if (!resume)
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@ -409,7 +410,7 @@ err_out:
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return err;
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}
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void intel_opregion_free(struct drm_device *dev)
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void intel_opregion_free(struct drm_device *dev, int suspend)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct intel_opregion *opregion = &dev_priv->opregion;
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@ -417,6 +418,9 @@ void intel_opregion_free(struct drm_device *dev)
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if (!opregion->enabled)
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return;
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if (!suspend)
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acpi_video_exit();
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opregion->acpi->drdy = 0;
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system_opregion = NULL;
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@ -1446,6 +1446,7 @@
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#define DISPPLANE_NO_LINE_DOUBLE 0
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#define DISPPLANE_STEREO_POLARITY_FIRST 0
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#define DISPPLANE_STEREO_POLARITY_SECOND (1<<18)
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#define DISPPLANE_TILED (1<<10)
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#define DSPAADDR 0x70184
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#define DSPASTRIDE 0x70188
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#define DSPAPOS 0x7018C /* reserved */
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@ -657,6 +657,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
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int dspbase = (pipe == 0 ? DSPAADDR : DSPBADDR);
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int dspsurf = (pipe == 0 ? DSPASURF : DSPBSURF);
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int dspstride = (pipe == 0) ? DSPASTRIDE : DSPBSTRIDE;
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int dsptileoff = (pipe == 0 ? DSPATILEOFF : DSPBTILEOFF);
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int dspcntr_reg = (pipe == 0) ? DSPACNTR : DSPBCNTR;
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u32 dspcntr, alignment;
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int ret;
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@ -733,6 +734,13 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
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mutex_unlock(&dev->struct_mutex);
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return -EINVAL;
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}
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if (IS_I965G(dev)) {
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if (obj_priv->tiling_mode != I915_TILING_NONE)
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dspcntr |= DISPPLANE_TILED;
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else
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dspcntr &= ~DISPPLANE_TILED;
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}
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I915_WRITE(dspcntr_reg, dspcntr);
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Start = obj_priv->gtt_offset;
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@ -745,6 +753,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
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I915_READ(dspbase);
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I915_WRITE(dspsurf, Start);
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I915_READ(dspsurf);
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I915_WRITE(dsptileoff, (y << 16) | x);
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} else {
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I915_WRITE(dspbase, Start + Offset);
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I915_READ(dspbase);
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@ -3,8 +3,10 @@
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#if (defined CONFIG_ACPI_VIDEO || defined CONFIG_ACPI_VIDEO_MODULE)
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extern int acpi_video_register(void);
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extern int acpi_video_exit(void);
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#else
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static inline int acpi_video_register(void) { return 0; }
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static inline void acpi_video_exit(void) { return; }
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#endif
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#endif
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@ -532,6 +532,7 @@
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{0x8086, 0x2e02, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
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{0x8086, 0x2e12, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
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{0x8086, 0x2e22, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
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{0x8086, 0x2e32, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
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{0x8086, 0xa001, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
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{0x8086, 0xa011, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
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{0x8086, 0x35e8, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xffff00, 0}, \
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