treewide: Move dma_ops from struct dev_archdata into struct device

Some but not all architectures provide set_dma_ops(). Move dma_ops
from struct dev_archdata into struct device such that it becomes
possible on all architectures to configure dma_ops per device.

Signed-off-by: Bart Van Assche <bart.vanassche@sandisk.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Juergen Gross <jgross@suse.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: linux-arch@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: Russell King <linux@armlinux.org.uk>
Cc: x86@kernel.org
Signed-off-by: Doug Ledford <dledford@redhat.com>
This commit is contained in:
Bart Van Assche 2017-01-20 13:04:02 -08:00 committed by Doug Ledford
parent 5299709d0a
commit 5657933dbb
36 changed files with 48 additions and 70 deletions

View File

@ -7,7 +7,6 @@
#define ASMARM_DEVICE_H
struct dev_archdata {
const struct dma_map_ops *dma_ops;
#ifdef CONFIG_DMABOUNCE
struct dmabounce_device_info *dmabounce;
#endif

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@ -18,8 +18,8 @@ extern const struct dma_map_ops arm_coherent_dma_ops;
static inline const struct dma_map_ops *__generic_dma_ops(struct device *dev)
{
if (dev && dev->archdata.dma_ops)
return dev->archdata.dma_ops;
if (dev && dev->dma_ops)
return dev->dma_ops;
return &arm_dma_ops;
}
@ -34,7 +34,7 @@ static inline const struct dma_map_ops *get_dma_ops(struct device *dev)
static inline void set_dma_ops(struct device *dev, const struct dma_map_ops *ops)
{
BUG_ON(!dev);
dev->archdata.dma_ops = ops;
dev->dma_ops = ops;
}
#define HAVE_ARCH_DMA_SUPPORTED 1

View File

@ -17,7 +17,6 @@
#define __ASM_DEVICE_H
struct dev_archdata {
const struct dma_map_ops *dma_ops;
#ifdef CONFIG_IOMMU_API
void *iommu; /* private IOMMU data */
#endif

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@ -29,8 +29,8 @@ extern const struct dma_map_ops dummy_dma_ops;
static inline const struct dma_map_ops *__generic_dma_ops(struct device *dev)
{
if (dev && dev->archdata.dma_ops)
return dev->archdata.dma_ops;
if (dev && dev->dma_ops)
return dev->dma_ops;
/*
* We expect no ISA devices, and all other DMA masters are expected to

View File

@ -837,7 +837,7 @@ static bool do_iommu_attach(struct device *dev, const struct iommu_ops *ops,
return false;
}
dev->archdata.dma_ops = &iommu_dma_ops;
dev->dma_ops = &iommu_dma_ops;
return true;
}
@ -941,7 +941,7 @@ static void __iommu_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
void arch_teardown_dma_ops(struct device *dev)
{
dev->archdata.dma_ops = NULL;
dev->dma_ops = NULL;
}
#else
@ -955,8 +955,8 @@ static void __iommu_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
const struct iommu_ops *iommu, bool coherent)
{
if (!dev->archdata.dma_ops)
dev->archdata.dma_ops = &swiotlb_dma_ops;
if (!dev->dma_ops)
dev->dma_ops = &swiotlb_dma_ops;
dev->archdata.dma_coherent = coherent;
__iommu_setup_dma_ops(dev, dma_base, size, iommu);

View File

@ -4,7 +4,6 @@
* This file is released under the GPLv2
*/
struct dev_archdata {
const struct dma_map_ops *dma_ops;
};
struct pdev_archdata {

View File

@ -12,8 +12,8 @@
static inline const struct dma_map_ops *get_dma_ops(struct device *dev)
{
if (dev && dev->archdata.dma_ops)
return dev->archdata.dma_ops;
if (dev && dev->dma_ops)
return dev->dma_ops;
return &dma_noop_ops;
}

View File

@ -6,12 +6,7 @@
#ifndef _ASM_MIPS_DEVICE_H
#define _ASM_MIPS_DEVICE_H
struct dma_map_ops;
struct dev_archdata {
/* DMA operations on that device */
const struct dma_map_ops *dma_ops;
#ifdef CONFIG_DMA_PERDEV_COHERENT
/* Non-zero if DMA is coherent with CPU caches */
bool dma_coherent;

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@ -13,8 +13,8 @@ extern const struct dma_map_ops *mips_dma_map_ops;
static inline const struct dma_map_ops *get_dma_ops(struct device *dev)
{
if (dev && dev->archdata.dma_ops)
return dev->archdata.dma_ops;
if (dev && dev->dma_ops)
return dev->dma_ops;
else
return mips_dma_map_ops;
}

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@ -167,7 +167,7 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
pci_write_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, dconfig);
}
dev->dev.archdata.dma_ops = octeon_pci_dma_map_ops;
dev->dev.dma_ops = octeon_pci_dma_map_ops;
return 0;
}

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@ -6,7 +6,6 @@
#ifndef _ASM_POWERPC_DEVICE_H
#define _ASM_POWERPC_DEVICE_H
struct dma_map_ops;
struct device_node;
#ifdef CONFIG_PPC64
struct pci_dn;
@ -20,9 +19,6 @@ struct iommu_table;
* drivers/macintosh/macio_asic.c
*/
struct dev_archdata {
/* DMA operations on that device */
const struct dma_map_ops *dma_ops;
/*
* These two used to be a union. However, with the hybrid ops we need
* both so here we store both a DMA offset for direct mappings and

View File

@ -88,12 +88,12 @@ static inline const struct dma_map_ops *get_dma_ops(struct device *dev)
if (unlikely(dev == NULL))
return NULL;
return dev->archdata.dma_ops;
return dev->dma_ops;
}
static inline void set_dma_ops(struct device *dev, const struct dma_map_ops *ops)
{
dev->archdata.dma_ops = ops;
dev->dma_ops = ops;
}
/*

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@ -33,7 +33,7 @@ static u64 __maybe_unused get_pfn_limit(struct device *dev)
struct dev_archdata __maybe_unused *sd = &dev->archdata;
#ifdef CONFIG_SWIOTLB
if (sd->max_direct_dma_addr && sd->dma_ops == &swiotlb_dma_ops)
if (sd->max_direct_dma_addr && dev->dma_ops == &swiotlb_dma_ops)
pfn = min_t(u64, pfn, sd->max_direct_dma_addr >> PAGE_SHIFT);
#endif

View File

@ -692,7 +692,7 @@ static int cell_of_bus_notify(struct notifier_block *nb, unsigned long action,
return 0;
/* We use the PCI DMA ops */
dev->archdata.dma_ops = get_pci_dma_ops();
dev->dma_ops = get_pci_dma_ops();
cell_dma_dev_setup(dev);

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@ -186,7 +186,7 @@ static void pci_dma_dev_setup_pasemi(struct pci_dev *dev)
*/
if (dev->vendor == 0x1959 && dev->device == 0xa007 &&
!firmware_has_feature(FW_FEATURE_LPAR)) {
dev->dev.archdata.dma_ops = &dma_direct_ops;
dev->dev.dma_ops = &dma_direct_ops;
/*
* Set the coherent DMA mask to prevent the iommu
* being used unnecessarily

View File

@ -363,7 +363,7 @@ static int pcmcia_notify(struct notifier_block *nb, unsigned long action,
return 0;
/* We use the direct ops for localbus */
dev->archdata.dma_ops = &dma_direct_ops;
dev->dma_ops = &dma_direct_ops;
return 0;
}

View File

@ -756,11 +756,11 @@ int ps3_system_bus_device_register(struct ps3_system_bus_device *dev)
switch (dev->dev_type) {
case PS3_DEVICE_TYPE_IOC0:
dev->core.archdata.dma_ops = &ps3_ioc0_dma_ops;
dev->core.dma_ops = &ps3_ioc0_dma_ops;
dev_set_name(&dev->core, "ioc0_%02x", ++dev_ioc0_count);
break;
case PS3_DEVICE_TYPE_SB:
dev->core.archdata.dma_ops = &ps3_sb_dma_ops;
dev->core.dma_ops = &ps3_sb_dma_ops;
dev_set_name(&dev->core, "sb_%02x", ++dev_sb_count);
break;

View File

@ -169,7 +169,7 @@ static int ibmebus_create_device(struct device_node *dn)
return -ENOMEM;
dev->dev.bus = &ibmebus_bus_type;
dev->dev.archdata.dma_ops = &ibmebus_dma_ops;
dev->dev.dma_ops = &ibmebus_dma_ops;
ret = of_device_add(dev);
if (ret)

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@ -4,7 +4,6 @@
* This file is released under the GPLv2
*/
struct dev_archdata {
const struct dma_map_ops *dma_ops;
};
struct pdev_archdata {

View File

@ -14,8 +14,8 @@ extern const struct dma_map_ops s390_pci_dma_ops;
static inline const struct dma_map_ops *get_dma_ops(struct device *dev)
{
if (dev && dev->archdata.dma_ops)
return dev->archdata.dma_ops;
if (dev && dev->dma_ops)
return dev->dma_ops;
return &dma_noop_ops;
}

View File

@ -641,7 +641,7 @@ int pcibios_add_device(struct pci_dev *pdev)
int i;
pdev->dev.groups = zpci_attr_groups;
pdev->dev.archdata.dma_ops = &s390_pci_dma_ops;
pdev->dev.dma_ops = &s390_pci_dma_ops;
zpci_map_resources(pdev);
for (i = 0; i < PCI_BAR_COUNT; i++) {

View File

@ -17,9 +17,6 @@
#define _ASM_TILE_DEVICE_H
struct dev_archdata {
/* DMA operations on that device */
const struct dma_map_ops *dma_ops;
/* Offset of the DMA address from the PA. */
dma_addr_t dma_offset;

View File

@ -31,8 +31,8 @@ extern const struct dma_map_ops *gx_hybrid_pci_dma_map_ops;
static inline const struct dma_map_ops *get_dma_ops(struct device *dev)
{
if (dev && dev->archdata.dma_ops)
return dev->archdata.dma_ops;
if (dev && dev->dma_ops)
return dev->dma_ops;
else
return tile_dma_map_ops;
}
@ -61,7 +61,7 @@ static inline void dma_mark_clean(void *addr, size_t size) {}
static inline void set_dma_ops(struct device *dev, const struct dma_map_ops *ops)
{
dev->archdata.dma_ops = ops;
dev->dma_ops = ops;
}
static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)

View File

@ -2,9 +2,6 @@
#define _ASM_X86_DEVICE_H
struct dev_archdata {
#ifdef CONFIG_X86_DEV_DMA_OPS
const struct dma_map_ops *dma_ops;
#endif
#if defined(CONFIG_INTEL_IOMMU) || defined(CONFIG_AMD_IOMMU)
void *iommu; /* hook for IOMMU specific extension */
#endif

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@ -32,10 +32,10 @@ static inline const struct dma_map_ops *get_dma_ops(struct device *dev)
#ifndef CONFIG_X86_DEV_DMA_OPS
return dma_ops;
#else
if (unlikely(!dev) || !dev->archdata.dma_ops)
if (unlikely(!dev) || !dev->dma_ops)
return dma_ops;
else
return dev->archdata.dma_ops;
return dev->dma_ops;
#endif
}

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@ -1177,7 +1177,7 @@ static int __init calgary_init(void)
tbl = find_iommu_table(&dev->dev);
if (translation_enabled(tbl))
dev->dev.archdata.dma_ops = &calgary_dma_ops;
dev->dev.dma_ops = &calgary_dma_ops;
}
return ret;
@ -1201,7 +1201,7 @@ error:
calgary_disable_translation(dev);
calgary_free_bus(dev);
pci_dev_put(dev); /* Undo calgary_init_one()'s pci_dev_get() */
dev->dev.archdata.dma_ops = NULL;
dev->dev.dma_ops = NULL;
} while (1);
return ret;

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@ -667,7 +667,7 @@ static void set_dma_domain_ops(struct pci_dev *pdev)
spin_lock(&dma_domain_list_lock);
list_for_each_entry(domain, &dma_domain_list, node) {
if (pci_domain_nr(pdev->bus) == domain->domain_nr) {
pdev->dev.archdata.dma_ops = domain->dma_ops;
pdev->dev.dma_ops = domain->dma_ops;
break;
}
}

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@ -203,7 +203,7 @@ static void sta2x11_setup_pdev(struct pci_dev *pdev)
return;
pci_set_consistent_dma_mask(pdev, STA2X11_AMBA_SIZE - 1);
pci_set_dma_mask(pdev, STA2X11_AMBA_SIZE - 1);
pdev->dev.archdata.dma_ops = &sta2x11_dma_ops;
pdev->dev.dma_ops = &sta2x11_dma_ops;
/* We must enable all devices as master, for audio DMA to work */
pci_set_master(pdev);
@ -223,7 +223,7 @@ bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
{
struct sta2x11_mapping *map;
if (dev->archdata.dma_ops != &sta2x11_dma_ops) {
if (dev->dma_ops != &sta2x11_dma_ops) {
if (!dev->dma_mask)
return false;
return addr + size - 1 <= *dev->dma_mask;
@ -247,7 +247,7 @@ bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
*/
dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
{
if (dev->archdata.dma_ops != &sta2x11_dma_ops)
if (dev->dma_ops != &sta2x11_dma_ops)
return paddr;
return p2a(paddr, to_pci_dev(dev));
}
@ -259,7 +259,7 @@ dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
*/
phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
{
if (dev->archdata.dma_ops != &sta2x11_dma_ops)
if (dev->dma_ops != &sta2x11_dma_ops)
return daddr;
return a2p(daddr, to_pci_dev(dev));
}

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@ -6,11 +6,7 @@
#ifndef _ASM_XTENSA_DEVICE_H
#define _ASM_XTENSA_DEVICE_H
struct dma_map_ops;
struct dev_archdata {
/* DMA operations on that device */
const struct dma_map_ops *dma_ops;
};
struct pdev_archdata {

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@ -22,8 +22,8 @@ extern const struct dma_map_ops xtensa_dma_map_ops;
static inline const struct dma_map_ops *get_dma_ops(struct device *dev)
{
if (dev && dev->archdata.dma_ops)
return dev->archdata.dma_ops;
if (dev && dev->dma_ops)
return dev->dma_ops;
else
return &xtensa_dma_map_ops;
}

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@ -2465,7 +2465,7 @@ static void srpt_add_one(struct ib_device *device)
int i;
pr_debug("device = %p, device->dma_ops = %p\n", device,
device->dma_ops);
device->dma_device->dma_ops);
sdev = kzalloc(sizeof(*sdev), GFP_KERNEL);
if (!sdev)

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@ -515,7 +515,7 @@ static void iommu_uninit_device(struct device *dev)
iommu_group_remove_device(dev);
/* Remove dma-ops */
dev->archdata.dma_ops = NULL;
dev->dma_ops = NULL;
/*
* We keep dev_data around for unplugged devices and reuse it when the
@ -2164,7 +2164,7 @@ static int amd_iommu_add_device(struct device *dev)
dev_name(dev));
iommu_ignore_device(dev);
dev->archdata.dma_ops = &nommu_dma_ops;
dev->dma_ops = &nommu_dma_ops;
goto out;
}
init_iommu_group(dev);
@ -2181,7 +2181,7 @@ static int amd_iommu_add_device(struct device *dev)
if (domain->type == IOMMU_DOMAIN_IDENTITY)
dev_data->passthrough = true;
else
dev->archdata.dma_ops = &amd_iommu_dma_ops;
dev->dma_ops = &amd_iommu_dma_ops;
out:
iommu_completion_wait(iommu);

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@ -158,7 +158,7 @@ mbus_register_device(struct device *pdev, int id, const struct dma_map_ops *dma_
mbdev->dev.parent = pdev;
mbdev->id.device = id;
mbdev->id.vendor = MBUS_DEV_ANY_ID;
mbdev->dev.archdata.dma_ops = dma_ops;
mbdev->dev.dma_ops = dma_ops;
mbdev->dev.dma_mask = &mbdev->dev.coherent_dma_mask;
dma_set_mask(&mbdev->dev, DMA_BIT_MASK(64));
mbdev->dev.release = mbus_release_dev;

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@ -154,7 +154,7 @@ scif_register_device(struct device *pdev, int id, const struct dma_map_ops *dma_
sdev->dev.parent = pdev;
sdev->id.device = id;
sdev->id.vendor = SCIF_DEV_ANY_ID;
sdev->dev.archdata.dma_ops = dma_ops;
sdev->dev.dma_ops = dma_ops;
sdev->dev.release = scif_release_dev;
sdev->hw_ops = hw_ops;
sdev->dnode = dnode;

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@ -154,7 +154,7 @@ vop_register_device(struct device *pdev, int id,
vdev->dev.parent = pdev;
vdev->id.device = id;
vdev->id.vendor = VOP_DEV_ANY_ID;
vdev->dev.archdata.dma_ops = dma_ops;
vdev->dev.dma_ops = dma_ops;
vdev->dev.dma_mask = &vdev->dev.coherent_dma_mask;
dma_set_mask(&vdev->dev, DMA_BIT_MASK(64));
vdev->dev.release = vop_release_dev;

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@ -921,6 +921,7 @@ struct device {
#ifdef CONFIG_NUMA
int numa_node; /* NUMA node this device is close to */
#endif
const struct dma_map_ops *dma_ops;
u64 *dma_mask; /* dma mask (if dma'able device) */
u64 coherent_dma_mask;/* Like dma_mask, but for
alloc_coherent mappings as