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power_supply: bq27xxx_battery: Index register numbers by enum
Currently we use tables to map from register function to register number, these tables assume the enum used to describe the register function and index the register number is ordered to match the enum order. Index the register numbers by the enum instead. This also removes the need to comment each value with its function. Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Sebastian Reichel <sre@kernel.org>
This commit is contained in:
Andrew F. Davis
Sebastian Reichel
parent
5d9e01b31d
commit
5630b4334c
@ -104,143 +104,143 @@ enum bq27xxx_reg_index {
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/* Register mappings */
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/* Register mappings */
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static u8 bq27000_regs[] = {
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static u8 bq27000_regs[] = {
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0x00, /* CONTROL */
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[BQ27XXX_REG_CTRL] = 0x00,
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0x06, /* TEMP */
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[BQ27XXX_REG_TEMP] = 0x06,
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INVALID_REG_ADDR, /* INT TEMP - NA*/
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[BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
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0x08, /* VOLT */
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[BQ27XXX_REG_VOLT] = 0x08,
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0x14, /* AVG CURR */
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[BQ27XXX_REG_AI] = 0x14,
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0x0a, /* FLAGS */
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[BQ27XXX_REG_FLAGS] = 0x0a,
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0x16, /* TTE */
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[BQ27XXX_REG_TTE] = 0x16,
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0x18, /* TTF */
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[BQ27XXX_REG_TTF] = 0x18,
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0x1c, /* TTES */
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[BQ27XXX_REG_TTES] = 0x1c,
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0x26, /* TTECP */
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[BQ27XXX_REG_TTECP] = 0x26,
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0x0c, /* NAC */
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[BQ27XXX_REG_NAC] = 0x0c,
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0x12, /* LMD(FCC) */
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[BQ27XXX_REG_FCC] = 0x12,
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0x2a, /* CYCT */
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[BQ27XXX_REG_CYCT] = 0x2a,
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0x22, /* AE */
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[BQ27XXX_REG_AE] = 0x22,
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0x0b, /* SOC(RSOC) */
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[BQ27XXX_REG_SOC] = 0x0b,
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0x76, /* DCAP(ILMD) */
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[BQ27XXX_REG_DCAP] = 0x76,
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0x24, /* AP */
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[BQ27XXX_REG_AP] = 0x24,
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};
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};
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static u8 bq27010_regs[] = {
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static u8 bq27010_regs[] = {
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0x00, /* CONTROL */
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[BQ27XXX_REG_CTRL] = 0x00,
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0x06, /* TEMP */
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[BQ27XXX_REG_TEMP] = 0x06,
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INVALID_REG_ADDR, /* INT TEMP - NA*/
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[BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
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0x08, /* VOLT */
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[BQ27XXX_REG_VOLT] = 0x08,
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0x14, /* AVG CURR */
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[BQ27XXX_REG_AI] = 0x14,
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0x0a, /* FLAGS */
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[BQ27XXX_REG_FLAGS] = 0x0a,
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0x16, /* TTE */
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[BQ27XXX_REG_TTE] = 0x16,
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0x18, /* TTF */
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[BQ27XXX_REG_TTF] = 0x18,
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0x1c, /* TTES */
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[BQ27XXX_REG_TTES] = 0x1c,
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0x26, /* TTECP */
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[BQ27XXX_REG_TTECP] = 0x26,
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0x0c, /* NAC */
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[BQ27XXX_REG_NAC] = 0x0c,
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0x12, /* LMD(FCC) */
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[BQ27XXX_REG_FCC] = 0x12,
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0x2a, /* CYCT */
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[BQ27XXX_REG_CYCT] = 0x2a,
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INVALID_REG_ADDR, /* AE - NA */
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[BQ27XXX_REG_AE] = INVALID_REG_ADDR,
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0x0b, /* SOC(RSOC) */
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[BQ27XXX_REG_SOC] = 0x0b,
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0x76, /* DCAP(ILMD) */
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[BQ27XXX_REG_DCAP] = 0x76,
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INVALID_REG_ADDR, /* AP - NA */
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[BQ27XXX_REG_AP] = INVALID_REG_ADDR,
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};
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};
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static u8 bq27500_regs[] = {
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static u8 bq27500_regs[] = {
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0x00, /* CONTROL */
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[BQ27XXX_REG_CTRL] = 0x00,
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0x06, /* TEMP */
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[BQ27XXX_REG_TEMP] = 0x06,
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0x28, /* INT TEMP */
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[BQ27XXX_REG_INT_TEMP] = 0x28,
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0x08, /* VOLT */
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[BQ27XXX_REG_VOLT] = 0x08,
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0x14, /* AVG CURR */
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[BQ27XXX_REG_AI] = 0x14,
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0x0a, /* FLAGS */
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[BQ27XXX_REG_FLAGS] = 0x0a,
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0x16, /* TTE */
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[BQ27XXX_REG_TTE] = 0x16,
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INVALID_REG_ADDR, /* TTF - NA */
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[BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
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0x1a, /* TTES */
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[BQ27XXX_REG_TTES] = 0x1a,
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INVALID_REG_ADDR, /* TTECP - NA */
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[BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
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0x0c, /* NAC */
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[BQ27XXX_REG_NAC] = 0x0c,
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0x12, /* LMD(FCC) */
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[BQ27XXX_REG_FCC] = 0x12,
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0x2a, /* CYCT */
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[BQ27XXX_REG_CYCT] = 0x2a,
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INVALID_REG_ADDR, /* AE - NA */
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[BQ27XXX_REG_AE] = INVALID_REG_ADDR,
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0x2c, /* SOC(RSOC) */
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[BQ27XXX_REG_SOC] = 0x2c,
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0x3c, /* DCAP(ILMD) */
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[BQ27XXX_REG_DCAP] = 0x3c,
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INVALID_REG_ADDR, /* AP - NA */
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[BQ27XXX_REG_AP] = INVALID_REG_ADDR,
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};
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};
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static u8 bq27530_regs[] = {
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static u8 bq27530_regs[] = {
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0x00, /* CONTROL */
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[BQ27XXX_REG_CTRL] = 0x00,
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0x06, /* TEMP */
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[BQ27XXX_REG_TEMP] = 0x06,
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0x32, /* INT TEMP */
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[BQ27XXX_REG_INT_TEMP] = 0x32,
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0x08, /* VOLT */
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[BQ27XXX_REG_VOLT] = 0x08,
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0x14, /* AVG CURR */
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[BQ27XXX_REG_AI] = 0x14,
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0x0a, /* FLAGS */
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[BQ27XXX_REG_FLAGS] = 0x0a,
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0x16, /* TTE */
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[BQ27XXX_REG_TTE] = 0x16,
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INVALID_REG_ADDR, /* TTF - NA */
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[BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
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INVALID_REG_ADDR, /* TTES - NA */
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[BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
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INVALID_REG_ADDR, /* TTECP - NA */
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[BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
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0x0c, /* NAC */
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[BQ27XXX_REG_NAC] = 0x0c,
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0x12, /* LMD(FCC) */
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[BQ27XXX_REG_FCC] = 0x12,
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0x2a, /* CYCT */
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[BQ27XXX_REG_CYCT] = 0x2a,
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INVALID_REG_ADDR, /* AE - NA */
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[BQ27XXX_REG_AE] = INVALID_REG_ADDR,
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0x2c, /* SOC(RSOC) */
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[BQ27XXX_REG_SOC] = 0x2c,
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INVALID_REG_ADDR, /* DCAP - NA */
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[BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
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0x24, /* AP */
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[BQ27XXX_REG_AP] = 0x24,
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};
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};
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static u8 bq27541_regs[] = {
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static u8 bq27541_regs[] = {
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0x00, /* CONTROL */
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[BQ27XXX_REG_CTRL] = 0x00,
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0x06, /* TEMP */
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[BQ27XXX_REG_TEMP] = 0x06,
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0x28, /* INT TEMP */
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[BQ27XXX_REG_INT_TEMP] = 0x28,
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0x08, /* VOLT */
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[BQ27XXX_REG_VOLT] = 0x08,
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0x14, /* AVG CURR */
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[BQ27XXX_REG_AI] = 0x14,
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0x0a, /* FLAGS */
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[BQ27XXX_REG_FLAGS] = 0x0a,
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0x16, /* TTE */
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[BQ27XXX_REG_TTE] = 0x16,
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INVALID_REG_ADDR, /* TTF - NA */
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[BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
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INVALID_REG_ADDR, /* TTES - NA */
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[BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
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INVALID_REG_ADDR, /* TTECP - NA */
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[BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
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0x0c, /* NAC */
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[BQ27XXX_REG_NAC] = 0x0c,
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0x12, /* LMD(FCC) */
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[BQ27XXX_REG_FCC] = 0x12,
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0x2a, /* CYCT */
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[BQ27XXX_REG_CYCT] = 0x2a,
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INVALID_REG_ADDR, /* AE - NA */
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[BQ27XXX_REG_AE] = INVALID_REG_ADDR,
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0x2c, /* SOC(RSOC) */
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[BQ27XXX_REG_SOC] = 0x2c,
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0x3c, /* DCAP */
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[BQ27XXX_REG_DCAP] = 0x3c,
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0x24, /* AP */
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[BQ27XXX_REG_AP] = 0x24,
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};
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};
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static u8 bq27545_regs[] = {
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static u8 bq27545_regs[] = {
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0x00, /* CONTROL */
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[BQ27XXX_REG_CTRL] = 0x00,
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0x06, /* TEMP */
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[BQ27XXX_REG_TEMP] = 0x06,
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0x28, /* INT TEMP */
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[BQ27XXX_REG_INT_TEMP] = 0x28,
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0x08, /* VOLT */
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[BQ27XXX_REG_VOLT] = 0x08,
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0x14, /* AVG CURR */
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[BQ27XXX_REG_AI] = 0x14,
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0x0a, /* FLAGS */
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[BQ27XXX_REG_FLAGS] = 0x0a,
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0x16, /* TTE */
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[BQ27XXX_REG_TTE] = 0x16,
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INVALID_REG_ADDR, /* TTF - NA */
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[BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
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INVALID_REG_ADDR, /* TTES - NA */
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[BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
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INVALID_REG_ADDR, /* TTECP - NA */
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[BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
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0x0c, /* NAC */
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[BQ27XXX_REG_NAC] = 0x0c,
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0x12, /* LMD(FCC) */
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[BQ27XXX_REG_FCC] = 0x12,
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0x2a, /* CYCT */
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[BQ27XXX_REG_CYCT] = 0x2a,
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INVALID_REG_ADDR, /* AE - NA */
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[BQ27XXX_REG_AE] = INVALID_REG_ADDR,
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0x2c, /* SOC(RSOC) */
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[BQ27XXX_REG_SOC] = 0x2c,
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INVALID_REG_ADDR, /* DCAP - NA */
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[BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
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0x24, /* AP */
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[BQ27XXX_REG_AP] = 0x24,
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};
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};
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static u8 bq27421_regs[] = {
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static u8 bq27421_regs[] = {
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0x00, /* CONTROL */
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[BQ27XXX_REG_CTRL] = 0x00,
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0x02, /* TEMP */
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[BQ27XXX_REG_TEMP] = 0x02,
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0x1e, /* INT TEMP */
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[BQ27XXX_REG_INT_TEMP] = 0x1e,
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0x04, /* VOLT */
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[BQ27XXX_REG_VOLT] = 0x04,
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0x10, /* AVG CURR */
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[BQ27XXX_REG_AI] = 0x10,
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0x06, /* FLAGS */
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[BQ27XXX_REG_FLAGS] = 0x06,
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INVALID_REG_ADDR, /* TTE - NA */
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[BQ27XXX_REG_TTE] = INVALID_REG_ADDR,
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INVALID_REG_ADDR, /* TTF - NA */
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[BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
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INVALID_REG_ADDR, /* TTES - NA */
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[BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
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INVALID_REG_ADDR, /* TTECP - NA */
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[BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
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0x08, /* NAC */
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[BQ27XXX_REG_NAC] = 0x08,
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0x0e, /* FCC */
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[BQ27XXX_REG_FCC] = 0x0e,
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INVALID_REG_ADDR, /* CYCT - NA */
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[BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
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INVALID_REG_ADDR, /* AE - NA */
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[BQ27XXX_REG_AE] = INVALID_REG_ADDR,
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0x1c, /* SOC */
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[BQ27XXX_REG_SOC] = 0x1c,
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0x3c, /* DCAP */
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[BQ27XXX_REG_DCAP] = 0x3c,
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0x18, /* AP */
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[BQ27XXX_REG_AP] = 0x18,
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};
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};
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static u8 *bq27xxx_regs[] = {
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static u8 *bq27xxx_regs[] = {
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