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arm64: tegra: Use valid PWM period for VDD_GPU on Tegra210
The PWM on Tegra210 can run at a maximum frequency of 48 MHz and cannot reach the minimum period is 5334 ns. The currently configured period of 4880 ns is not within the valid range, so set it to 8000 ns. This value was taken from the downstream DTS files and seems to work fine. Signed-off-by: Thierry Reding <treding@nvidia.com>
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@ -337,7 +337,7 @@
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vdd_gpu: regulator@100 {
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compatible = "pwm-regulator";
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pwms = <&pwm 1 4880>;
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pwms = <&pwm 1 8000>;
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regulator-name = "VDD_GPU";
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regulator-min-microvolt = <710000>;
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regulator-max-microvolt = <1320000>;
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@ -821,7 +821,7 @@
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vdd_gpu: regulator@6 {
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compatible = "pwm-regulator";
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pwms = <&pwm 1 4880>;
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pwms = <&pwm 1 8000>;
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regulator-name = "VDD_GPU";
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regulator-min-microvolt = <710000>;
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