korg/linux
0
0
Fork 0
mirror of https://mirrors.bfsu.edu.cn/git/linux.git synced 2024-11-29 15:14:18 +08:00
Code Issues Packages Projects Releases Wiki Activity

Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc

Browse Source 
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc:
  n2_crypto: Attach on Niagara-T3.
  n2rng: Attach on Niagara-T3.
  sparc: Detect and handle UltraSPARC-T3 cpu types.
  sparc: Don't do expensive hypervisor PCR write unless necessary.
  sparc: Add T3 sun4v cpu type and hypervisor group defines.
  sparc: Don't leave sparc_pmu_type NULL on sun4v.
This commit is contained in:
Linus Torvalds 2011-07-28 05:59:19 -07:00
commit 55f9c40ff6
13 changed files with 95 additions and 34 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
arch/sparc/include/asm/elf_64.h
View File

@ -177,9 +177,11 @@ static inline unsigned int sparc64_elf_hwcap(void)
cap |= HWCAP_SPARC_ULTRA3;
else if (tlb_type == hypervisor) {
if (sun4v_chip_type == SUN4V_CHIP_NIAGARA1 ||
sun4v_chip_type == SUN4V_CHIP_NIAGARA2)
sun4v_chip_type == SUN4V_CHIP_NIAGARA2 ||
sun4v_chip_type == SUN4V_CHIP_NIAGARA3)
cap |= HWCAP_SPARC_BLKINIT;
if (sun4v_chip_type == SUN4V_CHIP_NIAGARA2)
if (sun4v_chip_type == SUN4V_CHIP_NIAGARA2 ||
sun4v_chip_type == SUN4V_CHIP_NIAGARA3)
cap |= HWCAP_SPARC_N2;
}

1
arch/sparc/include/asm/hypervisor.h
View File

@ -2950,6 +2950,7 @@ extern unsigned long sun4v_ncs_request(unsigned long request,
#define HV_GRP_N2_CPU 0x0202
#define HV_GRP_NIU 0x0204
#define HV_GRP_VF_CPU 0x0205
#define HV_GRP_KT_CPU 0x0209
#define HV_GRP_DIAG 0x0300
#ifndef __ASSEMBLY__

1
arch/sparc/include/asm/spitfire.h
View File

@ -42,6 +42,7 @@
#define SUN4V_CHIP_INVALID 0x00
#define SUN4V_CHIP_NIAGARA1 0x01
#define SUN4V_CHIP_NIAGARA2 0x02
#define SUN4V_CHIP_NIAGARA3 0x03
#define SUN4V_CHIP_UNKNOWN 0xff
#ifndef __ASSEMBLY__

3
arch/sparc/include/asm/xor_64.h
View File

@ -65,6 +65,7 @@ static struct xor_block_template xor_block_niagara = {
#define XOR_SELECT_TEMPLATE(FASTEST) \
((tlb_type == hypervisor && \
(sun4v_chip_type == SUN4V_CHIP_NIAGARA1 || \
sun4v_chip_type == SUN4V_CHIP_NIAGARA2)) ? \
sun4v_chip_type == SUN4V_CHIP_NIAGARA2 || \
sun4v_chip_type == SUN4V_CHIP_NIAGARA3)) ? \
&xor_block_niagara : \
&xor_block_VIS)

7
arch/sparc/kernel/cpu.c
View File

@ -474,11 +474,18 @@ static void __init sun4v_cpu_probe(void)
sparc_pmu_type = "niagara2";
break;
case SUN4V_CHIP_NIAGARA3:
sparc_cpu_type = "UltraSparc T3 (Niagara3)";
sparc_fpu_type = "UltraSparc T3 integrated FPU";
sparc_pmu_type = "niagara3";
break;
default:
printk(KERN_WARNING "CPU: Unknown sun4v cpu type [%s]\n",
prom_cpu_compatible);
sparc_cpu_type = "Unknown SUN4V CPU";
sparc_fpu_type = "Unknown SUN4V FPU";
sparc_pmu_type = "Unknown SUN4V PMU";
break;
}
}

1
arch/sparc/kernel/cpumap.c
View File

@ -324,6 +324,7 @@ static int iterate_cpu(struct cpuinfo_tree *t, unsigned int root_index)
switch (sun4v_chip_type) {
case SUN4V_CHIP_NIAGARA1:
case SUN4V_CHIP_NIAGARA2:
case SUN4V_CHIP_NIAGARA3:
rover_inc_table = niagara_iterate_method;
break;
default:

31
arch/sparc/kernel/head_64.S
View File

@ -132,6 +132,8 @@ prom_sun4v_name:
.asciz "sun4v"
prom_niagara_prefix:
.asciz "SUNW,UltraSPARC-T"
prom_sparc_prefix:
.asciz "SPARC-T"
.align 4
prom_root_compatible:
.skip 64
@ -379,6 +381,22 @@ sun4v_chip_type:
sethi %hi(prom_niagara_prefix), %g7
or %g7, %lo(prom_niagara_prefix), %g7
mov 17, %g3
90: ldub [%g7], %g2
ldub [%g1], %g4
cmp %g2, %g4
bne,pn %icc, 89f
add %g7, 1, %g7
subcc %g3, 1, %g3
bne,pt %xcc, 90b
add %g1, 1, %g1
ba,pt %xcc, 91f
nop
89: sethi %hi(prom_cpu_compatible), %g1
or %g1, %lo(prom_cpu_compatible), %g1
sethi %hi(prom_sparc_prefix), %g7
or %g7, %lo(prom_sparc_prefix), %g7
mov 7, %g3
90: ldub [%g7], %g2
ldub [%g1], %g4
cmp %g2, %g4
@ -389,6 +407,15 @@ sun4v_chip_type:
add %g1, 1, %g1
sethi %hi(prom_cpu_compatible), %g1
or %g1, %lo(prom_cpu_compatible), %g1
ldub [%g1 + 7], %g2
cmp %g2, '3'
be,pt %xcc, 5f
mov SUN4V_CHIP_NIAGARA3, %g4
ba,pt %xcc, 4f
nop
91: sethi %hi(prom_cpu_compatible), %g1
or %g1, %lo(prom_cpu_compatible), %g1
ldub [%g1 + 17], %g2
cmp %g2, '1'
@ -397,6 +424,7 @@ sun4v_chip_type:
cmp %g2, '2'
be,pt %xcc, 5f
mov SUN4V_CHIP_NIAGARA2, %g4
4:
mov SUN4V_CHIP_UNKNOWN, %g4
5: sethi %hi(sun4v_chip_type), %g2
@ -514,6 +542,9 @@ niagara_tlb_fixup:
cmp %g1, SUN4V_CHIP_NIAGARA2
be,pt %xcc, niagara2_patch
nop
cmp %g1, SUN4V_CHIP_NIAGARA3
be,pt %xcc, niagara2_patch
nop
call generic_patch_copyops
nop

1
arch/sparc/kernel/hvapi.c
View File

@ -38,6 +38,7 @@ static struct api_info api_table[] = {
{ .group = HV_GRP_N2_CPU, },
{ .group = HV_GRP_NIU, },
{ .group = HV_GRP_VF_CPU, },
{ .group = HV_GRP_KT_CPU, },
{ .group = HV_GRP_DIAG, .flags = FLAG_PRE_API },
};

7
arch/sparc/kernel/pcr.c
View File

@ -80,9 +80,12 @@ static void n2_pcr_write(u64 val)
{
unsigned long ret;
if (val & PCR_N2_HTRACE) {
ret = sun4v_niagara2_setperf(HV_N2_PERF_SPARC_CTL, val);
if (ret != HV_EOK)
write_pcr(val);
} else
write_pcr(val);
}
static const struct pcr_ops n2_pcr_ops = {
@ -106,6 +109,10 @@ static int __init register_perf_hsvc(void)
perf_hsvc_group = HV_GRP_N2_CPU;
break;
case SUN4V_CHIP_NIAGARA3:
perf_hsvc_group = HV_GRP_KT_CPU;
break;
default:
return -ENODEV;
}

3
arch/sparc/kernel/perf_event.c
View File

@ -1343,7 +1343,8 @@ static bool __init supported_pmu(void)
sparc_pmu = &niagara1_pmu;
return true;
}
if (!strcmp(sparc_pmu_type, "niagara2")) {
if (!strcmp(sparc_pmu_type, "niagara2") ||
!strcmp(sparc_pmu_type, "niagara3")) {
sparc_pmu = &niagara2_pmu;
return true;
}

29
drivers/char/hw_random/n2-drv.c
View File

@ -1,6 +1,6 @@
/* n2-drv.c: Niagara-2 RNG driver.
*
* Copyright (C) 2008 David S. Miller <davem@davemloft.net>
* Copyright (C) 2008, 2011 David S. Miller <davem@davemloft.net>
*/
#include <linux/kernel.h>
@ -22,8 +22,8 @@
#define DRV_MODULE_NAME "n2rng"
#define PFX DRV_MODULE_NAME ": "
#define DRV_MODULE_VERSION "0.1"
#define DRV_MODULE_RELDATE "May 15, 2008"
#define DRV_MODULE_VERSION "0.2"
#define DRV_MODULE_RELDATE "July 27, 2011"
static char version[] __devinitdata =
DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n";
@ -623,14 +623,14 @@ static const struct of_device_id n2rng_match[];
static int __devinit n2rng_probe(struct platform_device *op)
{
const struct of_device_id *match;
int victoria_falls;
int multi_capable;
int err = -ENOMEM;
struct n2rng *np;
match = of_match_device(n2rng_match, &op->dev);
if (!match)
return -EINVAL;
victoria_falls = (match->data != NULL);
multi_capable = (match->data != NULL);
n2rng_driver_version();
np = kzalloc(sizeof(*np), GFP_KERNEL);
@ -640,8 +640,8 @@ static int __devinit n2rng_probe(struct platform_device *op)
INIT_DELAYED_WORK(&np->work, n2rng_work);
if (victoria_falls)
np->flags |= N2RNG_FLAG_VF;
if (multi_capable)
np->flags |= N2RNG_FLAG_MULTI;
err = -ENODEV;
np->hvapi_major = 2;
@ -658,10 +658,10 @@ static int __devinit n2rng_probe(struct platform_device *op)
}
}
if (np->flags & N2RNG_FLAG_VF) {
if (np->flags & N2RNG_FLAG_MULTI) {
if (np->hvapi_major < 2) {
dev_err(&op->dev, "VF RNG requires HVAPI major "
"version 2 or later, got %lu\n",
dev_err(&op->dev, "multi-unit-capable RNG requires "
"HVAPI major version 2 or later, got %lu\n",
np->hvapi_major);
goto out_hvapi_unregister;
}
@ -688,8 +688,8 @@ static int __devinit n2rng_probe(struct platform_device *op)
goto out_free_units;
dev_info(&op->dev, "Found %s RNG, units: %d\n",
((np->flags & N2RNG_FLAG_VF) ?
"Victoria Falls" : "Niagara2"),
((np->flags & N2RNG_FLAG_MULTI) ?
"multi-unit-capable" : "single-unit"),
np->num_units);
np->hwrng.name = "n2rng";
@ -751,6 +751,11 @@ static const struct of_device_id n2rng_match[] = {
.compatible = "SUNW,vf-rng",
.data = (void *) 1,
},
{
.name = "random-number-generator",
.compatible = "SUNW,kt-rng",
.data = (void *) 1,
},
{},
};
MODULE_DEVICE_TABLE(of, n2rng_match);

2
drivers/char/hw_random/n2rng.h
View File

@ -68,7 +68,7 @@ struct n2rng {
struct platform_device *op;
unsigned long flags;
#define N2RNG_FLAG_VF 0x00000001 /* Victoria Falls RNG, else N2 */
#define N2RNG_FLAG_MULTI 0x00000001 /* Multi-unit capable RNG */
#define N2RNG_FLAG_CONTROL 0x00000002 /* Operating in control domain */
#define N2RNG_FLAG_READY 0x00000008 /* Ready for hw-rng layer */
#define N2RNG_FLAG_SHUTDOWN 0x00000010 /* Driver unregistering */

33
drivers/crypto/n2_core.c
View File

@ -1,6 +1,6 @@
/* n2_core.c: Niagara2 Stream Processing Unit (SPU) crypto support.
*
* Copyright (C) 2010 David S. Miller <davem@davemloft.net>
* Copyright (C) 2010, 2011 David S. Miller <davem@davemloft.net>
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
@ -31,8 +31,8 @@
#include "n2_core.h"
#define DRV_MODULE_NAME "n2_crypto"
#define DRV_MODULE_VERSION "0.1"
#define DRV_MODULE_RELDATE "April 29, 2010"
#define DRV_MODULE_VERSION "0.2"
#define DRV_MODULE_RELDATE "July 28, 2011"
static char version[] __devinitdata =
DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n";
@ -1823,22 +1823,17 @@ static int spu_mdesc_scan(struct mdesc_handle *mdesc, struct platform_device *de
static int __devinit get_irq_props(struct mdesc_handle *mdesc, u64 node,
struct spu_mdesc_info *ip)
{
const u64 *intr, *ino;
int intr_len, ino_len;
const u64 *ino;
int ino_len;
int i;
intr = mdesc_get_property(mdesc, node, "intr", &intr_len);
if (!intr)
return -ENODEV;
ino = mdesc_get_property(mdesc, node, "ino", &ino_len);
if (!ino)
if (!ino) {
printk("NO 'ino'\n");
return -ENODEV;
}
if (intr_len != ino_len)
return -EINVAL;
ip->num_intrs = intr_len / sizeof(u64);
ip->num_intrs = ino_len / sizeof(u64);
ip->ino_table = kzalloc((sizeof(struct ino_blob) *
ip->num_intrs),
GFP_KERNEL);
@ -1847,7 +1842,7 @@ static int __devinit get_irq_props(struct mdesc_handle *mdesc, u64 node,
for (i = 0; i < ip->num_intrs; i++) {
struct ino_blob *b = &ip->ino_table[i];
b->intr = intr[i];
b->intr = i + 1;
b->ino = ino[i];
}
@ -2204,6 +2199,10 @@ static struct of_device_id n2_crypto_match[] = {
.name = "n2cp",
.compatible = "SUNW,vf-cwq",
},
{
.name = "n2cp",
.compatible = "SUNW,kt-cwq",
},
{},
};
@ -2228,6 +2227,10 @@ static struct of_device_id n2_mau_match[] = {
.name = "ncp",
.compatible = "SUNW,vf-mau",
},
{
.name = "ncp",
.compatible = "SUNW,kt-mau",
},
{},
};