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bnxt_en: Add support for PCIe statistics
Gather periodic PCIe statistics for ethtool -S. Signed-off-by: Vasundhara Volam <vasundhara-v.volam@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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parent
a220eabc88
commit
55e4398d4e
@ -3396,6 +3396,12 @@ static void bnxt_free_port_stats(struct bnxt *bp)
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bp->hw_rx_port_stats_ext_map);
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bp->hw_rx_port_stats_ext = NULL;
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}
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if (bp->hw_pcie_stats) {
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dma_free_coherent(&pdev->dev, sizeof(struct pcie_ctx_hw_stats),
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bp->hw_pcie_stats, bp->hw_pcie_stats_map);
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bp->hw_pcie_stats = NULL;
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}
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}
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static void bnxt_free_ring_stats(struct bnxt *bp)
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@ -3477,7 +3483,7 @@ alloc_ext_stats:
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alloc_tx_ext_stats:
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if (bp->hw_tx_port_stats_ext)
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return 0;
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goto alloc_pcie_stats;
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if (bp->hwrm_spec_code >= 0x10902) {
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bp->hw_tx_port_stats_ext =
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@ -3487,6 +3493,19 @@ alloc_tx_ext_stats:
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GFP_KERNEL);
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}
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bp->flags |= BNXT_FLAG_PORT_STATS_EXT;
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alloc_pcie_stats:
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if (bp->hw_pcie_stats ||
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!(bp->fw_cap & BNXT_FW_CAP_PCIE_STATS_SUPPORTED))
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return 0;
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bp->hw_pcie_stats =
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dma_alloc_coherent(&pdev->dev, sizeof(struct pcie_ctx_hw_stats),
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&bp->hw_pcie_stats_map, GFP_KERNEL);
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if (!bp->hw_pcie_stats)
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return 0;
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bp->flags |= BNXT_FLAG_PCIE_STATS;
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return 0;
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}
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@ -6505,6 +6524,8 @@ static int __bnxt_hwrm_func_qcaps(struct bnxt *bp)
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bp->flags |= BNXT_FLAG_ROCEV1_CAP;
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if (flags & FUNC_QCAPS_RESP_FLAGS_ROCE_V2_SUPPORTED)
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bp->flags |= BNXT_FLAG_ROCEV2_CAP;
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if (flags & FUNC_QCAPS_RESP_FLAGS_PCIE_STATS_SUPPORTED)
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bp->fw_cap |= BNXT_FW_CAP_PCIE_STATS_SUPPORTED;
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bp->tx_push_thresh = 0;
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if (flags & FUNC_QCAPS_RESP_FLAGS_PUSH_MODE_SUPPORTED)
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@ -6805,6 +6826,19 @@ static int bnxt_hwrm_port_qstats_ext(struct bnxt *bp)
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return rc;
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}
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static int bnxt_hwrm_pcie_qstats(struct bnxt *bp)
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{
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struct hwrm_pcie_qstats_input req = {0};
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if (!(bp->flags & BNXT_FLAG_PCIE_STATS))
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return 0;
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bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PCIE_QSTATS, -1, -1);
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req.pcie_stat_size = cpu_to_le16(sizeof(struct pcie_ctx_hw_stats));
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req.pcie_stat_host_addr = cpu_to_le64(bp->hw_pcie_stats_map);
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return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
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}
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static void bnxt_hwrm_free_tunnel_ports(struct bnxt *bp)
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{
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if (bp->vxlan_port_cnt) {
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@ -9395,6 +9429,7 @@ static void bnxt_sp_task(struct work_struct *work)
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if (test_and_clear_bit(BNXT_PERIODIC_STATS_SP_EVENT, &bp->sp_event)) {
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bnxt_hwrm_port_qstats(bp);
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bnxt_hwrm_port_qstats_ext(bp);
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bnxt_hwrm_pcie_qstats(bp);
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}
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if (test_and_clear_bit(BNXT_LINK_CHNG_SP_EVENT, &bp->sp_event)) {
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@ -1354,6 +1354,7 @@ struct bnxt {
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#define BNXT_FLAG_DIM 0x2000000
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#define BNXT_FLAG_ROCE_MIRROR_CAP 0x4000000
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#define BNXT_FLAG_PORT_STATS_EXT 0x10000000
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#define BNXT_FLAG_PCIE_STATS 0x40000000
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#define BNXT_FLAG_ALL_CONFIG_FEATS (BNXT_FLAG_TPA | \
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BNXT_FLAG_RFS | \
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@ -1480,6 +1481,7 @@ struct bnxt {
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#define BNXT_FW_CAP_KONG_MB_CHNL 0x00000080
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#define BNXT_FW_CAP_OVS_64BIT_HANDLE 0x00000400
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#define BNXT_FW_CAP_TRUSTED_VF 0x00000800
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#define BNXT_FW_CAP_PCIE_STATS_SUPPORTED 0x00020000
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#define BNXT_NEW_RM(bp) ((bp)->fw_cap & BNXT_FW_CAP_NEW_RM)
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u32 hwrm_spec_code;
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@ -1498,10 +1500,12 @@ struct bnxt {
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struct tx_port_stats *hw_tx_port_stats;
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struct rx_port_stats_ext *hw_rx_port_stats_ext;
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struct tx_port_stats_ext *hw_tx_port_stats_ext;
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struct pcie_ctx_hw_stats *hw_pcie_stats;
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dma_addr_t hw_rx_port_stats_map;
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dma_addr_t hw_tx_port_stats_map;
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dma_addr_t hw_rx_port_stats_ext_map;
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dma_addr_t hw_tx_port_stats_ext_map;
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dma_addr_t hw_pcie_stats_map;
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int hw_port_stats_size;
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u16 fw_rx_stats_ext_size;
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u16 fw_tx_stats_ext_size;
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@ -1634,6 +1638,9 @@ struct bnxt {
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#define BNXT_TX_STATS_EXT_OFFSET(counter) \
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(offsetof(struct tx_port_stats_ext, counter) / 8)
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#define BNXT_PCIE_STATS_OFFSET(counter) \
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(offsetof(struct pcie_ctx_hw_stats, counter) / 8)
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#define I2C_DEV_ADDR_A0 0xa0
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#define I2C_DEV_ADDR_A2 0xa2
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#define SFF_DIAG_SUPPORT_OFFSET 0x5c
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@ -235,6 +235,9 @@ reset_coalesce:
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BNXT_TX_STATS_PRI_ENTRY(counter, 6), \
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BNXT_TX_STATS_PRI_ENTRY(counter, 7)
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#define BNXT_PCIE_STATS_ENTRY(counter) \
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{ BNXT_PCIE_STATS_OFFSET(counter), __stringify(counter) }
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enum {
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RX_TOTAL_DISCARDS,
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TX_TOTAL_DISCARDS,
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@ -387,6 +390,24 @@ static const struct {
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BNXT_TX_STATS_PRI_ENTRIES(tx_packets),
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};
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static const struct {
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long offset;
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char string[ETH_GSTRING_LEN];
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} bnxt_pcie_stats_arr[] = {
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BNXT_PCIE_STATS_ENTRY(pcie_pl_signal_integrity),
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BNXT_PCIE_STATS_ENTRY(pcie_dl_signal_integrity),
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BNXT_PCIE_STATS_ENTRY(pcie_tl_signal_integrity),
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BNXT_PCIE_STATS_ENTRY(pcie_link_integrity),
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BNXT_PCIE_STATS_ENTRY(pcie_tx_traffic_rate),
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BNXT_PCIE_STATS_ENTRY(pcie_rx_traffic_rate),
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BNXT_PCIE_STATS_ENTRY(pcie_tx_dllp_statistics),
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BNXT_PCIE_STATS_ENTRY(pcie_rx_dllp_statistics),
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BNXT_PCIE_STATS_ENTRY(pcie_equalization_time),
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BNXT_PCIE_STATS_ENTRY(pcie_ltssm_histogram[0]),
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BNXT_PCIE_STATS_ENTRY(pcie_ltssm_histogram[2]),
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BNXT_PCIE_STATS_ENTRY(pcie_recovery_histogram),
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};
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#define BNXT_NUM_SW_FUNC_STATS ARRAY_SIZE(bnxt_sw_func_stats)
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#define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr)
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#define BNXT_NUM_STATS_PRI \
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@ -394,6 +415,7 @@ static const struct {
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ARRAY_SIZE(bnxt_rx_pkts_pri_arr) + \
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ARRAY_SIZE(bnxt_tx_bytes_pri_arr) + \
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ARRAY_SIZE(bnxt_tx_pkts_pri_arr))
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#define BNXT_NUM_PCIE_STATS ARRAY_SIZE(bnxt_pcie_stats_arr)
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static int bnxt_get_num_stats(struct bnxt *bp)
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{
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@ -411,6 +433,9 @@ static int bnxt_get_num_stats(struct bnxt *bp)
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num_stats += BNXT_NUM_STATS_PRI;
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}
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if (bp->flags & BNXT_FLAG_PCIE_STATS)
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num_stats += BNXT_NUM_PCIE_STATS;
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return num_stats;
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}
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@ -513,6 +538,14 @@ skip_ring_stats:
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}
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}
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}
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if (bp->flags & BNXT_FLAG_PCIE_STATS) {
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__le64 *pcie_stats = (__le64 *)bp->hw_pcie_stats;
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for (i = 0; i < BNXT_NUM_PCIE_STATS; i++, j++) {
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buf[j] = le64_to_cpu(*(pcie_stats +
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bnxt_pcie_stats_arr[i].offset));
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}
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}
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}
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static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
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@ -613,6 +646,12 @@ static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
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}
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}
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}
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if (bp->flags & BNXT_FLAG_PCIE_STATS) {
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for (i = 0; i < BNXT_NUM_PCIE_STATS; i++) {
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strcpy(buf, bnxt_pcie_stats_arr[i].string);
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buf += ETH_GSTRING_LEN;
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}
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}
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break;
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case ETH_SS_TEST:
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if (bp->num_tests)
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