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ARM: OMAP2+: Handle errors for cpu_pm
We need to check for errors when calling cpu_pm_enter() and cpu_cluster_pm_enter(). And we need to bail out on errors as otherwise we can enter a deeper idle state when not desired. I'm not aware of the lack of error handling causing issues yet, but we need this at least for blocking deeper idle states when a GPIO instance has pending interrupts. Cc: Dave Gerlach <d-gerlach@ti.com> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Russell King <rmk+kernel@armlinux.org.uk> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20200304225433.37336-2-tony@atomide.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -109,6 +109,7 @@ static int omap3_enter_idle(struct cpuidle_device *dev,
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int index)
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{
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struct omap3_idle_statedata *cx = &omap3_idle_data[index];
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int error;
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if (omap_irq_pending() || need_resched())
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goto return_sleep_time;
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@ -125,8 +126,11 @@ static int omap3_enter_idle(struct cpuidle_device *dev,
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* Call idle CPU PM enter notifier chain so that
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* VFP context is saved.
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*/
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if (cx->mpu_state == PWRDM_POWER_OFF)
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cpu_pm_enter();
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if (cx->mpu_state == PWRDM_POWER_OFF) {
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error = cpu_pm_enter();
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if (error)
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goto out_clkdm_set;
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}
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/* Execute ARM wfi */
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omap_sram_idle();
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@ -139,6 +143,7 @@ static int omap3_enter_idle(struct cpuidle_device *dev,
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pwrdm_read_prev_pwrst(mpu_pd) == PWRDM_POWER_OFF)
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cpu_pm_exit();
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out_clkdm_set:
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/* Re-allow idle for C1 */
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if (cx->flags & OMAP_CPUIDLE_CX_NO_CLKDM_IDLE)
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clkdm_allow_idle(mpu_pd->pwrdm_clkdms[0]);
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@ -122,6 +122,7 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
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{
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struct idle_statedata *cx = state_ptr + index;
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u32 mpuss_can_lose_context = 0;
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int error;
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/*
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* CPU0 has to wait and stay ON until CPU1 is OFF state.
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@ -159,7 +160,9 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
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* Call idle CPU PM enter notifier chain so that
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* VFP and per CPU interrupt context is saved.
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*/
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cpu_pm_enter();
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error = cpu_pm_enter();
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if (error)
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goto cpu_pm_out;
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if (dev->cpu == 0) {
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pwrdm_set_logic_retst(mpu_pd, cx->mpu_logic_state);
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@ -169,13 +172,17 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
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* Call idle CPU cluster PM enter notifier chain
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* to save GIC and wakeupgen context.
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*/
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if (mpuss_can_lose_context)
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cpu_cluster_pm_enter();
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if (mpuss_can_lose_context) {
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error = cpu_cluster_pm_enter();
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if (error)
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goto cpu_cluster_pm_out;
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}
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}
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omap4_enter_lowpower(dev->cpu, cx->cpu_state);
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cpu_done[dev->cpu] = true;
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cpu_cluster_pm_out:
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/* Wakeup CPU1 only if it is not offlined */
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if (dev->cpu == 0 && cpumask_test_cpu(1, cpu_online_mask)) {
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@ -197,12 +204,6 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
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}
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}
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/*
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* Call idle CPU PM exit notifier chain to restore
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* VFP and per CPU IRQ context.
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*/
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cpu_pm_exit();
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/*
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* Call idle CPU cluster PM exit notifier chain
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* to restore GIC and wakeupgen context.
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@ -210,6 +211,13 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev,
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if (dev->cpu == 0 && mpuss_can_lose_context)
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cpu_cluster_pm_exit();
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/*
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* Call idle CPU PM exit notifier chain to restore
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* VFP and per CPU IRQ context.
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*/
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cpu_pm_exit();
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cpu_pm_out:
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tick_broadcast_exit();
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fail:
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@ -191,6 +191,7 @@ void omap_sram_idle(void)
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int per_next_state = PWRDM_POWER_ON;
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int core_next_state = PWRDM_POWER_ON;
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u32 sdrc_pwr = 0;
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int error;
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mpu_next_state = pwrdm_read_next_pwrst(mpu_pwrdm);
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switch (mpu_next_state) {
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@ -219,8 +220,11 @@ void omap_sram_idle(void)
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pwrdm_pre_transition(NULL);
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/* PER */
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if (per_next_state == PWRDM_POWER_OFF)
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cpu_cluster_pm_enter();
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if (per_next_state == PWRDM_POWER_OFF) {
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error = cpu_cluster_pm_enter();
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if (error)
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return;
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}
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/* CORE */
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if (core_next_state < PWRDM_POWER_ON) {
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