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arm: socfpga: dts: Add Arria10 SDRAM EDAC DTS support

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Add support for the Arria10 SDRAM EDAC. Update the bindings document for
the new match string.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: devicetree@vger.kernel.org
Cc: dinguyen@opensource.altera.com
Cc: galak@codeaurora.org
Cc: grant.likely@linaro.org
Cc: ijc+devicetree@hellion.org.uk
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: m.chehab@samsung.com
Cc: mark.rutland@arm.com
Cc: pawel.moll@arm.com
Cc: robh+dt@kernel.org
Cc: tthayer.linux@gmail.com
Link: http://lkml.kernel.org/r/1433428128-7292-5-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>
This commit is contained in:
Thor Thayer 2015-06-04 09:28:48 -05:00 committed by Borislav Petkov
parent 73bcc942f4
commit 54b4a8f578
2 changed files with 12 additions and 1 deletions
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2
Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt
View File

@ -2,7 +2,7 @@ Altera SOCFPGA SDRAM Error Detection & Correction [EDAC]
The EDAC accesses a range of registers in the SDRAM controller. The EDAC accesses a range of registers in the SDRAM controller.
Required properties: Required properties:
- compatible : should contain "altr,sdram-edac"; - compatible : should contain "altr,sdram-edac" or "altr,sdram-edac-a10"
- altr,sdr-syscon : phandle of the sdr module - altr,sdr-syscon : phandle of the sdr module
- interrupts : Should contain the SDRAM ECC IRQ in the - interrupts : Should contain the SDRAM ECC IRQ in the
appropriate format for the IRQ controller. appropriate format for the IRQ controller.

11
arch/arm/boot/dts/socfpga_arria10.dtsi
View File

@ -253,6 +253,17 @@
status = "disabled"; status = "disabled";
}; };
sdr: sdr@ffc25000 {
compatible = "syscon";
reg = <0xffcfb100 0x80>;
};
sdramedac {
compatible = "altr,sdram-edac-a10";
altr,sdr-syscon = <&sdr>;
interrupts = <0 2 4>, <0 0 4>;
};
L2: l2-cache@fffff000 { L2: l2-cache@fffff000 {
compatible = "arm,pl310-cache"; compatible = "arm,pl310-cache";
reg = <0xfffff000 0x1000>; reg = <0xfffff000 0x1000>;