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irqchip/gicv3-its: Make the PCI/MSI code standalone

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We can now lookup the base ITS domain, making it possible to
initialize the PCI/MSI code independently from the main ITS
subsystem.

This allows us to remove all the previously add hooks.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: <linux-arm-kernel@lists.infradead.org>
Cc: Yijing Wang <wangyijing@huawei.com>
Cc: Ma Jun <majun258@huawei.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Duc Dang <dhdang@apm.com>
Cc: Hanjun Guo <hanjun.guo@linaro.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Link: http://lkml.kernel.org/r/1438091186-10244-15-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This commit is contained in:
Marc Zyngier 2015-07-28 14:46:21 +01:00 committed by Thomas Gleixner
parent 841514ab41
commit 54456db9a2
3 changed files with 73 additions and 27 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

47
drivers/irqchip/irq-gic-v3-its-pci-msi.c
View File

@ -20,8 +20,6 @@
#include <linux/of_irq.h>
#include <linux/of_pci.h>
#include <linux/irqchip/arm-gic-v3.h>
static void its_mask_msi_irq(struct irq_data *d)
{
pci_msi_mask_irq(d);
@ -74,17 +72,24 @@ static int its_pci_msi_prepare(struct irq_domain *domain, struct device *dev,
{
struct pci_dev *pdev;
struct its_pci_alias dev_alias;
struct msi_domain_info *msi_info;
if (!dev_is_pci(dev))
return -EINVAL;
msi_info = msi_get_domain_info(domain->parent);
pdev = to_pci_dev(dev);
dev_alias.pdev = pdev;
dev_alias.count = nvec;
pci_for_each_dma_alias(pdev, its_get_pci_alias, &dev_alias);
return its_msi_prepare(domain, dev_alias.dev_id, dev_alias.count, info);
/* ITS specific DeviceID, as the core ITS ignores dev. */
info->scratchpad[0].ul = dev_alias.dev_id;
return msi_info->ops->msi_prepare(domain->parent,
dev, dev_alias.count, info);
}
static struct msi_domain_ops its_pci_msi_ops = {
@ -98,8 +103,38 @@ static struct msi_domain_info its_pci_msi_domain_info = {
.chip = &its_msi_irq_chip,
};
struct irq_domain *its_pci_msi_alloc_domain(struct device_node *np,
struct irq_domain *parent)
static struct of_device_id its_device_id[] = {
{ .compatible = "arm,gic-v3-its", },
{},
};
static int __init its_pci_msi_init(void)
{
return pci_msi_create_irq_domain(np, &its_pci_msi_domain_info, parent);
struct device_node *np;
struct irq_domain *parent;
for (np = of_find_matching_node(NULL, its_device_id); np;
np = of_find_matching_node(np, its_device_id)) {
if (!of_property_read_bool(np, "msi-controller"))
continue;
parent = irq_find_matching_host(np, DOMAIN_BUS_NEXUS);
if (!parent || !msi_get_domain_info(parent)) {
pr_err("%s: unable to locate ITS domain\n",
np->full_name);
continue;
}
if (!pci_msi_create_irq_domain(np, &its_pci_msi_domain_info,
parent)) {
pr_err("%s: unable to create PCI domain\n",
np->full_name);
continue;
}
pr_info("PCI/MSI: %s domain created\n", np->full_name);
}
return 0;
}
early_initcall(its_pci_msi_init);

48
drivers/irqchip/irq-gic-v3-its.c
View File

@ -59,7 +59,6 @@ struct its_collection {
struct its_node {
raw_spinlock_t lock;
struct list_head entry;
struct irq_domain *domain;
void __iomem *base;
unsigned long phys_base;
struct its_cmd_block *cmd_base;
@ -1187,13 +1186,25 @@ static int its_alloc_device_irq(struct its_device *dev, irq_hw_number_t *hwirq)
return 0;
}
int its_msi_prepare(struct irq_domain *domain, u32 dev_id,
int nvec, msi_alloc_info_t *info)
static int its_msi_prepare(struct irq_domain *domain, struct device *dev,
int nvec, msi_alloc_info_t *info)
{
struct its_node *its;
struct its_device *its_dev;
struct msi_domain_info *msi_info;
u32 dev_id;
/*
* We ignore "dev" entierely, and rely on the dev_id that has
* been passed via the scratchpad. This limits this domain's
* usefulness to upper layers that definitely know that they
* are built on top of the ITS.
*/
dev_id = info->scratchpad[0].ul;
msi_info = msi_get_domain_info(domain);
its = msi_info->data;
its = domain->parent->host_data;
its_dev = its_find_device(its, dev_id);
if (its_dev) {
/*
@ -1215,6 +1226,10 @@ out:
return 0;
}
static struct msi_domain_ops its_msi_domain_ops = {
.msi_prepare = its_msi_prepare,
};
static int its_irq_gic_domain_alloc(struct irq_domain *domain,
unsigned int virq,
irq_hw_number_t hwirq)
@ -1353,7 +1368,7 @@ static int its_probe(struct device_node *node, struct irq_domain *parent)
struct resource res;
struct its_node *its;
void __iomem *its_base;
struct irq_domain *inner_domain = NULL;
struct irq_domain *inner_domain;
u32 val;
u64 baser, tmp;
int err;
@ -1443,20 +1458,26 @@ static int its_probe(struct device_node *node, struct irq_domain *parent)
writel_relaxed(GITS_CTLR_ENABLE, its->base + GITS_CTLR);
if (of_property_read_bool(node, "msi-controller")) {
struct msi_domain_info *info;
info = kzalloc(sizeof(*info), GFP_KERNEL);
if (!info) {
err = -ENOMEM;
goto out_free_tables;
}
inner_domain = irq_domain_add_tree(node, &its_domain_ops, its);
if (!inner_domain) {
err = -ENOMEM;
kfree(info);
goto out_free_tables;
}
inner_domain->parent = parent;
inner_domain->bus_token = DOMAIN_BUS_NEXUS;
its->domain = its_pci_msi_alloc_domain(node, inner_domain);
if (!its->domain) {
err = -ENOMEM;
goto out_free_domains;
}
info->ops = &its_msi_domain_ops;
info->data = its;
inner_domain->host_data = info;
}
spin_lock(&its_lock);
@ -1465,11 +1486,6 @@ static int its_probe(struct device_node *node, struct irq_domain *parent)
return 0;
out_free_domains:
if (its->domain)
irq_domain_remove(its->domain);
if (inner_domain)
irq_domain_remove(inner_domain);
out_free_tables:
its_free_tables(its);
out_free_cmd:

5
include/linux/irqchip/arm-gic-v3.h
View File

@ -389,11 +389,6 @@ struct irq_domain;
int its_cpu_init(void);
int its_init(struct device_node *node, struct rdists *rdists,
struct irq_domain *domain);
int its_msi_prepare(struct irq_domain *domain, u32 dev_id,
int nvec, msi_alloc_info_t *info);
struct irq_domain *its_pci_msi_alloc_domain(struct device_node *node,
struct irq_domain *parent);
#endif