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docs: i2c: piix4: Fix typos, add markup, drop link
[JD: Update the subject One more typo fixed Drop the link to lm-sensors' README, it's irrelevant] Signed-off-by: Bruce Duncan <bwduncan@gmail.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Wolfram Sang <wsa@kernel.org>
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@ -64,7 +64,7 @@ correct address for this module, you could get in big trouble (read:
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crashes, data corruption, etc.). Try this only as a last resort (try BIOS
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updates first, for example), and backup first! An even more dangerous
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option is 'force_addr=<IOPORT>'. This will not only enable the PIIX4 like
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'force' foes, but it will also set a new base I/O port address. The SMBus
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'force' does, but it will also set a new base I/O port address. The SMBus
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parts of the PIIX4 needs a range of 8 of these addresses to function
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correctly. If these addresses are already reserved by some other device,
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you will get into big trouble! DON'T USE THIS IF YOU ARE NOT VERY SURE
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@ -86,15 +86,15 @@ If you own Force CPCI735 motherboard or other OSB4 based systems you may need
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to change the SMBus Interrupt Select register so the SMBus controller uses
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the SMI mode.
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1) Use lspci command and locate the PCI device with the SMBus controller:
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1) Use ``lspci`` command and locate the PCI device with the SMBus controller:
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00:0f.0 ISA bridge: ServerWorks OSB4 South Bridge (rev 4f)
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The line may vary for different chipsets. Please consult the driver source
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for all possible PCI ids (and lspci -n to match them). Lets assume the
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for all possible PCI ids (and ``lspci -n`` to match them). Let's assume the
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device is located at 00:0f.0.
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2) Now you just need to change the value in 0xD2 register. Get it first with
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command: lspci -xxx -s 00:0f.0
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command: ``lspci -xxx -s 00:0f.0``
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If the value is 0x3 then you need to change it to 0x1:
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setpci -s 00:0f.0 d2.b=1
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``setpci -s 00:0f.0 d2.b=1``
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Please note that you don't need to do that in all cases, just when the SMBus is
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not working properly.
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@ -109,6 +109,3 @@ which can easily get corrupted due to a state machine bug. These are mostly
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Thinkpad laptops, but desktop systems may also be affected. We have no list
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of all affected systems, so the only safe solution was to prevent access to
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the SMBus on all IBM systems (detected using DMI data.)
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For additional information, read:
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http://www.lm-sensors.org/browser/lm-sensors/trunk/README
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