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Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/next-queue

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Jeff Kirsher says:

====================
Intel Wired LAN Driver Updates 2015-04-10

This series contains updates to ixgbe and documentation for igb,
ixgbe and ixgb.

Stephen cleans up documentation to igb, ixgbe and ixgb.

Don updates how bridge mode is stored to minimize obfuscation and
makes updates for future silicon easier.  Adds a new bridge mode
support function which gathers all the logic needed to configure
bridge modes.  Adds Source Address Prunning for VEPA bridge mode
for x550 devices.

Vasu adds specific FCoE offloads for x550 for DDP context programming
and increased DDP exchanges.

Alex Duyck cleans up the use of HW_VLAN_CTAG_FILTER in hw_features,
where the driver was actually ignoring the value of the bit and was
just assuming it was always set.  Also cleans up the use of rcu_barrier()
since the driver has not used call_rcu() to free the rings for some
time now.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller 2015-04-10 12:49:34 -07:00
commit 5288ec157c
10 changed files with 243 additions and 69 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
Documentation/networking/igb.txt
View File

@ -42,10 +42,10 @@ Additional Configurations
Jumbo Frames
------------
Jumbo Frames support is enabled by changing the MTU to a value larger than
the default of 1500. Use the ifconfig command to increase the MTU size.
the default of 1500. Use the ip command to increase the MTU size.
For example:
ifconfig eth<x> mtu 9000 up
ip link set dev eth<x> mtu 9000
This setting is not saved across reboots.

12
Documentation/networking/ixgb.txt
View File

@ -39,7 +39,7 @@ Channel Bonding documentation can be found in the Linux kernel source:
The driver information previously displayed in the /proc filesystem is not
supported in this release. Alternatively, you can use ethtool (version 1.6
or later), lspci, and ifconfig to obtain the same information.
or later), lspci, and iproute2 to obtain the same information.
Instructions on updating ethtool can be found in the section "Additional
Configurations" later in this document.
@ -90,7 +90,7 @@ select m for "Intel(R) PRO/10GbE support" located at:
3. Assign an IP address to the interface by entering the following, where
x is the interface number:
ifconfig ethx <IP_address>
ip addr add ethx <IP_address>
4. Verify that the interface works. Enter the following, where <IP_address>
is the IP address for another machine on the same subnet as the interface
@ -177,7 +177,7 @@ NOTE: These changes are only suggestions, and serve as a starting point for
tuning your network performance.
The changes are made in three major ways, listed in order of greatest effect:
- Use ifconfig to modify the mtu (maximum transmission unit) and the txqueuelen
- Use ip link to modify the mtu (maximum transmission unit) and the txqueuelen
parameter.
- Use sysctl to modify /proc parameters (essentially kernel tuning)
- Use setpci to modify the MMRBC field in PCI-X configuration space to increase
@ -202,7 +202,7 @@ setpci -d 8086:1a48 e6.b=2e
# to change as well.
# set the txqueuelen
# your ixgb adapter should be loaded as eth1 for this to work, change if needed
ifconfig eth1 mtu 9000 txqueuelen 1000 up
ip li set dev eth1 mtu 9000 txqueuelen 1000 up
# call the sysctl utility to modify /proc/sys entries
sysctl -p ./sysctl_ixgb.conf
- END ixgb_perf.sh
@ -297,10 +297,10 @@ Additional Configurations
------------
The driver supports Jumbo Frames for all adapters. Jumbo Frames support is
enabled by changing the MTU to a value larger than the default of 1500.
The maximum value for the MTU is 16114. Use the ifconfig command to
The maximum value for the MTU is 16114. Use the ip command to
increase the MTU size. For example:
ifconfig ethx mtu 9000 up
ip li set dev ethx mtu 9000
The maximum MTU setting for Jumbo Frames is 16114. This value coincides
with the maximum Jumbo Frames size of 16128.

14
Documentation/networking/ixgbe.txt
View File

@ -70,10 +70,10 @@ Avago 1000BASE-T SFP ABCU-5710RZ
82599-based adapters support all passive and active limiting direct attach
cables that comply with SFF-8431 v4.1 and SFF-8472 v10.4 specifications.
Laser turns off for SFP+ when ifconfig down
Laser turns off for SFP+ when device is down
-------------------------------------------
"ifconfig down" turns off the laser for 82599-based SFP+ fiber adapters.
"ifconfig up" turns on the laser.
"ip link set down" turns off the laser for 82599-based SFP+ fiber adapters.
"ip link set up" turns on the laser.
82598-BASED ADAPTERS
@ -213,13 +213,13 @@ Additional Configurations
------------
The driver supports Jumbo Frames for all adapters. Jumbo Frames support is
enabled by changing the MTU to a value larger than the default of 1500.
The maximum value for the MTU is 16110. Use the ifconfig command to
The maximum value for the MTU is 16110. Use the ip command to
increase the MTU size. For example:
ifconfig ethx mtu 9000 up
ip link set dev ethx mtu 9000
The maximum MTU setting for Jumbo Frames is 16110. This value coincides
with the maximum Jumbo Frames size of 16128.
The maximum MTU setting for Jumbo Frames is 9710. This value coincides
with the maximum Jumbo Frames size of 9728.
Generic Receive Offload, aka GRO
--------------------------------

3
drivers/net/ethernet/intel/ixgbe/ixgbe.h
View File

@ -642,7 +642,6 @@ struct ixgbe_adapter {
#define IXGBE_FLAG2_RSS_FIELD_IPV4_UDP (u32)(1 << 8)
#define IXGBE_FLAG2_RSS_FIELD_IPV6_UDP (u32)(1 << 9)
#define IXGBE_FLAG2_PTP_PPS_ENABLED (u32)(1 << 10)
#define IXGBE_FLAG2_BRIDGE_MODE_VEB (u32)(1 << 11)
/* Tx fast path data */
int num_tx_queues;
@ -722,6 +721,8 @@ struct ixgbe_adapter {
u8 __iomem *io_addr; /* Mainly for iounmap use */
u32 wol;
u16 bridge_mode;
u16 eeprom_verh;
u16 eeprom_verl;
u16 eeprom_cap;

124
drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.c
View File

@ -71,6 +71,7 @@ int ixgbe_fcoe_ddp_put(struct net_device *netdev, u16 xid)
struct ixgbe_fcoe *fcoe;
struct ixgbe_adapter *adapter;
struct ixgbe_fcoe_ddp *ddp;
struct ixgbe_hw *hw;
u32 fcbuff;
if (!netdev)
@ -85,25 +86,51 @@ int ixgbe_fcoe_ddp_put(struct net_device *netdev, u16 xid)
if (!ddp->udl)
return 0;
hw = &adapter->hw;
len = ddp->len;
/* if there an error, force to invalidate ddp context */
if (ddp->err) {
spin_lock_bh(&fcoe->lock);
IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCFLT, 0);
IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCFLTRW,
/* if no error then skip ddp context invalidation */
if (!ddp->err)
goto skip_ddpinv;
if (hw->mac.type == ixgbe_mac_X550) {
/* X550 does not require DDP FCoE lock */
IXGBE_WRITE_REG(hw, IXGBE_FCDFC(0, xid), 0);
IXGBE_WRITE_REG(hw, IXGBE_FCDFC(3, xid),
(xid | IXGBE_FCFLTRW_WE));
IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCBUFF, 0);
IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCDMARW,
/* program FCBUFF */
IXGBE_WRITE_REG(hw, IXGBE_FCDDC(2, xid), 0);
/* program FCDMARW */
IXGBE_WRITE_REG(hw, IXGBE_FCDDC(3, xid),
(xid | IXGBE_FCDMARW_WE));
/* read FCBUFF to check context invalidated */
IXGBE_WRITE_REG(hw, IXGBE_FCDDC(3, xid),
(xid | IXGBE_FCDMARW_RE));
fcbuff = IXGBE_READ_REG(hw, IXGBE_FCDDC(2, xid));
} else {
/* other hardware requires DDP FCoE lock */
spin_lock_bh(&fcoe->lock);
IXGBE_WRITE_REG(hw, IXGBE_FCFLT, 0);
IXGBE_WRITE_REG(hw, IXGBE_FCFLTRW,
(xid | IXGBE_FCFLTRW_WE));
IXGBE_WRITE_REG(hw, IXGBE_FCBUFF, 0);
IXGBE_WRITE_REG(hw, IXGBE_FCDMARW,
(xid | IXGBE_FCDMARW_WE));
/* guaranteed to be invalidated after 100us */
IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCDMARW,
IXGBE_WRITE_REG(hw, IXGBE_FCDMARW,
(xid | IXGBE_FCDMARW_RE));
fcbuff = IXGBE_READ_REG(&adapter->hw, IXGBE_FCBUFF);
fcbuff = IXGBE_READ_REG(hw, IXGBE_FCBUFF);
spin_unlock_bh(&fcoe->lock);
if (fcbuff & IXGBE_FCBUFF_VALID)
udelay(100);
}
}
if (fcbuff & IXGBE_FCBUFF_VALID)
usleep_range(100, 150);
skip_ddpinv:
if (ddp->sgl)
dma_unmap_sg(&adapter->pdev->dev, ddp->sgl, ddp->sgc,
DMA_FROM_DEVICE);
@ -272,7 +299,6 @@ static int ixgbe_fcoe_ddp_setup(struct net_device *netdev, u16 xid,
/* program DMA context */
hw = &adapter->hw;
spin_lock_bh(&fcoe->lock);
/* turn on last frame indication for target mode as FCP_RSPtarget is
* supposed to send FCP_RSP when it is done. */
@ -283,16 +309,33 @@ static int ixgbe_fcoe_ddp_setup(struct net_device *netdev, u16 xid,
IXGBE_WRITE_REG(hw, IXGBE_FCRXCTRL, fcrxctl);
}
IXGBE_WRITE_REG(hw, IXGBE_FCPTRL, ddp->udp & DMA_BIT_MASK(32));
IXGBE_WRITE_REG(hw, IXGBE_FCPTRH, (u64)ddp->udp >> 32);
IXGBE_WRITE_REG(hw, IXGBE_FCBUFF, fcbuff);
IXGBE_WRITE_REG(hw, IXGBE_FCDMARW, fcdmarw);
/* program filter context */
IXGBE_WRITE_REG(hw, IXGBE_FCPARAM, 0);
IXGBE_WRITE_REG(hw, IXGBE_FCFLT, IXGBE_FCFLT_VALID);
IXGBE_WRITE_REG(hw, IXGBE_FCFLTRW, fcfltrw);
if (hw->mac.type == ixgbe_mac_X550) {
/* X550 does not require DDP lock */
spin_unlock_bh(&fcoe->lock);
IXGBE_WRITE_REG(hw, IXGBE_FCDDC(0, xid),
ddp->udp & DMA_BIT_MASK(32));
IXGBE_WRITE_REG(hw, IXGBE_FCDDC(1, xid), (u64)ddp->udp >> 32);
IXGBE_WRITE_REG(hw, IXGBE_FCDDC(2, xid), fcbuff);
IXGBE_WRITE_REG(hw, IXGBE_FCDDC(3, xid), fcdmarw);
/* program filter context */
IXGBE_WRITE_REG(hw, IXGBE_FCDFC(0, xid), IXGBE_FCFLT_VALID);
IXGBE_WRITE_REG(hw, IXGBE_FCDFC(1, xid), 0);
IXGBE_WRITE_REG(hw, IXGBE_FCDFC(3, xid), fcfltrw);
} else {
/* DDP lock for indirect DDP context access */
spin_lock_bh(&fcoe->lock);
IXGBE_WRITE_REG(hw, IXGBE_FCPTRL, ddp->udp & DMA_BIT_MASK(32));
IXGBE_WRITE_REG(hw, IXGBE_FCPTRH, (u64)ddp->udp >> 32);
IXGBE_WRITE_REG(hw, IXGBE_FCBUFF, fcbuff);
IXGBE_WRITE_REG(hw, IXGBE_FCDMARW, fcdmarw);
/* program filter context */
IXGBE_WRITE_REG(hw, IXGBE_FCPARAM, 0);
IXGBE_WRITE_REG(hw, IXGBE_FCFLT, IXGBE_FCFLT_VALID);
IXGBE_WRITE_REG(hw, IXGBE_FCFLTRW, fcfltrw);
spin_unlock_bh(&fcoe->lock);
}
return 1;
@ -371,6 +414,7 @@ int ixgbe_fcoe_ddp(struct ixgbe_adapter *adapter,
struct fcoe_crc_eof *crc;
__le32 fcerr = ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_FCERR);
__le32 ddp_err;
int ddp_max;
u32 fctl;
u16 xid;
@ -392,7 +436,11 @@ int ixgbe_fcoe_ddp(struct ixgbe_adapter *adapter,
else
xid = be16_to_cpu(fh->fh_rx_id);
if (xid >= IXGBE_FCOE_DDP_MAX)
ddp_max = IXGBE_FCOE_DDP_MAX;
/* X550 has different DDP Max limit */
if (adapter->hw.mac.type == ixgbe_mac_X550)
ddp_max = IXGBE_FCOE_DDP_MAX_X550;
if (xid >= ddp_max)
return -EINVAL;
fcoe = &adapter->fcoe;
@ -612,7 +660,8 @@ void ixgbe_configure_fcoe(struct ixgbe_adapter *adapter)
{
struct ixgbe_ring_feature *fcoe = &adapter->ring_feature[RING_F_FCOE];
struct ixgbe_hw *hw = &adapter->hw;
int i, fcoe_q, fcoe_i;
int i, fcoe_q, fcoe_i, fcoe_q_h = 0;
int fcreta_size;
u32 etqf;
/* Minimal functionality for FCoE requires at least CRC offloads */
@ -633,10 +682,23 @@ void ixgbe_configure_fcoe(struct ixgbe_adapter *adapter)
return;
/* Use one or more Rx queues for FCoE by redirection table */
for (i = 0; i < IXGBE_FCRETA_SIZE; i++) {
fcreta_size = IXGBE_FCRETA_SIZE;
if (adapter->hw.mac.type == ixgbe_mac_X550)
fcreta_size = IXGBE_FCRETA_SIZE_X550;
for (i = 0; i < fcreta_size; i++) {
if (adapter->hw.mac.type == ixgbe_mac_X550) {
int fcoe_i_h = fcoe->offset + ((i + fcreta_size) %
fcoe->indices);
fcoe_q_h = adapter->rx_ring[fcoe_i_h]->reg_idx;
fcoe_q_h = (fcoe_q_h << IXGBE_FCRETA_ENTRY_HIGH_SHIFT) &
IXGBE_FCRETA_ENTRY_HIGH_MASK;
}
fcoe_i = fcoe->offset + (i % fcoe->indices);
fcoe_i &= IXGBE_FCRETA_ENTRY_MASK;
fcoe_q = adapter->rx_ring[fcoe_i]->reg_idx;
fcoe_q |= fcoe_q_h;
IXGBE_WRITE_REG(hw, IXGBE_FCRETA(i), fcoe_q);
}
IXGBE_WRITE_REG(hw, IXGBE_FCRECTL, IXGBE_FCRECTL_ENA);
@ -672,13 +734,18 @@ void ixgbe_configure_fcoe(struct ixgbe_adapter *adapter)
void ixgbe_free_fcoe_ddp_resources(struct ixgbe_adapter *adapter)
{
struct ixgbe_fcoe *fcoe = &adapter->fcoe;
int cpu, i;
int cpu, i, ddp_max;
/* do nothing if no DDP pools were allocated */
if (!fcoe->ddp_pool)
return;
for (i = 0; i < IXGBE_FCOE_DDP_MAX; i++)
ddp_max = IXGBE_FCOE_DDP_MAX;
/* X550 has different DDP Max limit */
if (adapter->hw.mac.type == ixgbe_mac_X550)
ddp_max = IXGBE_FCOE_DDP_MAX_X550;
for (i = 0; i < ddp_max; i++)
ixgbe_fcoe_ddp_put(adapter->netdev, i);
for_each_possible_cpu(cpu)
@ -758,6 +825,9 @@ static int ixgbe_fcoe_ddp_enable(struct ixgbe_adapter *adapter)
}
adapter->netdev->fcoe_ddp_xid = IXGBE_FCOE_DDP_MAX - 1;
/* X550 has different DDP Max limit */
if (adapter->hw.mac.type == ixgbe_mac_X550)
adapter->netdev->fcoe_ddp_xid = IXGBE_FCOE_DDP_MAX_X550 - 1;
return 0;
}

3
drivers/net/ethernet/intel/ixgbe/ixgbe_fcoe.h
View File

@ -46,6 +46,7 @@
#define IXGBE_FCBUFF_MAX 65536 /* 64KB max */
#define IXGBE_FCBUFF_MIN 4096 /* 4KB min */
#define IXGBE_FCOE_DDP_MAX 512 /* 9 bits xid */
#define IXGBE_FCOE_DDP_MAX_X550 2048 /* 11 bits xid */
/* Default traffic class to use for FCoE */
#define IXGBE_FCOE_DEFTC 3
@ -77,7 +78,7 @@ struct ixgbe_fcoe {
struct ixgbe_fcoe_ddp_pool __percpu *ddp_pool;
atomic_t refcnt;
spinlock_t lock;
struct ixgbe_fcoe_ddp ddp[IXGBE_FCOE_DDP_MAX];
struct ixgbe_fcoe_ddp ddp[IXGBE_FCOE_DDP_MAX_X550];
void *extra_ddp_buffer;
dma_addr_t extra_ddp_buffer_dma;
unsigned long mode;

107
drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
View File

@ -3553,7 +3553,7 @@ static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), (~0) << vf_shift);
IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
if (adapter->flags2 & IXGBE_FLAG2_BRIDGE_MODE_VEB)
if (adapter->bridge_mode == BRIDGE_MODE_VEB)
IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
/* Map PF MAC address in RAR Entry 0 to first pool following VFs */
@ -7870,6 +7870,80 @@ static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
return ndo_dflt_fdb_add(ndm, tb, dev, addr, vid, flags);
}
/**
* ixgbe_configure_bridge_mode - set various bridge modes
* @adapter - the private structure
* @mode - requested bridge mode
*
* Configure some settings require for various bridge modes.
**/
static int ixgbe_configure_bridge_mode(struct ixgbe_adapter *adapter,
__u16 mode)
{
struct ixgbe_hw *hw = &adapter->hw;
unsigned int p, num_pools;
u32 vmdctl;
switch (mode) {
case BRIDGE_MODE_VEPA:
/* disable Tx loopback, rely on switch hairpin mode */
IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, 0);
/* must enable Rx switching replication to allow multicast
* packet reception on all VFs, and to enable source address
* pruning.
*/
vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
vmdctl |= IXGBE_VT_CTL_REPLEN;
IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
/* enable Rx source address pruning. Note, this requires
* replication to be enabled or else it does nothing.
*/
num_pools = adapter->num_vfs + adapter->num_rx_pools;
for (p = 0; p < num_pools; p++) {
if (hw->mac.ops.set_source_address_pruning)
hw->mac.ops.set_source_address_pruning(hw,
true,
p);
}
break;
case BRIDGE_MODE_VEB:
/* enable Tx loopback for internal VF/PF communication */
IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC,
IXGBE_PFDTXGSWC_VT_LBEN);
/* disable Rx switching replication unless we have SR-IOV
* virtual functions
*/
vmdctl = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
if (!adapter->num_vfs)
vmdctl &= ~IXGBE_VT_CTL_REPLEN;
IXGBE_WRITE_REG(hw, IXGBE_VMD_CTL, vmdctl);
/* disable Rx source address pruning, since we don't expect to
* be receiving external loopback of our transmitted frames.
*/
num_pools = adapter->num_vfs + adapter->num_rx_pools;
for (p = 0; p < num_pools; p++) {
if (hw->mac.ops.set_source_address_pruning)
hw->mac.ops.set_source_address_pruning(hw,
false,
p);
}
break;
default:
return -EINVAL;
}
adapter->bridge_mode = mode;
e_info(drv, "enabling bridge mode: %s\n",
mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
return 0;
}
static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
struct nlmsghdr *nlh, u16 flags)
{
@ -7885,8 +7959,8 @@ static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
return -EINVAL;
nla_for_each_nested(attr, br_spec, rem) {
u32 status;
__u16 mode;
u32 reg = 0;
if (nla_type(attr) != IFLA_BRIDGE_MODE)
continue;
@ -7895,19 +7969,11 @@ static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
return -EINVAL;
mode = nla_get_u16(attr);
if (mode == BRIDGE_MODE_VEPA) {
reg = 0;
adapter->flags2 &= ~IXGBE_FLAG2_BRIDGE_MODE_VEB;
} else if (mode == BRIDGE_MODE_VEB) {
reg = IXGBE_PFDTXGSWC_VT_LBEN;
adapter->flags2 |= IXGBE_FLAG2_BRIDGE_MODE_VEB;
} else
return -EINVAL;
status = ixgbe_configure_bridge_mode(adapter, mode);
if (status)
return status;
IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, reg);
e_info(drv, "enabling bridge mode: %s\n",
mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
break;
}
return 0;
@ -7918,17 +7984,12 @@ static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
u32 filter_mask)
{
struct ixgbe_adapter *adapter = netdev_priv(dev);
u16 mode;
if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
return 0;
if (adapter->flags2 & IXGBE_FLAG2_BRIDGE_MODE_VEB)
mode = BRIDGE_MODE_VEB;
else
mode = BRIDGE_MODE_VEPA;
return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0);
return ndo_dflt_bridge_getlink(skb, pid, seq, dev,
adapter->bridge_mode, 0, 0);
}
static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
@ -8394,7 +8455,6 @@ skip_sriov:
NETIF_F_IPV6_CSUM |
NETIF_F_HW_VLAN_CTAG_TX |
NETIF_F_HW_VLAN_CTAG_RX |
NETIF_F_HW_VLAN_CTAG_FILTER |
NETIF_F_TSO |
NETIF_F_TSO6 |
NETIF_F_RXHASH |
@ -8416,6 +8476,7 @@ skip_sriov:
}
netdev->hw_features |= NETIF_F_RXALL;
netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
netdev->vlan_features |= NETIF_F_TSO;
netdev->vlan_features |= NETIF_F_TSO6;
@ -8977,8 +9038,6 @@ static void __exit ixgbe_exit_module(void)
pci_unregister_driver(&ixgbe_driver);
ixgbe_dbg_exit();
rcu_barrier(); /* Wait for completion of call_rcu()'s */
}
#ifdef CONFIG_IXGBE_DCA

3
drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
View File

@ -36,6 +36,7 @@
#include <linux/ip.h>
#include <linux/tcp.h>
#include <linux/ipv6.h>
#include <linux/if_bridge.h>
#ifdef NETIF_F_HW_VLAN_CTAG_TX
#include <linux/if_vlan.h>
#endif
@ -79,7 +80,7 @@ static int __ixgbe_enable_sriov(struct ixgbe_adapter *adapter)
/* Initialize default switching mode VEB */
IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
adapter->flags2 |= IXGBE_FLAG2_BRIDGE_MODE_VEB;
adapter->bridge_mode = BRIDGE_MODE_VEB;
/* If call to enable VFs succeeded then allocate memory
* for per VF control structures.

13
drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
View File

@ -285,6 +285,8 @@ struct ixgbe_thermal_sensor_data {
#define IXGBE_VLVF(_i) (0x0F100 + ((_i) * 4)) /* 64 of these (0-63) */
#define IXGBE_VLVFB(_i) (0x0F200 + ((_i) * 4)) /* 128 of these (0-127) */
#define IXGBE_VMVIR(_i) (0x08000 + ((_i) * 4)) /* 64 of these (0-63) */
#define IXGBE_PFFLPL 0x050B0
#define IXGBE_PFFLPH 0x050B4
#define IXGBE_VT_CTL 0x051B0
#define IXGBE_PFMAILBOX(_i) (0x04B00 + (4 * (_i))) /* 64 total */
#define IXGBE_PFMBMEM(_i) (0x13000 + (64 * (_i))) /* 64 Mailboxes, 16 DW each */
@ -608,6 +610,8 @@ struct ixgbe_thermal_sensor_data {
#define IXGBE_RTTBCNRM 0x04980
#define IXGBE_RTTQCNRM 0x04980
/* FCoE Direct DMA Context */
#define IXGBE_FCDDC(_i, _j) (0x20000 + ((_i) * 0x4) + ((_j) * 0x10))
/* FCoE DMA Context Registers */
#define IXGBE_FCPTRL 0x02410 /* FC User Desc. PTR Low */
#define IXGBE_FCPTRH 0x02414 /* FC USer Desc. PTR High */
@ -634,6 +638,9 @@ struct ixgbe_thermal_sensor_data {
#define IXGBE_TSOFF 0x04A98 /* Tx FC SOF */
#define IXGBE_REOFF 0x05158 /* Rx FC EOF */
#define IXGBE_RSOFF 0x051F8 /* Rx FC SOF */
/* FCoE Direct Filter Context */
#define IXGBE_FCDFC(_i, _j) (0x28000 + ((_i) * 0x4) + ((_j) * 0x10))
#define IXGBE_FCDFCD(_i) (0x30000 + ((_i) * 0x4))
/* FCoE Filter Context Registers */
#define IXGBE_FCFLT 0x05108 /* FC FLT Context */
#define IXGBE_FCFLTRW 0x05110 /* FC Filter RW Control */
@ -664,6 +671,10 @@ struct ixgbe_thermal_sensor_data {
#define IXGBE_FCRECTL_ENA 0x1 /* FCoE Redir Table Enable */
#define IXGBE_FCRETA_SIZE 8 /* Max entries in FCRETA */
#define IXGBE_FCRETA_ENTRY_MASK 0x0000007f /* 7 bits for the queue index */
#define IXGBE_FCRETA_SIZE_X550 32 /* Max entries in FCRETA */
/* Higher 7 bits for the queue index */
#define IXGBE_FCRETA_ENTRY_HIGH_MASK 0x007F0000
#define IXGBE_FCRETA_ENTRY_HIGH_SHIFT 16
/* Stats registers */
#define IXGBE_CRCERRS 0x04000
@ -3069,6 +3080,8 @@ struct ixgbe_mac_operations {
s32 (*init_thermal_sensor_thresh)(struct ixgbe_hw *hw);
void (*disable_rx)(struct ixgbe_hw *hw);
void (*enable_rx)(struct ixgbe_hw *hw);
void (*set_source_address_pruning)(struct ixgbe_hw *, bool,
unsigned int);
void (*set_ethertype_anti_spoofing)(struct ixgbe_hw *, bool, int);
/* DMA Coalescing */

29
drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c
View File

@ -1363,6 +1363,33 @@ static void ixgbe_set_ethertype_anti_spoofing_X550(struct ixgbe_hw *hw,
IXGBE_WRITE_REG(hw, IXGBE_PFVFSPOOF(vf_target_reg), pfvfspoof);
}
/** ixgbe_set_source_address_pruning_X550 - Enable/Disbale src address pruning
* @hw: pointer to hardware structure
* @enable: enable or disable source address pruning
* @pool: Rx pool to set source address pruning for
**/
static void ixgbe_set_source_address_pruning_X550(struct ixgbe_hw *hw,
bool enable,
unsigned int pool)
{
u64 pfflp;
/* max rx pool is 63 */
if (pool > 63)
return;
pfflp = (u64)IXGBE_READ_REG(hw, IXGBE_PFFLPL);
pfflp |= (u64)IXGBE_READ_REG(hw, IXGBE_PFFLPH) << 32;
if (enable)
pfflp |= (1ULL << pool);
else
pfflp &= ~(1ULL << pool);
IXGBE_WRITE_REG(hw, IXGBE_PFFLPL, (u32)pfflp);
IXGBE_WRITE_REG(hw, IXGBE_PFFLPH, (u32)(pfflp >> 32));
}
#define X550_COMMON_MAC \
.init_hw = &ixgbe_init_hw_generic, \
.start_hw = &ixgbe_start_hw_X540, \
@ -1397,6 +1424,8 @@ static void ixgbe_set_ethertype_anti_spoofing_X550(struct ixgbe_hw *hw,
.init_uta_tables = &ixgbe_init_uta_tables_generic, \
.set_mac_anti_spoofing = &ixgbe_set_mac_anti_spoofing, \
.set_vlan_anti_spoofing = &ixgbe_set_vlan_anti_spoofing, \
.set_source_address_pruning = \
&ixgbe_set_source_address_pruning_X550, \
.set_ethertype_anti_spoofing = \
&ixgbe_set_ethertype_anti_spoofing_X550, \
.acquire_swfw_sync = &ixgbe_acquire_swfw_sync_X540, \