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cxl fixes for v6.11-rc5
- Check dport for RCH topology before accessing pci_host_bridge = Skip unnecessary dport setup for cxl-test to fix KASAN warning -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE5DAy15EJMCV1R6v9YGjFFmlTOEoFAmbEtGcACgkQYGjFFmlT OEo5oQ//QhW/5SRuCjvj9tpAyC+215VC1KcH635hoEs4vjcrkHFKAlTue1c5T7z+ //S+t2bHgvrZPOnhmQuN2GSaSKih5j/o+hEM278AqtrP1hmejxkZ35DV/yD6WVzN 9m5bz32NFLUHW777x6bJGZUQy2VBt+lDp0xi/mZ2faaI8kJQ6DTIxUE/FV99/Rfy VMZCOnQrWEBabx/7pKhJtPQYsAPlLiQz+8r7fcDEtWE4FqkjYFrsyztgeMF1WGDO nkXiHs+W0zO8qJrzk+Iw/bVEmBBvMu3dpD9eitBvhHQ/VJFZoB+Z3jj7nxjUlHvT Ao5VjfcvjwLnF6DWtSVPn7zeYjg0ScGPfyfCwdvzl4aBZb6RSzP544vBRBMyfthX JjcupzARe6oGXIvO1xDDXxwZ9R1RBDEhpjES12b0wsMuG8dY26cvGmkRSf5S9/IQ zz++Cqrke0uMf/9fOPJWANMND9Al7WfS5+6G4GdPGoXfTLwWyL71D3M5Nk9TgyIA 635cctLBQS/5ekGDQ+vO99jCR4x8YqkD0r2q0m1UZoQw7S3HEa629BBwW25nTFU3 /lpsDg5+tnE/jZns8GiHCt0XaimQKj3BjlAuoiDohk1YYXL6H0RUgFRdb4yx6tIs C4EU6Yj3nzMm614zuUHIfmCS63yllmxpanfgxjRXswCHgWLBu3A= =X26j -----END PGP SIGNATURE----- Merge tag 'cxl-fixes-6.11-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl Pull cxl fixes from Dave Jiang: "Check for RCH dport before accessing pci_host_bridge and a fix to address a KASAN warning for the cxl regression test suite cxl-test" * tag 'cxl-fixes-6.11-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl: cxl/test: Skip cxl_setup_parent_dport() for emulated dports cxl/pci: Get AER capability address from RCRB only for RCH dport
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commit
521b1e7f4c
@ -834,11 +834,13 @@ static void cxl_disable_rch_root_ints(struct cxl_dport *dport)
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void cxl_setup_parent_dport(struct device *host, struct cxl_dport *dport)
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{
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struct device *dport_dev = dport->dport_dev;
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struct pci_host_bridge *host_bridge;
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host_bridge = to_pci_host_bridge(dport_dev);
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if (host_bridge->native_aer)
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dport->rcrb.aer_cap = cxl_rcrb_to_aer(dport_dev, dport->rcrb.base);
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if (dport->rch) {
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struct pci_host_bridge *host_bridge = to_pci_host_bridge(dport_dev);
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if (host_bridge->native_aer)
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dport->rcrb.aer_cap = cxl_rcrb_to_aer(dport_dev, dport->rcrb.base);
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}
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dport->reg_map.host = host;
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cxl_dport_map_regs(dport);
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@ -14,6 +14,7 @@ ldflags-y += --wrap=cxl_dvsec_rr_decode
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ldflags-y += --wrap=devm_cxl_add_rch_dport
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ldflags-y += --wrap=cxl_rcd_component_reg_phys
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ldflags-y += --wrap=cxl_endpoint_parse_cdat
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ldflags-y += --wrap=cxl_setup_parent_dport
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DRIVERS := ../../../drivers
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CXL_SRC := $(DRIVERS)/cxl
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@ -299,6 +299,18 @@ void __wrap_cxl_endpoint_parse_cdat(struct cxl_port *port)
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}
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EXPORT_SYMBOL_NS_GPL(__wrap_cxl_endpoint_parse_cdat, CXL);
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void __wrap_cxl_setup_parent_dport(struct device *host, struct cxl_dport *dport)
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{
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int index;
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struct cxl_mock_ops *ops = get_cxl_mock_ops(&index);
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if (!ops || !ops->is_mock_port(dport->dport_dev))
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cxl_setup_parent_dport(host, dport);
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put_cxl_mock_ops(index);
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}
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EXPORT_SYMBOL_NS_GPL(__wrap_cxl_setup_parent_dport, CXL);
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MODULE_LICENSE("GPL v2");
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MODULE_IMPORT_NS(ACPI);
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MODULE_IMPORT_NS(CXL);
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