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serial: mvebu-uart: use a generic way to access the registers
There are two UART ports on Armada3700. The second UART is based on the first one, plus additional features, but it has a different register layout (some bit fields are also moved inside the registers). Clearly separate register offsets and bit fields that differ between the standard and the extended IP. Access them in a generic way. Rename the defines with the "STD" prefix for future distinction with "EXT" defines. Point to these defines in the main driver data structure. The early console only uses the standard port (not extended). Suggested-by: Wilson Ding <dingwei@marvell.com> Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Miquel Raynal
Greg Kroah-Hartman
parent
94228f9561
commit
5218d76958
@ -38,46 +38,32 @@
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#include <linux/tty_flip.h>
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/* Register Map */
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#define UART_RBR 0x00
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#define RBR_BRK_DET BIT(15)
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#define RBR_FRM_ERR_DET BIT(14)
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#define RBR_PAR_ERR_DET BIT(13)
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#define RBR_OVR_ERR_DET BIT(12)
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#define UART_STD_RBR 0x00
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#define UART_TSH 0x04
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#define UART_STD_TSH 0x04
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#define UART_CTRL 0x08
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#define UART_STD_CTRL1 0x08
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#define CTRL_SOFT_RST BIT(31)
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#define CTRL_TXFIFO_RST BIT(15)
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#define CTRL_RXFIFO_RST BIT(14)
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#define CTRL_ST_MIRR_EN BIT(13)
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#define CTRL_LPBK_EN BIT(12)
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#define CTRL_SND_BRK_SEQ BIT(11)
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#define CTRL_PAR_EN BIT(10)
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#define CTRL_TWO_STOP BIT(9)
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#define CTRL_TX_HFL_INT BIT(8)
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#define CTRL_RX_HFL_INT BIT(7)
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#define CTRL_TX_EMP_INT BIT(6)
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#define CTRL_TX_RDY_INT BIT(5)
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#define CTRL_RX_RDY_INT BIT(4)
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#define CTRL_BRK_DET_INT BIT(3)
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#define CTRL_FRM_ERR_INT BIT(2)
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#define CTRL_PAR_ERR_INT BIT(1)
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#define CTRL_OVR_ERR_INT BIT(0)
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#define CTRL_RX_INT (CTRL_RX_RDY_INT | CTRL_BRK_DET_INT |\
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CTRL_FRM_ERR_INT | CTRL_PAR_ERR_INT | CTRL_OVR_ERR_INT)
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#define CTRL_BRK_INT (CTRL_BRK_DET_INT | CTRL_FRM_ERR_INT | \
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CTRL_PAR_ERR_INT | CTRL_OVR_ERR_INT)
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#define UART_STAT 0x0c
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#define UART_STD_CTRL2 UART_STD_CTRL1
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#define CTRL_STD_TX_RDY_INT BIT(5)
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#define CTRL_STD_RX_RDY_INT BIT(4)
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#define UART_STAT 0x0C
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#define STAT_TX_FIFO_EMP BIT(13)
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#define STAT_RX_FIFO_EMP BIT(12)
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#define STAT_TX_FIFO_FUL BIT(11)
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#define STAT_TX_FIFO_HFL BIT(10)
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#define STAT_RX_TOGL BIT(9)
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#define STAT_RX_FIFO_FUL BIT(8)
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#define STAT_RX_FIFO_HFL BIT(7)
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#define STAT_TX_EMP BIT(6)
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#define STAT_TX_RDY BIT(5)
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#define STAT_RX_RDY BIT(4)
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#define STAT_STD_TX_RDY BIT(5)
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#define STAT_STD_RX_RDY BIT(4)
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#define STAT_BRK_DET BIT(3)
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#define STAT_FRM_ERR BIT(2)
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#define STAT_PAR_ERR BIT(1)
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@ -92,13 +78,55 @@
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#define MVEBU_UART_TYPE "mvebu-uart"
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#define DRIVER_NAME "mvebu_serial"
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static struct uart_port mvebu_uart_ports[MVEBU_NR_UARTS];
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struct mvebu_uart_data {
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struct uart_port *port;
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struct clk *clk;
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/* Register offsets, different depending on the UART */
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struct uart_regs_layout {
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unsigned int rbr;
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unsigned int tsh;
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unsigned int ctrl;
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unsigned int intr;
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};
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/* Diverging flags */
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struct uart_flags {
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unsigned int ctrl_tx_rdy_int;
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unsigned int ctrl_rx_rdy_int;
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unsigned int stat_tx_rdy;
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unsigned int stat_rx_rdy;
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};
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/* Driver data, a structure for each UART port */
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struct mvebu_uart_driver_data {
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bool is_ext;
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struct uart_regs_layout regs;
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struct uart_flags flags;
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};
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/* MVEBU UART driver structure */
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struct mvebu_uart {
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struct uart_port *port;
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struct clk *clk;
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struct mvebu_uart_driver_data *data;
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};
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static struct mvebu_uart *to_mvuart(struct uart_port *port)
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{
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return (struct mvebu_uart *)port->private_data;
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}
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#define IS_EXTENDED(port) (to_mvuart(port)->data->is_ext)
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#define UART_RBR(port) (to_mvuart(port)->data->regs.rbr)
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#define UART_TSH(port) (to_mvuart(port)->data->regs.tsh)
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#define UART_CTRL(port) (to_mvuart(port)->data->regs.ctrl)
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#define UART_INTR(port) (to_mvuart(port)->data->regs.intr)
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#define CTRL_TX_RDY_INT(port) (to_mvuart(port)->data->flags.ctrl_tx_rdy_int)
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#define CTRL_RX_RDY_INT(port) (to_mvuart(port)->data->flags.ctrl_rx_rdy_int)
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#define STAT_TX_RDY(port) (to_mvuart(port)->data->flags.stat_tx_rdy)
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#define STAT_RX_RDY(port) (to_mvuart(port)->data->flags.stat_rx_rdy)
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static struct uart_port mvebu_uart_ports[MVEBU_NR_UARTS];
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/* Core UART Driver Operations */
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static unsigned int mvebu_uart_tx_empty(struct uart_port *port)
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{
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@ -128,26 +156,31 @@ static void mvebu_uart_set_mctrl(struct uart_port *port,
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static void mvebu_uart_stop_tx(struct uart_port *port)
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{
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unsigned int ctl = readl(port->membase + UART_CTRL);
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unsigned int ctl = readl(port->membase + UART_INTR(port));
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ctl &= ~CTRL_TX_RDY_INT;
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writel(ctl, port->membase + UART_CTRL);
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ctl &= ~CTRL_TX_RDY_INT(port);
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writel(ctl, port->membase + UART_INTR(port));
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}
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static void mvebu_uart_start_tx(struct uart_port *port)
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{
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unsigned int ctl = readl(port->membase + UART_CTRL);
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unsigned int ctl = readl(port->membase + UART_INTR(port));
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ctl |= CTRL_TX_RDY_INT;
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writel(ctl, port->membase + UART_CTRL);
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ctl |= CTRL_TX_RDY_INT(port);
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writel(ctl, port->membase + UART_INTR(port));
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}
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static void mvebu_uart_stop_rx(struct uart_port *port)
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{
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unsigned int ctl = readl(port->membase + UART_CTRL);
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unsigned int ctl;
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ctl &= ~CTRL_RX_INT;
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writel(ctl, port->membase + UART_CTRL);
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ctl = readl(port->membase + UART_CTRL(port));
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ctl &= ~CTRL_BRK_INT;
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writel(ctl, port->membase + UART_CTRL(port));
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ctl = readl(port->membase + UART_INTR(port));
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ctl &= ~CTRL_RX_RDY_INT(port);
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writel(ctl, port->membase + UART_INTR(port));
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}
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static void mvebu_uart_break_ctl(struct uart_port *port, int brk)
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@ -156,12 +189,12 @@ static void mvebu_uart_break_ctl(struct uart_port *port, int brk)
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unsigned long flags;
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spin_lock_irqsave(&port->lock, flags);
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ctl = readl(port->membase + UART_CTRL);
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ctl = readl(port->membase + UART_CTRL(port));
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if (brk == -1)
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ctl |= CTRL_SND_BRK_SEQ;
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else
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ctl &= ~CTRL_SND_BRK_SEQ;
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writel(ctl, port->membase + UART_CTRL);
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writel(ctl, port->membase + UART_CTRL(port));
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spin_unlock_irqrestore(&port->lock, flags);
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}
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@ -172,8 +205,8 @@ static void mvebu_uart_rx_chars(struct uart_port *port, unsigned int status)
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char flag = 0;
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do {
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if (status & STAT_RX_RDY) {
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ch = readl(port->membase + UART_RBR);
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if (status & STAT_RX_RDY(port)) {
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ch = readl(port->membase + UART_RBR(port));
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ch &= 0xff;
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flag = TTY_NORMAL;
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port->icount.rx++;
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@ -199,7 +232,7 @@ static void mvebu_uart_rx_chars(struct uart_port *port, unsigned int status)
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goto ignore_char;
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if (status & port->ignore_status_mask & STAT_PAR_ERR)
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status &= ~STAT_RX_RDY;
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status &= ~STAT_RX_RDY(port);
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status &= port->read_status_mask;
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@ -208,7 +241,7 @@ static void mvebu_uart_rx_chars(struct uart_port *port, unsigned int status)
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status &= ~port->ignore_status_mask;
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if (status & STAT_RX_RDY)
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if (status & STAT_RX_RDY(port))
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tty_insert_flip_char(tport, ch, flag);
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if (status & STAT_BRK_DET)
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@ -222,7 +255,7 @@ static void mvebu_uart_rx_chars(struct uart_port *port, unsigned int status)
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ignore_char:
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status = readl(port->membase + UART_STAT);
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} while (status & (STAT_RX_RDY | STAT_BRK_DET));
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} while (status & (STAT_RX_RDY(port) | STAT_BRK_DET));
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tty_flip_buffer_push(tport);
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}
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@ -234,7 +267,7 @@ static void mvebu_uart_tx_chars(struct uart_port *port, unsigned int status)
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unsigned int st;
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if (port->x_char) {
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writel(port->x_char, port->membase + UART_TSH);
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writel(port->x_char, port->membase + UART_TSH(port));
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port->icount.tx++;
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port->x_char = 0;
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return;
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@ -246,7 +279,7 @@ static void mvebu_uart_tx_chars(struct uart_port *port, unsigned int status)
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}
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for (count = 0; count < port->fifosize; count++) {
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writel(xmit->buf[xmit->tail], port->membase + UART_TSH);
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writel(xmit->buf[xmit->tail], port->membase + UART_TSH(port));
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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port->icount.tx++;
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@ -270,10 +303,11 @@ static irqreturn_t mvebu_uart_isr(int irq, void *dev_id)
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struct uart_port *port = (struct uart_port *)dev_id;
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unsigned int st = readl(port->membase + UART_STAT);
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if (st & (STAT_RX_RDY | STAT_OVR_ERR | STAT_FRM_ERR | STAT_BRK_DET))
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if (st & (STAT_RX_RDY(port) | STAT_OVR_ERR | STAT_FRM_ERR |
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STAT_BRK_DET))
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mvebu_uart_rx_chars(port, st);
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if (st & STAT_TX_RDY)
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if (st & STAT_TX_RDY(port))
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mvebu_uart_tx_chars(port, st);
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return IRQ_HANDLED;
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@ -281,12 +315,17 @@ static irqreturn_t mvebu_uart_isr(int irq, void *dev_id)
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static int mvebu_uart_startup(struct uart_port *port)
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{
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unsigned int ctl;
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int ret;
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writel(CTRL_TXFIFO_RST | CTRL_RXFIFO_RST,
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port->membase + UART_CTRL);
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port->membase + UART_CTRL(port));
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udelay(1);
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writel(CTRL_RX_INT, port->membase + UART_CTRL);
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writel(CTRL_BRK_INT, port->membase + UART_CTRL(port));
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ctl = readl(port->membase + UART_INTR(port));
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ctl |= CTRL_RX_RDY_INT(port);
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writel(ctl, port->membase + UART_INTR(port));
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ret = request_irq(port->irq, mvebu_uart_isr, port->irqflags,
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DRIVER_NAME, port);
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@ -300,7 +339,7 @@ static int mvebu_uart_startup(struct uart_port *port)
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static void mvebu_uart_shutdown(struct uart_port *port)
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{
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writel(0, port->membase + UART_CTRL);
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writel(0, port->membase + UART_INTR(port));
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free_irq(port->irq, port);
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}
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@ -314,8 +353,8 @@ static void mvebu_uart_set_termios(struct uart_port *port,
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spin_lock_irqsave(&port->lock, flags);
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port->read_status_mask = STAT_RX_RDY | STAT_OVR_ERR |
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STAT_TX_RDY | STAT_TX_FIFO_FUL;
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port->read_status_mask = STAT_RX_RDY(port) | STAT_OVR_ERR |
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STAT_TX_RDY(port) | STAT_TX_FIFO_FUL;
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if (termios->c_iflag & INPCK)
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port->read_status_mask |= STAT_FRM_ERR | STAT_PAR_ERR;
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@ -326,7 +365,7 @@ static void mvebu_uart_set_termios(struct uart_port *port,
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STAT_FRM_ERR | STAT_PAR_ERR | STAT_OVR_ERR;
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if ((termios->c_cflag & CREAD) == 0)
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port->ignore_status_mask |= STAT_RX_RDY | STAT_BRK_ERR;
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port->ignore_status_mask |= STAT_RX_RDY(port) | STAT_BRK_ERR;
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if (old)
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tty_termios_copy_hw(termios, old);
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@ -357,10 +396,10 @@ static int mvebu_uart_get_poll_char(struct uart_port *port)
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{
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unsigned int st = readl(port->membase + UART_STAT);
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if (!(st & STAT_RX_RDY))
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if (!(st & STAT_RX_RDY(port)))
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return NO_POLL_CHAR;
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return readl(port->membase + UART_RBR);
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return readl(port->membase + UART_RBR(port));
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}
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static void mvebu_uart_put_poll_char(struct uart_port *port, unsigned char c)
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@ -376,7 +415,7 @@ static void mvebu_uart_put_poll_char(struct uart_port *port, unsigned char c)
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udelay(1);
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}
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writel(c, port->membase + UART_TSH);
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writel(c, port->membase + UART_TSH(port));
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}
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#endif
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@ -414,7 +453,8 @@ static void mvebu_uart_putc(struct uart_port *port, int c)
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break;
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}
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writel(c, port->membase + UART_TSH);
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/* At early stage, DT is not parsed yet, only use UART0 */
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writel(c, port->membase + UART_STD_TSH);
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for (;;) {
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st = readl(port->membase + UART_STAT);
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@ -459,7 +499,7 @@ static void wait_for_xmitr(struct uart_port *port)
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static void mvebu_uart_console_putchar(struct uart_port *port, int ch)
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{
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wait_for_xmitr(port);
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writel(ch, port->membase + UART_TSH);
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writel(ch, port->membase + UART_TSH(port));
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}
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static void mvebu_uart_console_write(struct console *co, const char *s,
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@ -467,7 +507,7 @@ static void mvebu_uart_console_write(struct console *co, const char *s,
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{
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struct uart_port *port = &mvebu_uart_ports[co->index];
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unsigned long flags;
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unsigned int ier;
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unsigned int ier, intr, ctl;
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int locked = 1;
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if (oops_in_progress)
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@ -475,16 +515,23 @@ static void mvebu_uart_console_write(struct console *co, const char *s,
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else
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spin_lock_irqsave(&port->lock, flags);
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ier = readl(port->membase + UART_CTRL) &
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(CTRL_RX_INT | CTRL_TX_RDY_INT);
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writel(0, port->membase + UART_CTRL);
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ier = readl(port->membase + UART_CTRL(port)) & CTRL_BRK_INT;
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intr = readl(port->membase + UART_INTR(port)) &
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(CTRL_RX_RDY_INT(port) | CTRL_TX_RDY_INT(port));
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writel(0, port->membase + UART_CTRL(port));
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writel(0, port->membase + UART_INTR(port));
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uart_console_write(port, s, count, mvebu_uart_console_putchar);
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wait_for_xmitr(port);
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if (ier)
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writel(ier, port->membase + UART_CTRL);
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writel(ier, port->membase + UART_CTRL(port));
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if (intr) {
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ctl = intr | readl(port->membase + UART_INTR(port));
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writel(ctl, port->membase + UART_INTR(port));
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}
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if (locked)
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spin_unlock_irqrestore(&port->lock, flags);
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@ -547,6 +594,8 @@ static struct uart_driver mvebu_uart_driver = {
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#endif
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};
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static const struct of_device_id mvebu_uart_of_match[];
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/* Counter to keep track of each UART port id when not using CONFIG_OF */
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static int uart_num_counter;
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@ -554,8 +603,10 @@ static int mvebu_uart_probe(struct platform_device *pdev)
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{
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struct resource *reg = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
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const struct of_device_id *match = of_match_device(mvebu_uart_of_match,
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&pdev->dev);
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struct uart_port *port;
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struct mvebu_uart_data *data;
|
||||
struct mvebu_uart *mvuart;
|
||||
int ret, id;
|
||||
|
||||
if (!reg || !irq) {
|
||||
@ -598,15 +649,16 @@ static int mvebu_uart_probe(struct platform_device *pdev)
|
||||
if (IS_ERR(port->membase))
|
||||
return -PTR_ERR(port->membase);
|
||||
|
||||
data = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_uart_data),
|
||||
GFP_KERNEL);
|
||||
if (!data)
|
||||
mvuart = devm_kzalloc(&pdev->dev, sizeof(struct mvebu_uart),
|
||||
GFP_KERNEL);
|
||||
if (!mvuart)
|
||||
return -ENOMEM;
|
||||
|
||||
data->port = port;
|
||||
mvuart->data = (struct mvebu_uart_driver_data *)match->data;
|
||||
mvuart->port = port;
|
||||
|
||||
port->private_data = data;
|
||||
platform_set_drvdata(pdev, data);
|
||||
port->private_data = mvuart;
|
||||
platform_set_drvdata(pdev, mvuart);
|
||||
|
||||
ret = uart_add_one_port(&mvebu_uart_driver, port);
|
||||
if (ret)
|
||||
@ -614,9 +666,24 @@ static int mvebu_uart_probe(struct platform_device *pdev)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct mvebu_uart_driver_data uart_std_driver_data = {
|
||||
.is_ext = false,
|
||||
.regs.rbr = UART_STD_RBR,
|
||||
.regs.tsh = UART_STD_TSH,
|
||||
.regs.ctrl = UART_STD_CTRL1,
|
||||
.regs.intr = UART_STD_CTRL2,
|
||||
.flags.ctrl_tx_rdy_int = CTRL_STD_TX_RDY_INT,
|
||||
.flags.ctrl_rx_rdy_int = CTRL_STD_RX_RDY_INT,
|
||||
.flags.stat_tx_rdy = STAT_STD_TX_RDY,
|
||||
.flags.stat_rx_rdy = STAT_STD_RX_RDY,
|
||||
};
|
||||
|
||||
/* Match table for of_platform binding */
|
||||
static const struct of_device_id mvebu_uart_of_match[] = {
|
||||
{ .compatible = "marvell,armada-3700-uart", },
|
||||
{
|
||||
.compatible = "marvell,armada-3700-uart",
|
||||
.data = (void *)&uart_std_driver_data,
|
||||
},
|
||||
{}
|
||||
};
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user