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drm/i915/perf: Store shortcut to intel_uncore
Now that we have the engine stored in i915_perf, we have a means of accessing intel_gt should we require it. However, we are currently only using the intel_gt to find the right intel_uncore, so replace our i915_perf.gt pointer with the more useful i915_perf.uncore. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191010150520.26488-2-chris@chris-wilson.co.uk
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9a61363a63
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@ -419,14 +419,14 @@ static int get_oa_config(struct i915_perf *perf,
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static u32 gen8_oa_hw_tail_read(struct i915_perf_stream *stream)
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{
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struct intel_uncore *uncore = stream->gt->uncore;
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struct intel_uncore *uncore = stream->uncore;
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return intel_uncore_read(uncore, GEN8_OATAILPTR) & GEN8_OATAILPTR_MASK;
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}
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static u32 gen7_oa_hw_tail_read(struct i915_perf_stream *stream)
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{
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struct intel_uncore *uncore = stream->gt->uncore;
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struct intel_uncore *uncore = stream->uncore;
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u32 oastatus1 = intel_uncore_read(uncore, GEN7_OASTATUS1);
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return oastatus1 & GEN7_OASTATUS1_TAIL_MASK;
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@ -656,7 +656,7 @@ static int gen8_append_oa_reports(struct i915_perf_stream *stream,
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size_t count,
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size_t *offset)
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{
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struct intel_uncore *uncore = stream->gt->uncore;
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struct intel_uncore *uncore = stream->uncore;
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int report_size = stream->oa_buffer.format_size;
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u8 *oa_buf_base = stream->oa_buffer.vaddr;
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u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma);
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@ -866,7 +866,7 @@ static int gen8_oa_read(struct i915_perf_stream *stream,
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size_t count,
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size_t *offset)
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{
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struct intel_uncore *uncore = stream->gt->uncore;
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struct intel_uncore *uncore = stream->uncore;
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u32 oastatus;
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int ret;
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@ -945,7 +945,7 @@ static int gen7_append_oa_reports(struct i915_perf_stream *stream,
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size_t count,
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size_t *offset)
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{
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struct intel_uncore *uncore = stream->gt->uncore;
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struct intel_uncore *uncore = stream->uncore;
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int report_size = stream->oa_buffer.format_size;
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u8 *oa_buf_base = stream->oa_buffer.vaddr;
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u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma);
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@ -1077,7 +1077,7 @@ static int gen7_oa_read(struct i915_perf_stream *stream,
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size_t count,
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size_t *offset)
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{
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struct intel_uncore *uncore = stream->gt->uncore;
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struct intel_uncore *uncore = stream->uncore;
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u32 oastatus1;
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int ret;
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@ -1352,8 +1352,8 @@ static void i915_oa_stream_destroy(struct i915_perf_stream *stream)
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free_oa_buffer(stream);
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intel_uncore_forcewake_put(stream->gt->uncore, FORCEWAKE_ALL);
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intel_runtime_pm_put(stream->gt->uncore->rpm, stream->wakeref);
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intel_uncore_forcewake_put(stream->uncore, FORCEWAKE_ALL);
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intel_runtime_pm_put(stream->uncore->rpm, stream->wakeref);
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if (stream->ctx)
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oa_put_render_ctx_id(stream);
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@ -1368,7 +1368,7 @@ static void i915_oa_stream_destroy(struct i915_perf_stream *stream)
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static void gen7_init_oa_buffer(struct i915_perf_stream *stream)
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{
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struct intel_uncore *uncore = stream->gt->uncore;
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struct intel_uncore *uncore = stream->uncore;
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u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma);
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unsigned long flags;
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@ -1416,7 +1416,7 @@ static void gen7_init_oa_buffer(struct i915_perf_stream *stream)
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static void gen8_init_oa_buffer(struct i915_perf_stream *stream)
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{
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struct intel_uncore *uncore = stream->gt->uncore;
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struct intel_uncore *uncore = stream->uncore;
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u32 gtt_offset = i915_ggtt_offset(stream->oa_buffer.vma);
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unsigned long flags;
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@ -1565,7 +1565,7 @@ static void delay_after_mux(void)
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static int hsw_enable_metric_set(struct i915_perf_stream *stream)
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{
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struct intel_uncore *uncore = stream->gt->uncore;
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struct intel_uncore *uncore = stream->uncore;
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const struct i915_oa_config *oa_config = stream->oa_config;
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/*
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@ -1594,7 +1594,7 @@ static int hsw_enable_metric_set(struct i915_perf_stream *stream)
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static void hsw_disable_metric_set(struct i915_perf_stream *stream)
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{
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struct intel_uncore *uncore = stream->gt->uncore;
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struct intel_uncore *uncore = stream->uncore;
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intel_uncore_rmw(uncore, GEN6_UCGCTL1,
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GEN6_CSUNIT_CLOCK_GATE_DISABLE, 0);
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@ -1911,7 +1911,7 @@ static int gen8_configure_all_contexts(struct i915_perf_stream *stream,
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static int gen8_enable_metric_set(struct i915_perf_stream *stream)
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{
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struct intel_uncore *uncore = stream->gt->uncore;
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struct intel_uncore *uncore = stream->uncore;
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const struct i915_oa_config *oa_config = stream->oa_config;
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int ret;
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@ -1964,7 +1964,7 @@ static int gen8_enable_metric_set(struct i915_perf_stream *stream)
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static void gen8_disable_metric_set(struct i915_perf_stream *stream)
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{
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struct intel_uncore *uncore = stream->gt->uncore;
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struct intel_uncore *uncore = stream->uncore;
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/* Reset all contexts' slices/subslices configurations. */
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gen8_configure_all_contexts(stream, NULL);
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@ -1974,7 +1974,7 @@ static void gen8_disable_metric_set(struct i915_perf_stream *stream)
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static void gen10_disable_metric_set(struct i915_perf_stream *stream)
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{
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struct intel_uncore *uncore = stream->gt->uncore;
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struct intel_uncore *uncore = stream->uncore;
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/* Reset all contexts' slices/subslices configurations. */
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gen8_configure_all_contexts(stream, NULL);
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@ -1985,7 +1985,7 @@ static void gen10_disable_metric_set(struct i915_perf_stream *stream)
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static void gen7_oa_enable(struct i915_perf_stream *stream)
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{
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struct intel_uncore *uncore = stream->gt->uncore;
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struct intel_uncore *uncore = stream->uncore;
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struct i915_gem_context *ctx = stream->ctx;
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u32 ctx_id = stream->specific_ctx_id;
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bool periodic = stream->periodic;
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@ -2015,7 +2015,7 @@ static void gen7_oa_enable(struct i915_perf_stream *stream)
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static void gen8_oa_enable(struct i915_perf_stream *stream)
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{
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struct intel_uncore *uncore = stream->gt->uncore;
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struct intel_uncore *uncore = stream->uncore;
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u32 report_format = stream->oa_buffer.format;
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/*
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@ -2060,7 +2060,7 @@ static void i915_oa_stream_enable(struct i915_perf_stream *stream)
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static void gen7_oa_disable(struct i915_perf_stream *stream)
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{
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struct intel_uncore *uncore = stream->gt->uncore;
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struct intel_uncore *uncore = stream->uncore;
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intel_uncore_write(uncore, GEN7_OACONTROL, 0);
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if (intel_wait_for_register(uncore,
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@ -2071,7 +2071,7 @@ static void gen7_oa_disable(struct i915_perf_stream *stream)
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static void gen8_oa_disable(struct i915_perf_stream *stream)
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{
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struct intel_uncore *uncore = stream->gt->uncore;
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struct intel_uncore *uncore = stream->uncore;
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intel_uncore_write(uncore, GEN8_OACONTROL, 0);
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if (intel_wait_for_register(uncore,
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@ -2172,7 +2172,7 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream,
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}
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stream->engine = props->engine;
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stream->gt = stream->engine->gt;
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stream->uncore = stream->engine->gt->uncore;
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stream->sample_size = sizeof(struct drm_i915_perf_record_header);
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@ -2218,8 +2218,8 @@ static int i915_oa_stream_init(struct i915_perf_stream *stream,
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* In our case we are expecting that taking pm + FORCEWAKE
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* references will effectively disable RC6.
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*/
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stream->wakeref = intel_runtime_pm_get(stream->gt->uncore->rpm);
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intel_uncore_forcewake_get(stream->gt->uncore, FORCEWAKE_ALL);
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stream->wakeref = intel_runtime_pm_get(stream->uncore->rpm);
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intel_uncore_forcewake_get(stream->uncore, FORCEWAKE_ALL);
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ret = alloc_oa_buffer(stream);
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if (ret)
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@ -2251,8 +2251,8 @@ err_enable:
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err_oa_buf_alloc:
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put_oa_config(stream->oa_config);
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intel_uncore_forcewake_put(stream->gt->uncore, FORCEWAKE_ALL);
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intel_runtime_pm_put(stream->gt->uncore->rpm, stream->wakeref);
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intel_uncore_forcewake_put(stream->uncore, FORCEWAKE_ALL);
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intel_runtime_pm_put(stream->uncore->rpm, stream->wakeref);
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err_config:
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if (stream->ctx)
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@ -130,9 +130,9 @@ struct i915_perf_stream {
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struct i915_perf *perf;
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/**
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* @gt: intel_gt container
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* @uncore: mmio access path
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*/
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struct intel_gt *gt;
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struct intel_uncore *uncore;
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/**
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* @wakeref: As we keep the device awake while the perf stream is
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