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[POWERPC] 85xx: Cleaned up platform dts files
* Fixed up top level compatible property for all boards * Removed explicit linux,phandle usage. Use references and labels now * Fixed phy-phandles for TSEC3/4 in mpc8548cds.dts Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
This commit is contained in:
parent
975b893996
commit
5209487963
@ -12,16 +12,14 @@
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/ {
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/ {
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model = "MPC8540ADS";
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model = "MPC8540ADS";
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compatible = "MPC85xxADS";
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compatible = "MPC8540ADS", "MPC85xxADS";
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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#size-cells = <1>;
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linux,phandle = <100>;
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cpus {
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cpus {
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#cpus = <1>;
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#cpus = <1>;
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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#size-cells = <0>;
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linux,phandle = <200>;
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PowerPC,8540@0 {
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PowerPC,8540@0 {
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device_type = "cpu";
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device_type = "cpu";
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@ -34,13 +32,11 @@
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bus-frequency = <0>; // 166 MHz
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bus-frequency = <0>; // 166 MHz
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clock-frequency = <0>; // 825 MHz, from uboot
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clock-frequency = <0>; // 825 MHz, from uboot
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32-bit;
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32-bit;
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linux,phandle = <201>;
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};
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};
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};
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};
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memory {
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memory {
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device_type = "memory";
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device_type = "memory";
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linux,phandle = <300>;
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reg = <00000000 08000000>; // 128M at 0x0
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reg = <00000000 08000000>; // 128M at 0x0
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};
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};
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@ -58,7 +54,7 @@
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compatible = "fsl-i2c";
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compatible = "fsl-i2c";
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reg = <3000 100>;
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reg = <3000 100>;
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interrupts = <1b 2>;
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interrupts = <1b 2>;
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interrupt-parent = <40000>;
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interrupt-parent = <&mpic>;
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dfsrr;
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dfsrr;
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};
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};
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@ -68,24 +64,20 @@
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device_type = "mdio";
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device_type = "mdio";
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compatible = "gianfar";
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compatible = "gianfar";
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reg = <24520 20>;
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reg = <24520 20>;
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linux,phandle = <24520>;
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phy0: ethernet-phy@0 {
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ethernet-phy@0 {
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interrupt-parent = <&mpic>;
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linux,phandle = <2452000>;
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interrupt-parent = <40000>;
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interrupts = <35 1>;
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interrupts = <35 1>;
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reg = <0>;
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reg = <0>;
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device_type = "ethernet-phy";
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device_type = "ethernet-phy";
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};
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};
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ethernet-phy@1 {
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phy1: ethernet-phy@1 {
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linux,phandle = <2452001>;
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interrupt-parent = <&mpic>;
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interrupt-parent = <40000>;
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interrupts = <35 1>;
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interrupts = <35 1>;
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reg = <1>;
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reg = <1>;
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device_type = "ethernet-phy";
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device_type = "ethernet-phy";
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};
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};
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ethernet-phy@3 {
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phy3: ethernet-phy@3 {
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linux,phandle = <2452003>;
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interrupt-parent = <&mpic>;
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interrupt-parent = <40000>;
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interrupts = <37 1>;
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interrupts = <37 1>;
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reg = <3>;
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reg = <3>;
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device_type = "ethernet-phy";
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device_type = "ethernet-phy";
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@ -102,8 +94,8 @@
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address = [ 00 E0 0C 00 73 00 ];
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address = [ 00 E0 0C 00 73 00 ];
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local-mac-address = [ 00 E0 0C 00 73 00 ];
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local-mac-address = [ 00 E0 0C 00 73 00 ];
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interrupts = <d 2 e 2 12 2>;
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interrupts = <d 2 e 2 12 2>;
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interrupt-parent = <40000>;
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interrupt-parent = <&mpic>;
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phy-handle = <2452000>;
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phy-handle = <&phy0>;
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};
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};
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ethernet@25000 {
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ethernet@25000 {
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@ -116,8 +108,8 @@
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address = [ 00 E0 0C 00 73 01 ];
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address = [ 00 E0 0C 00 73 01 ];
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local-mac-address = [ 00 E0 0C 00 73 01 ];
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local-mac-address = [ 00 E0 0C 00 73 01 ];
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interrupts = <13 2 14 2 18 2>;
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interrupts = <13 2 14 2 18 2>;
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interrupt-parent = <40000>;
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interrupt-parent = <&mpic>;
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phy-handle = <2452001>;
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phy-handle = <&phy1>;
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};
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};
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ethernet@26000 {
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ethernet@26000 {
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@ -130,8 +122,8 @@
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address = [ 00 E0 0C 00 73 02 ];
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address = [ 00 E0 0C 00 73 02 ];
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local-mac-address = [ 00 E0 0C 00 73 02 ];
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local-mac-address = [ 00 E0 0C 00 73 02 ];
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interrupts = <19 2>;
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interrupts = <19 2>;
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interrupt-parent = <40000>;
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interrupt-parent = <&mpic>;
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phy-handle = <2452003>;
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phy-handle = <&phy3>;
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};
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};
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serial@4500 {
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serial@4500 {
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@ -140,7 +132,7 @@
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reg = <4500 100>; // reg base, size
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reg = <4500 100>; // reg base, size
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clock-frequency = <0>; // should we fill in in uboot?
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clock-frequency = <0>; // should we fill in in uboot?
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interrupts = <1a 2>;
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interrupts = <1a 2>;
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interrupt-parent = <40000>;
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interrupt-parent = <&mpic>;
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};
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};
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serial@4600 {
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serial@4600 {
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@ -149,85 +141,84 @@
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reg = <4600 100>; // reg base, size
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reg = <4600 100>; // reg base, size
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clock-frequency = <0>; // should we fill in in uboot?
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clock-frequency = <0>; // should we fill in in uboot?
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interrupts = <1a 2>;
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interrupts = <1a 2>;
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interrupt-parent = <40000>;
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interrupt-parent = <&mpic>;
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};
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};
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pci@8000 {
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pci@8000 {
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linux,phandle = <8000>;
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interrupt-map-mask = <f800 0 0 7>;
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interrupt-map-mask = <f800 0 0 7>;
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interrupt-map = <
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interrupt-map = <
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/* IDSEL 0x02 */
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/* IDSEL 0x02 */
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1000 0 0 1 40000 31 1
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1000 0 0 1 &mpic 31 1
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1000 0 0 2 40000 32 1
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1000 0 0 2 &mpic 32 1
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1000 0 0 3 40000 33 1
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1000 0 0 3 &mpic 33 1
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1000 0 0 4 40000 34 1
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1000 0 0 4 &mpic 34 1
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/* IDSEL 0x03 */
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/* IDSEL 0x03 */
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1800 0 0 1 40000 34 1
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1800 0 0 1 &mpic 34 1
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1800 0 0 2 40000 31 1
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1800 0 0 2 &mpic 31 1
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1800 0 0 3 40000 32 1
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1800 0 0 3 &mpic 32 1
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1800 0 0 4 40000 33 1
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1800 0 0 4 &mpic 33 1
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/* IDSEL 0x04 */
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/* IDSEL 0x04 */
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2000 0 0 1 40000 33 1
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2000 0 0 1 &mpic 33 1
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2000 0 0 2 40000 34 1
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2000 0 0 2 &mpic 34 1
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2000 0 0 3 40000 31 1
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2000 0 0 3 &mpic 31 1
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2000 0 0 4 40000 32 1
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2000 0 0 4 &mpic 32 1
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/* IDSEL 0x05 */
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/* IDSEL 0x05 */
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2800 0 0 1 40000 32 1
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2800 0 0 1 &mpic 32 1
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2800 0 0 2 40000 33 1
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2800 0 0 2 &mpic 33 1
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2800 0 0 3 40000 34 1
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2800 0 0 3 &mpic 34 1
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2800 0 0 4 40000 31 1
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2800 0 0 4 &mpic 31 1
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/* IDSEL 0x0c */
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/* IDSEL 0x0c */
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6000 0 0 1 40000 31 1
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6000 0 0 1 &mpic 31 1
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6000 0 0 2 40000 32 1
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6000 0 0 2 &mpic 32 1
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6000 0 0 3 40000 33 1
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6000 0 0 3 &mpic 33 1
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6000 0 0 4 40000 34 1
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6000 0 0 4 &mpic 34 1
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/* IDSEL 0x0d */
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/* IDSEL 0x0d */
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6800 0 0 1 40000 34 1
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6800 0 0 1 &mpic 34 1
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6800 0 0 2 40000 31 1
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6800 0 0 2 &mpic 31 1
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6800 0 0 3 40000 32 1
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6800 0 0 3 &mpic 32 1
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6800 0 0 4 40000 33 1
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6800 0 0 4 &mpic 33 1
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/* IDSEL 0x0e */
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/* IDSEL 0x0e */
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7000 0 0 1 40000 33 1
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7000 0 0 1 &mpic 33 1
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7000 0 0 2 40000 34 1
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7000 0 0 2 &mpic 34 1
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7000 0 0 3 40000 31 1
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7000 0 0 3 &mpic 31 1
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7000 0 0 4 40000 32 1
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7000 0 0 4 &mpic 32 1
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/* IDSEL 0x0f */
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/* IDSEL 0x0f */
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7800 0 0 1 40000 32 1
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7800 0 0 1 &mpic 32 1
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7800 0 0 2 40000 33 1
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7800 0 0 2 &mpic 33 1
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7800 0 0 3 40000 34 1
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7800 0 0 3 &mpic 34 1
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7800 0 0 4 40000 31 1
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7800 0 0 4 &mpic 31 1
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/* IDSEL 0x12 */
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/* IDSEL 0x12 */
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9000 0 0 1 40000 31 1
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9000 0 0 1 &mpic 31 1
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9000 0 0 2 40000 32 1
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9000 0 0 2 &mpic 32 1
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9000 0 0 3 40000 33 1
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9000 0 0 3 &mpic 33 1
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9000 0 0 4 40000 34 1
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9000 0 0 4 &mpic 34 1
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/* IDSEL 0x13 */
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/* IDSEL 0x13 */
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9800 0 0 1 40000 34 1
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9800 0 0 1 &mpic 34 1
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9800 0 0 2 40000 31 1
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9800 0 0 2 &mpic 31 1
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9800 0 0 3 40000 32 1
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9800 0 0 3 &mpic 32 1
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9800 0 0 4 40000 33 1
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9800 0 0 4 &mpic 33 1
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/* IDSEL 0x14 */
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/* IDSEL 0x14 */
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a000 0 0 1 40000 33 1
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a000 0 0 1 &mpic 33 1
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a000 0 0 2 40000 34 1
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a000 0 0 2 &mpic 34 1
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a000 0 0 3 40000 31 1
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a000 0 0 3 &mpic 31 1
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a000 0 0 4 40000 32 1
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a000 0 0 4 &mpic 32 1
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/* IDSEL 0x15 */
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/* IDSEL 0x15 */
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a800 0 0 1 40000 32 1
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a800 0 0 1 &mpic 32 1
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a800 0 0 2 40000 33 1
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a800 0 0 2 &mpic 33 1
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a800 0 0 3 40000 34 1
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a800 0 0 3 &mpic 34 1
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a800 0 0 4 40000 31 1>;
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a800 0 0 4 &mpic 31 1>;
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interrupt-parent = <40000>;
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interrupt-parent = <&mpic>;
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interrupts = <08 2>;
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interrupts = <08 2>;
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bus-range = <0 0>;
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bus-range = <0 0>;
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ranges = <02000000 0 80000000 80000000 0 20000000
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ranges = <02000000 0 80000000 80000000 0 20000000
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@ -241,8 +232,7 @@
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device_type = "pci";
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device_type = "pci";
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};
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};
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pic@40000 {
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mpic: pic@40000 {
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linux,phandle = <40000>;
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clock-frequency = <0>;
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clock-frequency = <0>;
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interrupt-controller;
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interrupt-controller;
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#address-cells = <0>;
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#address-cells = <0>;
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@ -12,16 +12,14 @@
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/ {
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/ {
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model = "MPC8541CDS";
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model = "MPC8541CDS";
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compatible = "MPC85xxCDS";
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compatible = "MPC8541CDS", "MPC85xxCDS";
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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#size-cells = <1>;
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linux,phandle = <100>;
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cpus {
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cpus {
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#cpus = <1>;
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#cpus = <1>;
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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#size-cells = <0>;
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linux,phandle = <200>;
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PowerPC,8541@0 {
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PowerPC,8541@0 {
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device_type = "cpu";
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device_type = "cpu";
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@ -34,13 +32,11 @@
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bus-frequency = <0>; // 166 MHz
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bus-frequency = <0>; // 166 MHz
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clock-frequency = <0>; // 825 MHz, from uboot
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clock-frequency = <0>; // 825 MHz, from uboot
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32-bit;
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32-bit;
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linux,phandle = <201>;
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};
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};
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};
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};
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memory {
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memory {
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device_type = "memory";
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device_type = "memory";
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linux,phandle = <300>;
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reg = <00000000 08000000>; // 128M at 0x0
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reg = <00000000 08000000>; // 128M at 0x0
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};
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};
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@ -58,7 +54,7 @@
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compatible = "fsl-i2c";
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compatible = "fsl-i2c";
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reg = <3000 100>;
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reg = <3000 100>;
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interrupts = <1b 2>;
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interrupts = <1b 2>;
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interrupt-parent = <40000>;
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interrupt-parent = <&mpic>;
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dfsrr;
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dfsrr;
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};
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};
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@ -68,17 +64,14 @@
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device_type = "mdio";
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device_type = "mdio";
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compatible = "gianfar";
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compatible = "gianfar";
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reg = <24520 20>;
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reg = <24520 20>;
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linux,phandle = <24520>;
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phy0: ethernet-phy@0 {
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ethernet-phy@0 {
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interrupt-parent = <&mpic>;
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linux,phandle = <2452000>;
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interrupt-parent = <40000>;
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interrupts = <35 0>;
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interrupts = <35 0>;
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reg = <0>;
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reg = <0>;
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device_type = "ethernet-phy";
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device_type = "ethernet-phy";
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};
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};
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ethernet-phy@1 {
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phy1: ethernet-phy@1 {
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linux,phandle = <2452001>;
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interrupt-parent = <&mpic>;
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interrupt-parent = <40000>;
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interrupts = <35 0>;
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interrupts = <35 0>;
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reg = <1>;
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reg = <1>;
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device_type = "ethernet-phy";
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device_type = "ethernet-phy";
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@ -94,8 +87,8 @@
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reg = <24000 1000>;
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reg = <24000 1000>;
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local-mac-address = [ 00 E0 0C 00 73 00 ];
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local-mac-address = [ 00 E0 0C 00 73 00 ];
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interrupts = <d 2 e 2 12 2>;
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interrupts = <d 2 e 2 12 2>;
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interrupt-parent = <40000>;
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interrupt-parent = <&mpic>;
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phy-handle = <2452000>;
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phy-handle = <&phy0>;
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};
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};
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ethernet@25000 {
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ethernet@25000 {
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@ -107,8 +100,8 @@
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reg = <25000 1000>;
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reg = <25000 1000>;
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local-mac-address = [ 00 E0 0C 00 73 01 ];
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local-mac-address = [ 00 E0 0C 00 73 01 ];
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interrupts = <13 2 14 2 18 2>;
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interrupts = <13 2 14 2 18 2>;
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interrupt-parent = <40000>;
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interrupt-parent = <&mpic>;
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phy-handle = <2452001>;
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phy-handle = <&phy1>;
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};
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};
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serial@4500 {
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serial@4500 {
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@ -117,7 +110,7 @@
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reg = <4500 100>; // reg base, size
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reg = <4500 100>; // reg base, size
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clock-frequency = <0>; // should we fill in in uboot?
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clock-frequency = <0>; // should we fill in in uboot?
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interrupts = <1a 2>;
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interrupts = <1a 2>;
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interrupt-parent = <40000>;
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interrupt-parent = <&mpic>;
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};
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};
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serial@4600 {
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serial@4600 {
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@ -126,57 +119,56 @@
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reg = <4600 100>; // reg base, size
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reg = <4600 100>; // reg base, size
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clock-frequency = <0>; // should we fill in in uboot?
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clock-frequency = <0>; // should we fill in in uboot?
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interrupts = <1a 2>;
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interrupts = <1a 2>;
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interrupt-parent = <40000>;
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interrupt-parent = <&mpic>;
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};
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};
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pci@8000 {
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pci1: pci@8000 {
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linux,phandle = <8000>;
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interrupt-map-mask = <1f800 0 0 7>;
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interrupt-map-mask = <1f800 0 0 7>;
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interrupt-map = <
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interrupt-map = <
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/* IDSEL 0x10 */
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/* IDSEL 0x10 */
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08000 0 0 1 40000 30 1
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08000 0 0 1 &mpic 30 1
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08000 0 0 2 40000 31 1
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08000 0 0 2 &mpic 31 1
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08000 0 0 3 40000 32 1
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08000 0 0 3 &mpic 32 1
|
||||||
08000 0 0 4 40000 33 1
|
08000 0 0 4 &mpic 33 1
|
||||||
|
|
||||||
/* IDSEL 0x11 */
|
/* IDSEL 0x11 */
|
||||||
08800 0 0 1 40000 30 1
|
08800 0 0 1 &mpic 30 1
|
||||||
08800 0 0 2 40000 31 1
|
08800 0 0 2 &mpic 31 1
|
||||||
08800 0 0 3 40000 32 1
|
08800 0 0 3 &mpic 32 1
|
||||||
08800 0 0 4 40000 33 1
|
08800 0 0 4 &mpic 33 1
|
||||||
|
|
||||||
/* IDSEL 0x12 (Slot 1) */
|
/* IDSEL 0x12 (Slot 1) */
|
||||||
09000 0 0 1 40000 30 1
|
09000 0 0 1 &mpic 30 1
|
||||||
09000 0 0 2 40000 31 1
|
09000 0 0 2 &mpic 31 1
|
||||||
09000 0 0 3 40000 32 1
|
09000 0 0 3 &mpic 32 1
|
||||||
09000 0 0 4 40000 33 1
|
09000 0 0 4 &mpic 33 1
|
||||||
|
|
||||||
/* IDSEL 0x13 (Slot 2) */
|
/* IDSEL 0x13 (Slot 2) */
|
||||||
09800 0 0 1 40000 31 1
|
09800 0 0 1 &mpic 31 1
|
||||||
09800 0 0 2 40000 32 1
|
09800 0 0 2 &mpic 32 1
|
||||||
09800 0 0 3 40000 33 1
|
09800 0 0 3 &mpic 33 1
|
||||||
09800 0 0 4 40000 30 1
|
09800 0 0 4 &mpic 30 1
|
||||||
|
|
||||||
/* IDSEL 0x14 (Slot 3) */
|
/* IDSEL 0x14 (Slot 3) */
|
||||||
0a000 0 0 1 40000 32 1
|
0a000 0 0 1 &mpic 32 1
|
||||||
0a000 0 0 2 40000 33 1
|
0a000 0 0 2 &mpic 33 1
|
||||||
0a000 0 0 3 40000 30 1
|
0a000 0 0 3 &mpic 30 1
|
||||||
0a000 0 0 4 40000 31 1
|
0a000 0 0 4 &mpic 31 1
|
||||||
|
|
||||||
/* IDSEL 0x15 (Slot 4) */
|
/* IDSEL 0x15 (Slot 4) */
|
||||||
0a800 0 0 1 40000 33 1
|
0a800 0 0 1 &mpic 33 1
|
||||||
0a800 0 0 2 40000 30 1
|
0a800 0 0 2 &mpic 30 1
|
||||||
0a800 0 0 3 40000 31 1
|
0a800 0 0 3 &mpic 31 1
|
||||||
0a800 0 0 4 40000 32 1
|
0a800 0 0 4 &mpic 32 1
|
||||||
|
|
||||||
/* Bus 1 (Tundra Bridge) */
|
/* Bus 1 (Tundra Bridge) */
|
||||||
/* IDSEL 0x12 (ISA bridge) */
|
/* IDSEL 0x12 (ISA bridge) */
|
||||||
19000 0 0 1 40000 30 1
|
19000 0 0 1 &mpic 30 1
|
||||||
19000 0 0 2 40000 31 1
|
19000 0 0 2 &mpic 31 1
|
||||||
19000 0 0 3 40000 32 1
|
19000 0 0 3 &mpic 32 1
|
||||||
19000 0 0 4 40000 33 1>;
|
19000 0 0 4 &mpic 33 1>;
|
||||||
interrupt-parent = <40000>;
|
interrupt-parent = <&mpic>;
|
||||||
interrupts = <08 2>;
|
interrupts = <08 2>;
|
||||||
bus-range = <0 0>;
|
bus-range = <0 0>;
|
||||||
ranges = <02000000 0 80000000 80000000 0 20000000
|
ranges = <02000000 0 80000000 80000000 0 20000000
|
||||||
@ -200,21 +192,20 @@
|
|||||||
compatible = "chrp,iic";
|
compatible = "chrp,iic";
|
||||||
big-endian;
|
big-endian;
|
||||||
interrupts = <1>;
|
interrupts = <1>;
|
||||||
interrupt-parent = <8000>;
|
interrupt-parent = <&pci1>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
pci@9000 {
|
pci@9000 {
|
||||||
linux,phandle = <9000>;
|
|
||||||
interrupt-map-mask = <f800 0 0 7>;
|
interrupt-map-mask = <f800 0 0 7>;
|
||||||
interrupt-map = <
|
interrupt-map = <
|
||||||
|
|
||||||
/* IDSEL 0x15 */
|
/* IDSEL 0x15 */
|
||||||
a800 0 0 1 40000 3b 1
|
a800 0 0 1 &mpic 3b 1
|
||||||
a800 0 0 2 40000 3b 1
|
a800 0 0 2 &mpic 3b 1
|
||||||
a800 0 0 3 40000 3b 1
|
a800 0 0 3 &mpic 3b 1
|
||||||
a800 0 0 4 40000 3b 1>;
|
a800 0 0 4 &mpic 3b 1>;
|
||||||
interrupt-parent = <40000>;
|
interrupt-parent = <&mpic>;
|
||||||
interrupts = <09 2>;
|
interrupts = <09 2>;
|
||||||
bus-range = <0 0>;
|
bus-range = <0 0>;
|
||||||
ranges = <02000000 0 a0000000 a0000000 0 20000000
|
ranges = <02000000 0 a0000000 a0000000 0 20000000
|
||||||
@ -228,8 +219,7 @@
|
|||||||
device_type = "pci";
|
device_type = "pci";
|
||||||
};
|
};
|
||||||
|
|
||||||
pic@40000 {
|
mpic: pic@40000 {
|
||||||
linux,phandle = <40000>;
|
|
||||||
clock-frequency = <0>;
|
clock-frequency = <0>;
|
||||||
interrupt-controller;
|
interrupt-controller;
|
||||||
#address-cells = <0>;
|
#address-cells = <0>;
|
||||||
|
@ -12,16 +12,14 @@
|
|||||||
|
|
||||||
/ {
|
/ {
|
||||||
model = "MPC8548CDS";
|
model = "MPC8548CDS";
|
||||||
compatible = "MPC85xxCDS";
|
compatible = "MPC8548CDS", "MPC85xxCDS";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <1>;
|
#size-cells = <1>;
|
||||||
linux,phandle = <100>;
|
|
||||||
|
|
||||||
cpus {
|
cpus {
|
||||||
#cpus = <1>;
|
#cpus = <1>;
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
linux,phandle = <200>;
|
|
||||||
|
|
||||||
PowerPC,8548@0 {
|
PowerPC,8548@0 {
|
||||||
device_type = "cpu";
|
device_type = "cpu";
|
||||||
@ -34,13 +32,11 @@
|
|||||||
bus-frequency = <0>; // 166 MHz
|
bus-frequency = <0>; // 166 MHz
|
||||||
clock-frequency = <0>; // 825 MHz, from uboot
|
clock-frequency = <0>; // 825 MHz, from uboot
|
||||||
32-bit;
|
32-bit;
|
||||||
linux,phandle = <201>;
|
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
memory {
|
memory {
|
||||||
device_type = "memory";
|
device_type = "memory";
|
||||||
linux,phandle = <300>;
|
|
||||||
reg = <00000000 08000000>; // 128M at 0x0
|
reg = <00000000 08000000>; // 128M at 0x0
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -58,7 +54,7 @@
|
|||||||
compatible = "fsl-i2c";
|
compatible = "fsl-i2c";
|
||||||
reg = <3000 100>;
|
reg = <3000 100>;
|
||||||
interrupts = <1b 2>;
|
interrupts = <1b 2>;
|
||||||
interrupt-parent = <40000>;
|
interrupt-parent = <&mpic>;
|
||||||
dfsrr;
|
dfsrr;
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -68,32 +64,26 @@
|
|||||||
device_type = "mdio";
|
device_type = "mdio";
|
||||||
compatible = "gianfar";
|
compatible = "gianfar";
|
||||||
reg = <24520 20>;
|
reg = <24520 20>;
|
||||||
linux,phandle = <24520>;
|
phy0: ethernet-phy@0 {
|
||||||
ethernet-phy@0 {
|
interrupt-parent = <&mpic>;
|
||||||
linux,phandle = <2452000>;
|
|
||||||
interrupt-parent = <40000>;
|
|
||||||
interrupts = <35 0>;
|
interrupts = <35 0>;
|
||||||
reg = <0>;
|
reg = <0>;
|
||||||
device_type = "ethernet-phy";
|
device_type = "ethernet-phy";
|
||||||
};
|
};
|
||||||
ethernet-phy@1 {
|
phy1: ethernet-phy@1 {
|
||||||
linux,phandle = <2452001>;
|
interrupt-parent = <&mpic>;
|
||||||
interrupt-parent = <40000>;
|
|
||||||
interrupts = <35 0>;
|
interrupts = <35 0>;
|
||||||
reg = <1>;
|
reg = <1>;
|
||||||
device_type = "ethernet-phy";
|
device_type = "ethernet-phy";
|
||||||
};
|
};
|
||||||
|
phy2: ethernet-phy@2 {
|
||||||
ethernet-phy@2 {
|
interrupt-parent = <&mpic>;
|
||||||
linux,phandle = <2452002>;
|
|
||||||
interrupt-parent = <40000>;
|
|
||||||
interrupts = <35 0>;
|
interrupts = <35 0>;
|
||||||
reg = <2>;
|
reg = <2>;
|
||||||
device_type = "ethernet-phy";
|
device_type = "ethernet-phy";
|
||||||
};
|
};
|
||||||
ethernet-phy@3 {
|
phy3: ethernet-phy@3 {
|
||||||
linux,phandle = <2452003>;
|
interrupt-parent = <&mpic>;
|
||||||
interrupt-parent = <40000>;
|
|
||||||
interrupts = <35 0>;
|
interrupts = <35 0>;
|
||||||
reg = <3>;
|
reg = <3>;
|
||||||
device_type = "ethernet-phy";
|
device_type = "ethernet-phy";
|
||||||
@ -109,8 +99,8 @@
|
|||||||
reg = <24000 1000>;
|
reg = <24000 1000>;
|
||||||
local-mac-address = [ 00 E0 0C 00 73 00 ];
|
local-mac-address = [ 00 E0 0C 00 73 00 ];
|
||||||
interrupts = <d 2 e 2 12 2>;
|
interrupts = <d 2 e 2 12 2>;
|
||||||
interrupt-parent = <40000>;
|
interrupt-parent = <&mpic>;
|
||||||
phy-handle = <2452000>;
|
phy-handle = <&phy0>;
|
||||||
};
|
};
|
||||||
|
|
||||||
ethernet@25000 {
|
ethernet@25000 {
|
||||||
@ -122,10 +112,11 @@
|
|||||||
reg = <25000 1000>;
|
reg = <25000 1000>;
|
||||||
local-mac-address = [ 00 E0 0C 00 73 01 ];
|
local-mac-address = [ 00 E0 0C 00 73 01 ];
|
||||||
interrupts = <13 2 14 2 18 2>;
|
interrupts = <13 2 14 2 18 2>;
|
||||||
interrupt-parent = <40000>;
|
interrupt-parent = <&mpic>;
|
||||||
phy-handle = <2452001>;
|
phy-handle = <&phy1>;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
/* eTSEC 3/4 are currently broken
|
||||||
ethernet@26000 {
|
ethernet@26000 {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
@ -135,11 +126,10 @@
|
|||||||
reg = <26000 1000>;
|
reg = <26000 1000>;
|
||||||
local-mac-address = [ 00 E0 0C 00 73 02 ];
|
local-mac-address = [ 00 E0 0C 00 73 02 ];
|
||||||
interrupts = <f 2 10 2 11 2>;
|
interrupts = <f 2 10 2 11 2>;
|
||||||
interrupt-parent = <40000>;
|
interrupt-parent = <&mpic>;
|
||||||
phy-handle = <2452001>;
|
phy-handle = <&phy2>;
|
||||||
};
|
};
|
||||||
|
|
||||||
/* eTSEC 4 is currently broken
|
|
||||||
ethernet@27000 {
|
ethernet@27000 {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
@ -149,8 +139,8 @@
|
|||||||
reg = <27000 1000>;
|
reg = <27000 1000>;
|
||||||
local-mac-address = [ 00 E0 0C 00 73 03 ];
|
local-mac-address = [ 00 E0 0C 00 73 03 ];
|
||||||
interrupts = <15 2 16 2 17 2>;
|
interrupts = <15 2 16 2 17 2>;
|
||||||
interrupt-parent = <40000>;
|
interrupt-parent = <&mpic>;
|
||||||
phy-handle = <2452001>;
|
phy-handle = <&phy3>;
|
||||||
};
|
};
|
||||||
*/
|
*/
|
||||||
|
|
||||||
@ -160,7 +150,7 @@
|
|||||||
reg = <4500 100>; // reg base, size
|
reg = <4500 100>; // reg base, size
|
||||||
clock-frequency = <0>; // should we fill in in uboot?
|
clock-frequency = <0>; // should we fill in in uboot?
|
||||||
interrupts = <1a 2>;
|
interrupts = <1a 2>;
|
||||||
interrupt-parent = <40000>;
|
interrupt-parent = <&mpic>;
|
||||||
};
|
};
|
||||||
|
|
||||||
serial@4600 {
|
serial@4600 {
|
||||||
@ -169,57 +159,56 @@
|
|||||||
reg = <4600 100>; // reg base, size
|
reg = <4600 100>; // reg base, size
|
||||||
clock-frequency = <0>; // should we fill in in uboot?
|
clock-frequency = <0>; // should we fill in in uboot?
|
||||||
interrupts = <1a 2>;
|
interrupts = <1a 2>;
|
||||||
interrupt-parent = <40000>;
|
interrupt-parent = <&mpic>;
|
||||||
};
|
};
|
||||||
|
|
||||||
pci@8000 {
|
pci1: pci@8000 {
|
||||||
linux,phandle = <8000>;
|
|
||||||
interrupt-map-mask = <1f800 0 0 7>;
|
interrupt-map-mask = <1f800 0 0 7>;
|
||||||
interrupt-map = <
|
interrupt-map = <
|
||||||
|
|
||||||
/* IDSEL 0x10 */
|
/* IDSEL 0x10 */
|
||||||
08000 0 0 1 40000 30 1
|
08000 0 0 1 &mpic 30 1
|
||||||
08000 0 0 2 40000 31 1
|
08000 0 0 2 &mpic 31 1
|
||||||
08000 0 0 3 40000 32 1
|
08000 0 0 3 &mpic 32 1
|
||||||
08000 0 0 4 40000 33 1
|
08000 0 0 4 &mpic 33 1
|
||||||
|
|
||||||
/* IDSEL 0x11 */
|
/* IDSEL 0x11 */
|
||||||
08800 0 0 1 40000 30 1
|
08800 0 0 1 &mpic 30 1
|
||||||
08800 0 0 2 40000 31 1
|
08800 0 0 2 &mpic 31 1
|
||||||
08800 0 0 3 40000 32 1
|
08800 0 0 3 &mpic 32 1
|
||||||
08800 0 0 4 40000 33 1
|
08800 0 0 4 &mpic 33 1
|
||||||
|
|
||||||
/* IDSEL 0x12 (Slot 1) */
|
/* IDSEL 0x12 (Slot 1) */
|
||||||
09000 0 0 1 40000 30 1
|
09000 0 0 1 &mpic 30 1
|
||||||
09000 0 0 2 40000 31 1
|
09000 0 0 2 &mpic 31 1
|
||||||
09000 0 0 3 40000 32 1
|
09000 0 0 3 &mpic 32 1
|
||||||
09000 0 0 4 40000 33 1
|
09000 0 0 4 &mpic 33 1
|
||||||
|
|
||||||
/* IDSEL 0x13 (Slot 2) */
|
/* IDSEL 0x13 (Slot 2) */
|
||||||
09800 0 0 1 40000 31 1
|
09800 0 0 1 &mpic 31 1
|
||||||
09800 0 0 2 40000 32 1
|
09800 0 0 2 &mpic 32 1
|
||||||
09800 0 0 3 40000 33 1
|
09800 0 0 3 &mpic 33 1
|
||||||
09800 0 0 4 40000 30 1
|
09800 0 0 4 &mpic 30 1
|
||||||
|
|
||||||
/* IDSEL 0x14 (Slot 3) */
|
/* IDSEL 0x14 (Slot 3) */
|
||||||
0a000 0 0 1 40000 32 1
|
0a000 0 0 1 &mpic 32 1
|
||||||
0a000 0 0 2 40000 33 1
|
0a000 0 0 2 &mpic 33 1
|
||||||
0a000 0 0 3 40000 30 1
|
0a000 0 0 3 &mpic 30 1
|
||||||
0a000 0 0 4 40000 31 1
|
0a000 0 0 4 &mpic 31 1
|
||||||
|
|
||||||
/* IDSEL 0x15 (Slot 4) */
|
/* IDSEL 0x15 (Slot 4) */
|
||||||
0a800 0 0 1 40000 33 1
|
0a800 0 0 1 &mpic 33 1
|
||||||
0a800 0 0 2 40000 30 1
|
0a800 0 0 2 &mpic 30 1
|
||||||
0a800 0 0 3 40000 31 1
|
0a800 0 0 3 &mpic 31 1
|
||||||
0a800 0 0 4 40000 32 1
|
0a800 0 0 4 &mpic 32 1
|
||||||
|
|
||||||
/* Bus 1 (Tundra Bridge) */
|
/* Bus 1 (Tundra Bridge) */
|
||||||
/* IDSEL 0x12 (ISA bridge) */
|
/* IDSEL 0x12 (ISA bridge) */
|
||||||
19000 0 0 1 40000 30 1
|
19000 0 0 1 &mpic 30 1
|
||||||
19000 0 0 2 40000 31 1
|
19000 0 0 2 &mpic 31 1
|
||||||
19000 0 0 3 40000 32 1
|
19000 0 0 3 &mpic 32 1
|
||||||
19000 0 0 4 40000 33 1>;
|
19000 0 0 4 &mpic 33 1>;
|
||||||
interrupt-parent = <40000>;
|
interrupt-parent = <&mpic>;
|
||||||
interrupts = <08 2>;
|
interrupts = <08 2>;
|
||||||
bus-range = <0 0>;
|
bus-range = <0 0>;
|
||||||
ranges = <02000000 0 80000000 80000000 0 20000000
|
ranges = <02000000 0 80000000 80000000 0 20000000
|
||||||
@ -243,21 +232,20 @@
|
|||||||
compatible = "chrp,iic";
|
compatible = "chrp,iic";
|
||||||
big-endian;
|
big-endian;
|
||||||
interrupts = <1>;
|
interrupts = <1>;
|
||||||
interrupt-parent = <8000>;
|
interrupt-parent = <&pci1>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
pci@9000 {
|
pci@9000 {
|
||||||
linux,phandle = <9000>;
|
|
||||||
interrupt-map-mask = <f800 0 0 7>;
|
interrupt-map-mask = <f800 0 0 7>;
|
||||||
interrupt-map = <
|
interrupt-map = <
|
||||||
|
|
||||||
/* IDSEL 0x15 */
|
/* IDSEL 0x15 */
|
||||||
a800 0 0 1 40000 3b 1
|
a800 0 0 1 &mpic 3b 1
|
||||||
a800 0 0 2 40000 3b 1
|
a800 0 0 2 &mpic 3b 1
|
||||||
a800 0 0 3 40000 3b 1
|
a800 0 0 3 &mpic 3b 1
|
||||||
a800 0 0 4 40000 3b 1>;
|
a800 0 0 4 &mpic 3b 1>;
|
||||||
interrupt-parent = <40000>;
|
interrupt-parent = <&mpic>;
|
||||||
interrupts = <09 2>;
|
interrupts = <09 2>;
|
||||||
bus-range = <0 0>;
|
bus-range = <0 0>;
|
||||||
ranges = <02000000 0 a0000000 a0000000 0 20000000
|
ranges = <02000000 0 a0000000 a0000000 0 20000000
|
||||||
@ -271,8 +259,7 @@
|
|||||||
device_type = "pci";
|
device_type = "pci";
|
||||||
};
|
};
|
||||||
|
|
||||||
pic@40000 {
|
mpic: pic@40000 {
|
||||||
linux,phandle = <40000>;
|
|
||||||
clock-frequency = <0>;
|
clock-frequency = <0>;
|
||||||
interrupt-controller;
|
interrupt-controller;
|
||||||
#address-cells = <0>;
|
#address-cells = <0>;
|
||||||
|
@ -12,16 +12,14 @@
|
|||||||
|
|
||||||
/ {
|
/ {
|
||||||
model = "MPC8555CDS";
|
model = "MPC8555CDS";
|
||||||
compatible = "MPC85xxCDS";
|
compatible = "MPC8555CDS", "MPC85xxCDS";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <1>;
|
#size-cells = <1>;
|
||||||
linux,phandle = <100>;
|
|
||||||
|
|
||||||
cpus {
|
cpus {
|
||||||
#cpus = <1>;
|
#cpus = <1>;
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
linux,phandle = <200>;
|
|
||||||
|
|
||||||
PowerPC,8555@0 {
|
PowerPC,8555@0 {
|
||||||
device_type = "cpu";
|
device_type = "cpu";
|
||||||
@ -34,13 +32,11 @@
|
|||||||
bus-frequency = <0>; // 166 MHz
|
bus-frequency = <0>; // 166 MHz
|
||||||
clock-frequency = <0>; // 825 MHz, from uboot
|
clock-frequency = <0>; // 825 MHz, from uboot
|
||||||
32-bit;
|
32-bit;
|
||||||
linux,phandle = <201>;
|
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
memory {
|
memory {
|
||||||
device_type = "memory";
|
device_type = "memory";
|
||||||
linux,phandle = <300>;
|
|
||||||
reg = <00000000 08000000>; // 128M at 0x0
|
reg = <00000000 08000000>; // 128M at 0x0
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -58,7 +54,7 @@
|
|||||||
compatible = "fsl-i2c";
|
compatible = "fsl-i2c";
|
||||||
reg = <3000 100>;
|
reg = <3000 100>;
|
||||||
interrupts = <1b 2>;
|
interrupts = <1b 2>;
|
||||||
interrupt-parent = <40000>;
|
interrupt-parent = <&mpic>;
|
||||||
dfsrr;
|
dfsrr;
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -68,17 +64,14 @@
|
|||||||
device_type = "mdio";
|
device_type = "mdio";
|
||||||
compatible = "gianfar";
|
compatible = "gianfar";
|
||||||
reg = <24520 20>;
|
reg = <24520 20>;
|
||||||
linux,phandle = <24520>;
|
phy0: ethernet-phy@0 {
|
||||||
ethernet-phy@0 {
|
interrupt-parent = <&mpic>;
|
||||||
linux,phandle = <2452000>;
|
|
||||||
interrupt-parent = <40000>;
|
|
||||||
interrupts = <35 0>;
|
interrupts = <35 0>;
|
||||||
reg = <0>;
|
reg = <0>;
|
||||||
device_type = "ethernet-phy";
|
device_type = "ethernet-phy";
|
||||||
};
|
};
|
||||||
ethernet-phy@1 {
|
phy1: ethernet-phy@1 {
|
||||||
linux,phandle = <2452001>;
|
interrupt-parent = <&mpic>;
|
||||||
interrupt-parent = <40000>;
|
|
||||||
interrupts = <35 0>;
|
interrupts = <35 0>;
|
||||||
reg = <1>;
|
reg = <1>;
|
||||||
device_type = "ethernet-phy";
|
device_type = "ethernet-phy";
|
||||||
@ -94,8 +87,8 @@
|
|||||||
reg = <24000 1000>;
|
reg = <24000 1000>;
|
||||||
local-mac-address = [ 00 E0 0C 00 73 00 ];
|
local-mac-address = [ 00 E0 0C 00 73 00 ];
|
||||||
interrupts = <0d 2 0e 2 12 2>;
|
interrupts = <0d 2 0e 2 12 2>;
|
||||||
interrupt-parent = <40000>;
|
interrupt-parent = <&mpic>;
|
||||||
phy-handle = <2452000>;
|
phy-handle = <&phy0>;
|
||||||
};
|
};
|
||||||
|
|
||||||
ethernet@25000 {
|
ethernet@25000 {
|
||||||
@ -107,8 +100,8 @@
|
|||||||
reg = <25000 1000>;
|
reg = <25000 1000>;
|
||||||
local-mac-address = [ 00 E0 0C 00 73 01 ];
|
local-mac-address = [ 00 E0 0C 00 73 01 ];
|
||||||
interrupts = <13 2 14 2 18 2>;
|
interrupts = <13 2 14 2 18 2>;
|
||||||
interrupt-parent = <40000>;
|
interrupt-parent = <&mpic>;
|
||||||
phy-handle = <2452001>;
|
phy-handle = <&phy1>;
|
||||||
};
|
};
|
||||||
|
|
||||||
serial@4500 {
|
serial@4500 {
|
||||||
@ -117,7 +110,7 @@
|
|||||||
reg = <4500 100>; // reg base, size
|
reg = <4500 100>; // reg base, size
|
||||||
clock-frequency = <0>; // should we fill in in uboot?
|
clock-frequency = <0>; // should we fill in in uboot?
|
||||||
interrupts = <1a 2>;
|
interrupts = <1a 2>;
|
||||||
interrupt-parent = <40000>;
|
interrupt-parent = <&mpic>;
|
||||||
};
|
};
|
||||||
|
|
||||||
serial@4600 {
|
serial@4600 {
|
||||||
@ -126,57 +119,56 @@
|
|||||||
reg = <4600 100>; // reg base, size
|
reg = <4600 100>; // reg base, size
|
||||||
clock-frequency = <0>; // should we fill in in uboot?
|
clock-frequency = <0>; // should we fill in in uboot?
|
||||||
interrupts = <1a 2>;
|
interrupts = <1a 2>;
|
||||||
interrupt-parent = <40000>;
|
interrupt-parent = <&mpic>;
|
||||||
};
|
};
|
||||||
|
|
||||||
pci@8000 {
|
pci1: pci@8000 {
|
||||||
linux,phandle = <8000>;
|
|
||||||
interrupt-map-mask = <1f800 0 0 7>;
|
interrupt-map-mask = <1f800 0 0 7>;
|
||||||
interrupt-map = <
|
interrupt-map = <
|
||||||
|
|
||||||
/* IDSEL 0x10 */
|
/* IDSEL 0x10 */
|
||||||
08000 0 0 1 40000 30 1
|
08000 0 0 1 &mpic 30 1
|
||||||
08000 0 0 2 40000 31 1
|
08000 0 0 2 &mpic 31 1
|
||||||
08000 0 0 3 40000 32 1
|
08000 0 0 3 &mpic 32 1
|
||||||
08000 0 0 4 40000 33 1
|
08000 0 0 4 &mpic 33 1
|
||||||
|
|
||||||
/* IDSEL 0x11 */
|
/* IDSEL 0x11 */
|
||||||
08800 0 0 1 40000 30 1
|
08800 0 0 1 &mpic 30 1
|
||||||
08800 0 0 2 40000 31 1
|
08800 0 0 2 &mpic 31 1
|
||||||
08800 0 0 3 40000 32 1
|
08800 0 0 3 &mpic 32 1
|
||||||
08800 0 0 4 40000 33 1
|
08800 0 0 4 &mpic 33 1
|
||||||
|
|
||||||
/* IDSEL 0x12 (Slot 1) */
|
/* IDSEL 0x12 (Slot 1) */
|
||||||
09000 0 0 1 40000 30 1
|
09000 0 0 1 &mpic 30 1
|
||||||
09000 0 0 2 40000 31 1
|
09000 0 0 2 &mpic 31 1
|
||||||
09000 0 0 3 40000 32 1
|
09000 0 0 3 &mpic 32 1
|
||||||
09000 0 0 4 40000 33 1
|
09000 0 0 4 &mpic 33 1
|
||||||
|
|
||||||
/* IDSEL 0x13 (Slot 2) */
|
/* IDSEL 0x13 (Slot 2) */
|
||||||
09800 0 0 1 40000 31 1
|
09800 0 0 1 &mpic 31 1
|
||||||
09800 0 0 2 40000 32 1
|
09800 0 0 2 &mpic 32 1
|
||||||
09800 0 0 3 40000 33 1
|
09800 0 0 3 &mpic 33 1
|
||||||
09800 0 0 4 40000 30 1
|
09800 0 0 4 &mpic 30 1
|
||||||
|
|
||||||
/* IDSEL 0x14 (Slot 3) */
|
/* IDSEL 0x14 (Slot 3) */
|
||||||
0a000 0 0 1 40000 32 1
|
0a000 0 0 1 &mpic 32 1
|
||||||
0a000 0 0 2 40000 33 1
|
0a000 0 0 2 &mpic 33 1
|
||||||
0a000 0 0 3 40000 30 1
|
0a000 0 0 3 &mpic 30 1
|
||||||
0a000 0 0 4 40000 31 1
|
0a000 0 0 4 &mpic 31 1
|
||||||
|
|
||||||
/* IDSEL 0x15 (Slot 4) */
|
/* IDSEL 0x15 (Slot 4) */
|
||||||
0a800 0 0 1 40000 33 1
|
0a800 0 0 1 &mpic 33 1
|
||||||
0a800 0 0 2 40000 30 1
|
0a800 0 0 2 &mpic 30 1
|
||||||
0a800 0 0 3 40000 31 1
|
0a800 0 0 3 &mpic 31 1
|
||||||
0a800 0 0 4 40000 32 1
|
0a800 0 0 4 &mpic 32 1
|
||||||
|
|
||||||
/* Bus 1 (Tundra Bridge) */
|
/* Bus 1 (Tundra Bridge) */
|
||||||
/* IDSEL 0x12 (ISA bridge) */
|
/* IDSEL 0x12 (ISA bridge) */
|
||||||
19000 0 0 1 40000 30 1
|
19000 0 0 1 &mpic 30 1
|
||||||
19000 0 0 2 40000 31 1
|
19000 0 0 2 &mpic 31 1
|
||||||
19000 0 0 3 40000 32 1
|
19000 0 0 3 &mpic 32 1
|
||||||
19000 0 0 4 40000 33 1>;
|
19000 0 0 4 &mpic 33 1>;
|
||||||
interrupt-parent = <40000>;
|
interrupt-parent = <&mpic>;
|
||||||
interrupts = <08 2>;
|
interrupts = <08 2>;
|
||||||
bus-range = <0 0>;
|
bus-range = <0 0>;
|
||||||
ranges = <02000000 0 80000000 80000000 0 20000000
|
ranges = <02000000 0 80000000 80000000 0 20000000
|
||||||
@ -200,21 +192,20 @@
|
|||||||
compatible = "chrp,iic";
|
compatible = "chrp,iic";
|
||||||
big-endian;
|
big-endian;
|
||||||
interrupts = <1>;
|
interrupts = <1>;
|
||||||
interrupt-parent = <8000>;
|
interrupt-parent = <&pci1>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
pci@9000 {
|
pci@9000 {
|
||||||
linux,phandle = <9000>;
|
|
||||||
interrupt-map-mask = <f800 0 0 7>;
|
interrupt-map-mask = <f800 0 0 7>;
|
||||||
interrupt-map = <
|
interrupt-map = <
|
||||||
|
|
||||||
/* IDSEL 0x15 */
|
/* IDSEL 0x15 */
|
||||||
a800 0 0 1 40000 3b 1
|
a800 0 0 1 &mpic 3b 1
|
||||||
a800 0 0 2 40000 3b 1
|
a800 0 0 2 &mpic 3b 1
|
||||||
a800 0 0 3 40000 3b 1
|
a800 0 0 3 &mpic 3b 1
|
||||||
a800 0 0 4 40000 3b 1>;
|
a800 0 0 4 &mpic 3b 1>;
|
||||||
interrupt-parent = <40000>;
|
interrupt-parent = <&mpic>;
|
||||||
interrupts = <09 2>;
|
interrupts = <09 2>;
|
||||||
bus-range = <0 0>;
|
bus-range = <0 0>;
|
||||||
ranges = <02000000 0 a0000000 a0000000 0 20000000
|
ranges = <02000000 0 a0000000 a0000000 0 20000000
|
||||||
@ -228,8 +219,7 @@
|
|||||||
device_type = "pci";
|
device_type = "pci";
|
||||||
};
|
};
|
||||||
|
|
||||||
pic@40000 {
|
mpic: pic@40000 {
|
||||||
linux,phandle = <40000>;
|
|
||||||
clock-frequency = <0>;
|
clock-frequency = <0>;
|
||||||
interrupt-controller;
|
interrupt-controller;
|
||||||
#address-cells = <0>;
|
#address-cells = <0>;
|
||||||
|
@ -12,16 +12,14 @@
|
|||||||
|
|
||||||
/ {
|
/ {
|
||||||
model = "MPC8560ADS";
|
model = "MPC8560ADS";
|
||||||
compatible = "MPC85xxADS";
|
compatible = "MPC8560ADS", "MPC85xxADS";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <1>;
|
#size-cells = <1>;
|
||||||
linux,phandle = <100>;
|
|
||||||
|
|
||||||
cpus {
|
cpus {
|
||||||
#cpus = <1>;
|
#cpus = <1>;
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
linux,phandle = <200>;
|
|
||||||
|
|
||||||
PowerPC,8560@0 {
|
PowerPC,8560@0 {
|
||||||
device_type = "cpu";
|
device_type = "cpu";
|
||||||
@ -34,13 +32,11 @@
|
|||||||
bus-frequency = <13ab6680>;
|
bus-frequency = <13ab6680>;
|
||||||
clock-frequency = <312c8040>;
|
clock-frequency = <312c8040>;
|
||||||
32-bit;
|
32-bit;
|
||||||
linux,phandle = <201>;
|
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
memory {
|
memory {
|
||||||
device_type = "memory";
|
device_type = "memory";
|
||||||
linux,phandle = <300>;
|
|
||||||
reg = <00000000 10000000>;
|
reg = <00000000 10000000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -57,33 +53,28 @@
|
|||||||
device_type = "mdio";
|
device_type = "mdio";
|
||||||
compatible = "gianfar";
|
compatible = "gianfar";
|
||||||
reg = <24520 20>;
|
reg = <24520 20>;
|
||||||
linux,phandle = <24520>;
|
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
ethernet-phy@0 {
|
phy0: ethernet-phy@0 {
|
||||||
linux,phandle = <2452000>;
|
interrupt-parent = <&mpic>;
|
||||||
interrupt-parent = <40000>;
|
|
||||||
interrupts = <35 1>;
|
interrupts = <35 1>;
|
||||||
reg = <0>;
|
reg = <0>;
|
||||||
device_type = "ethernet-phy";
|
device_type = "ethernet-phy";
|
||||||
};
|
};
|
||||||
ethernet-phy@1 {
|
phy1: ethernet-phy@1 {
|
||||||
linux,phandle = <2452001>;
|
interrupt-parent = <&mpic>;
|
||||||
interrupt-parent = <40000>;
|
|
||||||
interrupts = <35 1>;
|
interrupts = <35 1>;
|
||||||
reg = <1>;
|
reg = <1>;
|
||||||
device_type = "ethernet-phy";
|
device_type = "ethernet-phy";
|
||||||
};
|
};
|
||||||
ethernet-phy@2 {
|
phy2: ethernet-phy@2 {
|
||||||
linux,phandle = <2452002>;
|
interrupt-parent = <&mpic>;
|
||||||
interrupt-parent = <40000>;
|
|
||||||
interrupts = <37 1>;
|
interrupts = <37 1>;
|
||||||
reg = <2>;
|
reg = <2>;
|
||||||
device_type = "ethernet-phy";
|
device_type = "ethernet-phy";
|
||||||
};
|
};
|
||||||
ethernet-phy@3 {
|
phy3: ethernet-phy@3 {
|
||||||
linux,phandle = <2452003>;
|
interrupt-parent = <&mpic>;
|
||||||
interrupt-parent = <40000>;
|
|
||||||
interrupts = <37 1>;
|
interrupts = <37 1>;
|
||||||
reg = <3>;
|
reg = <3>;
|
||||||
device_type = "ethernet-phy";
|
device_type = "ethernet-phy";
|
||||||
@ -97,8 +88,8 @@
|
|||||||
reg = <24000 1000>;
|
reg = <24000 1000>;
|
||||||
address = [ 00 00 0C 00 00 FD ];
|
address = [ 00 00 0C 00 00 FD ];
|
||||||
interrupts = <d 2 e 2 12 2>;
|
interrupts = <d 2 e 2 12 2>;
|
||||||
interrupt-parent = <40000>;
|
interrupt-parent = <&mpic>;
|
||||||
phy-handle = <2452000>;
|
phy-handle = <&phy0>;
|
||||||
};
|
};
|
||||||
|
|
||||||
ethernet@25000 {
|
ethernet@25000 {
|
||||||
@ -110,12 +101,11 @@
|
|||||||
reg = <25000 1000>;
|
reg = <25000 1000>;
|
||||||
address = [ 00 00 0C 00 01 FD ];
|
address = [ 00 00 0C 00 01 FD ];
|
||||||
interrupts = <13 2 14 2 18 2>;
|
interrupts = <13 2 14 2 18 2>;
|
||||||
interrupt-parent = <40000>;
|
interrupt-parent = <&mpic>;
|
||||||
phy-handle = <2452001>;
|
phy-handle = <&phy1>;
|
||||||
};
|
};
|
||||||
|
|
||||||
pci@8000 {
|
pci@8000 {
|
||||||
linux,phandle = <8000>;
|
|
||||||
#interrupt-cells = <1>;
|
#interrupt-cells = <1>;
|
||||||
#size-cells = <2>;
|
#size-cells = <2>;
|
||||||
#address-cells = <3>;
|
#address-cells = <3>;
|
||||||
@ -127,96 +117,94 @@
|
|||||||
interrupt-map = <
|
interrupt-map = <
|
||||||
|
|
||||||
/* IDSEL 0x2 */
|
/* IDSEL 0x2 */
|
||||||
1000 0 0 1 40000 31 1
|
1000 0 0 1 &mpic 31 1
|
||||||
1000 0 0 2 40000 32 1
|
1000 0 0 2 &mpic 32 1
|
||||||
1000 0 0 3 40000 33 1
|
1000 0 0 3 &mpic 33 1
|
||||||
1000 0 0 4 40000 34 1
|
1000 0 0 4 &mpic 34 1
|
||||||
|
|
||||||
/* IDSEL 0x3 */
|
/* IDSEL 0x3 */
|
||||||
1800 0 0 1 40000 34 1
|
1800 0 0 1 &mpic 34 1
|
||||||
1800 0 0 2 40000 31 1
|
1800 0 0 2 &mpic 31 1
|
||||||
1800 0 0 3 40000 32 1
|
1800 0 0 3 &mpic 32 1
|
||||||
1800 0 0 4 40000 33 1
|
1800 0 0 4 &mpic 33 1
|
||||||
|
|
||||||
/* IDSEL 0x4 */
|
/* IDSEL 0x4 */
|
||||||
2000 0 0 1 40000 33 1
|
2000 0 0 1 &mpic 33 1
|
||||||
2000 0 0 2 40000 34 1
|
2000 0 0 2 &mpic 34 1
|
||||||
2000 0 0 3 40000 31 1
|
2000 0 0 3 &mpic 31 1
|
||||||
2000 0 0 4 40000 32 1
|
2000 0 0 4 &mpic 32 1
|
||||||
|
|
||||||
/* IDSEL 0x5 */
|
/* IDSEL 0x5 */
|
||||||
2800 0 0 1 40000 32 1
|
2800 0 0 1 &mpic 32 1
|
||||||
2800 0 0 2 40000 33 1
|
2800 0 0 2 &mpic 33 1
|
||||||
2800 0 0 3 40000 34 1
|
2800 0 0 3 &mpic 34 1
|
||||||
2800 0 0 4 40000 31 1
|
2800 0 0 4 &mpic 31 1
|
||||||
|
|
||||||
/* IDSEL 12 */
|
/* IDSEL 12 */
|
||||||
6000 0 0 1 40000 31 1
|
6000 0 0 1 &mpic 31 1
|
||||||
6000 0 0 2 40000 32 1
|
6000 0 0 2 &mpic 32 1
|
||||||
6000 0 0 3 40000 33 1
|
6000 0 0 3 &mpic 33 1
|
||||||
6000 0 0 4 40000 34 1
|
6000 0 0 4 &mpic 34 1
|
||||||
|
|
||||||
/* IDSEL 13 */
|
/* IDSEL 13 */
|
||||||
6800 0 0 1 40000 34 1
|
6800 0 0 1 &mpic 34 1
|
||||||
6800 0 0 2 40000 31 1
|
6800 0 0 2 &mpic 31 1
|
||||||
6800 0 0 3 40000 32 1
|
6800 0 0 3 &mpic 32 1
|
||||||
6800 0 0 4 40000 33 1
|
6800 0 0 4 &mpic 33 1
|
||||||
|
|
||||||
/* IDSEL 14*/
|
/* IDSEL 14*/
|
||||||
7000 0 0 1 40000 33 1
|
7000 0 0 1 &mpic 33 1
|
||||||
7000 0 0 2 40000 34 1
|
7000 0 0 2 &mpic 34 1
|
||||||
7000 0 0 3 40000 31 1
|
7000 0 0 3 &mpic 31 1
|
||||||
7000 0 0 4 40000 32 1
|
7000 0 0 4 &mpic 32 1
|
||||||
|
|
||||||
/* IDSEL 15 */
|
/* IDSEL 15 */
|
||||||
7800 0 0 1 40000 32 1
|
7800 0 0 1 &mpic 32 1
|
||||||
7800 0 0 2 40000 33 1
|
7800 0 0 2 &mpic 33 1
|
||||||
7800 0 0 3 40000 34 1
|
7800 0 0 3 &mpic 34 1
|
||||||
7800 0 0 4 40000 31 1
|
7800 0 0 4 &mpic 31 1
|
||||||
|
|
||||||
/* IDSEL 18 */
|
/* IDSEL 18 */
|
||||||
9000 0 0 1 40000 31 1
|
9000 0 0 1 &mpic 31 1
|
||||||
9000 0 0 2 40000 32 1
|
9000 0 0 2 &mpic 32 1
|
||||||
9000 0 0 3 40000 33 1
|
9000 0 0 3 &mpic 33 1
|
||||||
9000 0 0 4 40000 34 1
|
9000 0 0 4 &mpic 34 1
|
||||||
|
|
||||||
/* IDSEL 19 */
|
/* IDSEL 19 */
|
||||||
9800 0 0 1 40000 34 1
|
9800 0 0 1 &mpic 34 1
|
||||||
9800 0 0 2 40000 31 1
|
9800 0 0 2 &mpic 31 1
|
||||||
9800 0 0 3 40000 32 1
|
9800 0 0 3 &mpic 32 1
|
||||||
9800 0 0 4 40000 33 1
|
9800 0 0 4 &mpic 33 1
|
||||||
|
|
||||||
/* IDSEL 20 */
|
/* IDSEL 20 */
|
||||||
a000 0 0 1 40000 33 1
|
a000 0 0 1 &mpic 33 1
|
||||||
a000 0 0 2 40000 34 1
|
a000 0 0 2 &mpic 34 1
|
||||||
a000 0 0 3 40000 31 1
|
a000 0 0 3 &mpic 31 1
|
||||||
a000 0 0 4 40000 32 1
|
a000 0 0 4 &mpic 32 1
|
||||||
|
|
||||||
/* IDSEL 21 */
|
/* IDSEL 21 */
|
||||||
a800 0 0 1 40000 32 1
|
a800 0 0 1 &mpic 32 1
|
||||||
a800 0 0 2 40000 33 1
|
a800 0 0 2 &mpic 33 1
|
||||||
a800 0 0 3 40000 34 1
|
a800 0 0 3 &mpic 34 1
|
||||||
a800 0 0 4 40000 31 1>;
|
a800 0 0 4 &mpic 31 1>;
|
||||||
|
|
||||||
interrupt-parent = <40000>;
|
interrupt-parent = <&mpic>;
|
||||||
interrupts = <8 0>;
|
interrupts = <8 0>;
|
||||||
bus-range = <0 0>;
|
bus-range = <0 0>;
|
||||||
ranges = <02000000 0 80000000 80000000 0 20000000
|
ranges = <02000000 0 80000000 80000000 0 20000000
|
||||||
01000000 0 00000000 e2000000 0 01000000>;
|
01000000 0 00000000 e2000000 0 01000000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
pic@40000 {
|
mpic: pic@40000 {
|
||||||
linux,phandle = <40000>;
|
|
||||||
interrupt-controller;
|
interrupt-controller;
|
||||||
#address-cells = <0>;
|
#address-cells = <0>;
|
||||||
#interrupt-cells = <2>;
|
#interrupt-cells = <2>;
|
||||||
reg = <40000 20100>;
|
reg = <40000 40000>;
|
||||||
built-in;
|
built-in;
|
||||||
device_type = "open-pic";
|
device_type = "open-pic";
|
||||||
};
|
};
|
||||||
|
|
||||||
cpm@e0000000 {
|
cpm@e0000000 {
|
||||||
linux,phandle = <e0000000>;
|
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <1>;
|
#size-cells = <1>;
|
||||||
#interrupt-cells = <2>;
|
#interrupt-cells = <2>;
|
||||||
@ -227,13 +215,12 @@
|
|||||||
command-proc = <919c0>;
|
command-proc = <919c0>;
|
||||||
brg-frequency = <9d5b340>;
|
brg-frequency = <9d5b340>;
|
||||||
|
|
||||||
pic@90c00 {
|
cpmpic: pic@90c00 {
|
||||||
linux,phandle = <90c00>;
|
|
||||||
interrupt-controller;
|
interrupt-controller;
|
||||||
#address-cells = <0>;
|
#address-cells = <0>;
|
||||||
#interrupt-cells = <2>;
|
#interrupt-cells = <2>;
|
||||||
interrupts = <1e 0>;
|
interrupts = <1e 0>;
|
||||||
interrupt-parent = <40000>;
|
interrupt-parent = <&mpic>;
|
||||||
reg = <90c00 80>;
|
reg = <90c00 80>;
|
||||||
built-in;
|
built-in;
|
||||||
device_type = "cpm-pic";
|
device_type = "cpm-pic";
|
||||||
@ -250,7 +237,7 @@
|
|||||||
tx-clock = <1>;
|
tx-clock = <1>;
|
||||||
current-speed = <1c200>;
|
current-speed = <1c200>;
|
||||||
interrupts = <28 8>;
|
interrupts = <28 8>;
|
||||||
interrupt-parent = <90c00>;
|
interrupt-parent = <&cpmpic>;
|
||||||
};
|
};
|
||||||
|
|
||||||
scc@91a20 {
|
scc@91a20 {
|
||||||
@ -264,7 +251,7 @@
|
|||||||
tx-clock = <2>;
|
tx-clock = <2>;
|
||||||
current-speed = <1c200>;
|
current-speed = <1c200>;
|
||||||
interrupts = <29 8>;
|
interrupts = <29 8>;
|
||||||
interrupt-parent = <90c00>;
|
interrupt-parent = <&cpmpic>;
|
||||||
};
|
};
|
||||||
|
|
||||||
fcc@91320 {
|
fcc@91320 {
|
||||||
@ -278,8 +265,8 @@
|
|||||||
rx-clock = <15>;
|
rx-clock = <15>;
|
||||||
tx-clock = <16>;
|
tx-clock = <16>;
|
||||||
interrupts = <21 8>;
|
interrupts = <21 8>;
|
||||||
interrupt-parent = <90c00>;
|
interrupt-parent = <&cpmpic>;
|
||||||
phy-handle = <2452002>;
|
phy-handle = <&phy2>;
|
||||||
};
|
};
|
||||||
|
|
||||||
fcc@91340 {
|
fcc@91340 {
|
||||||
@ -293,8 +280,8 @@
|
|||||||
rx-clock = <17>;
|
rx-clock = <17>;
|
||||||
tx-clock = <18>;
|
tx-clock = <18>;
|
||||||
interrupts = <22 8>;
|
interrupts = <22 8>;
|
||||||
interrupt-parent = <90c00>;
|
interrupt-parent = <&cpmpic>;
|
||||||
phy-handle = <2452003>;
|
phy-handle = <&phy3>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
@ -16,16 +16,14 @@
|
|||||||
|
|
||||||
/ {
|
/ {
|
||||||
model = "MPC8568EMDS";
|
model = "MPC8568EMDS";
|
||||||
compatible = "MPC85xxMDS";
|
compatible = "MPC8568EMDS", "MPC85xxMDS";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <1>;
|
#size-cells = <1>;
|
||||||
linux,phandle = <100>;
|
|
||||||
|
|
||||||
cpus {
|
cpus {
|
||||||
#cpus = <1>;
|
#cpus = <1>;
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
linux,phandle = <200>;
|
|
||||||
|
|
||||||
PowerPC,8568@0 {
|
PowerPC,8568@0 {
|
||||||
device_type = "cpu";
|
device_type = "cpu";
|
||||||
@ -38,13 +36,11 @@
|
|||||||
bus-frequency = <0>;
|
bus-frequency = <0>;
|
||||||
clock-frequency = <0>;
|
clock-frequency = <0>;
|
||||||
32-bit;
|
32-bit;
|
||||||
linux,phandle = <201>;
|
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
memory {
|
memory {
|
||||||
device_type = "memory";
|
device_type = "memory";
|
||||||
linux,phandle = <300>;
|
|
||||||
reg = <00000000 10000000>;
|
reg = <00000000 10000000>;
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -67,7 +63,7 @@
|
|||||||
compatible = "fsl-i2c";
|
compatible = "fsl-i2c";
|
||||||
reg = <3000 100>;
|
reg = <3000 100>;
|
||||||
interrupts = <1b 2>;
|
interrupts = <1b 2>;
|
||||||
interrupt-parent = <40000>;
|
interrupt-parent = <&mpic>;
|
||||||
dfsrr;
|
dfsrr;
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -76,7 +72,7 @@
|
|||||||
compatible = "fsl-i2c";
|
compatible = "fsl-i2c";
|
||||||
reg = <3100 100>;
|
reg = <3100 100>;
|
||||||
interrupts = <1b 2>;
|
interrupts = <1b 2>;
|
||||||
interrupt-parent = <40000>;
|
interrupt-parent = <&mpic>;
|
||||||
dfsrr;
|
dfsrr;
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -86,32 +82,26 @@
|
|||||||
device_type = "mdio";
|
device_type = "mdio";
|
||||||
compatible = "gianfar";
|
compatible = "gianfar";
|
||||||
reg = <24520 20>;
|
reg = <24520 20>;
|
||||||
linux,phandle = <24520>;
|
phy0: ethernet-phy@0 {
|
||||||
ethernet-phy@0 {
|
interrupt-parent = <&mpic>;
|
||||||
linux,phandle = <2452000>;
|
|
||||||
interrupt-parent = <40000>;
|
|
||||||
interrupts = <31 1>;
|
interrupts = <31 1>;
|
||||||
reg = <0>;
|
reg = <0>;
|
||||||
device_type = "ethernet-phy";
|
device_type = "ethernet-phy";
|
||||||
};
|
};
|
||||||
ethernet-phy@1 {
|
phy1: ethernet-phy@1 {
|
||||||
linux,phandle = <2452001>;
|
interrupt-parent = <&mpic>;
|
||||||
interrupt-parent = <40000>;
|
|
||||||
interrupts = <32 1>;
|
interrupts = <32 1>;
|
||||||
reg = <1>;
|
reg = <1>;
|
||||||
device_type = "ethernet-phy";
|
device_type = "ethernet-phy";
|
||||||
};
|
};
|
||||||
|
phy2: ethernet-phy@2 {
|
||||||
ethernet-phy@2 {
|
interrupt-parent = <&mpic>;
|
||||||
linux,phandle = <2452002>;
|
|
||||||
interrupt-parent = <40000>;
|
|
||||||
interrupts = <31 1>;
|
interrupts = <31 1>;
|
||||||
reg = <2>;
|
reg = <2>;
|
||||||
device_type = "ethernet-phy";
|
device_type = "ethernet-phy";
|
||||||
};
|
};
|
||||||
ethernet-phy@3 {
|
phy3: ethernet-phy@3 {
|
||||||
linux,phandle = <2452003>;
|
interrupt-parent = <&mpic>;
|
||||||
interrupt-parent = <40000>;
|
|
||||||
interrupts = <32 1>;
|
interrupts = <32 1>;
|
||||||
reg = <3>;
|
reg = <3>;
|
||||||
device_type = "ethernet-phy";
|
device_type = "ethernet-phy";
|
||||||
@ -127,8 +117,8 @@
|
|||||||
reg = <24000 1000>;
|
reg = <24000 1000>;
|
||||||
mac-address = [ 00 00 00 00 00 00 ];
|
mac-address = [ 00 00 00 00 00 00 ];
|
||||||
interrupts = <d 2 e 2 12 2>;
|
interrupts = <d 2 e 2 12 2>;
|
||||||
interrupt-parent = <40000>;
|
interrupt-parent = <&mpic>;
|
||||||
phy-handle = <2452002>;
|
phy-handle = <&phy2>;
|
||||||
};
|
};
|
||||||
|
|
||||||
ethernet@25000 {
|
ethernet@25000 {
|
||||||
@ -140,8 +130,8 @@
|
|||||||
reg = <25000 1000>;
|
reg = <25000 1000>;
|
||||||
mac-address = [ 00 00 00 00 00 00];
|
mac-address = [ 00 00 00 00 00 00];
|
||||||
interrupts = <13 2 14 2 18 2>;
|
interrupts = <13 2 14 2 18 2>;
|
||||||
interrupt-parent = <40000>;
|
interrupt-parent = <&mpic>;
|
||||||
phy-handle = <2452003>;
|
phy-handle = <&phy3>;
|
||||||
};
|
};
|
||||||
|
|
||||||
serial@4500 {
|
serial@4500 {
|
||||||
@ -150,7 +140,7 @@
|
|||||||
reg = <4500 100>;
|
reg = <4500 100>;
|
||||||
clock-frequency = <0>;
|
clock-frequency = <0>;
|
||||||
interrupts = <1a 2>;
|
interrupts = <1a 2>;
|
||||||
interrupt-parent = <40000>;
|
interrupt-parent = <&mpic>;
|
||||||
};
|
};
|
||||||
|
|
||||||
serial@4600 {
|
serial@4600 {
|
||||||
@ -159,7 +149,7 @@
|
|||||||
reg = <4600 100>;
|
reg = <4600 100>;
|
||||||
clock-frequency = <0>;
|
clock-frequency = <0>;
|
||||||
interrupts = <1a 2>;
|
interrupts = <1a 2>;
|
||||||
interrupt-parent = <40000>;
|
interrupt-parent = <&mpic>;
|
||||||
};
|
};
|
||||||
|
|
||||||
crypto@30000 {
|
crypto@30000 {
|
||||||
@ -168,15 +158,14 @@
|
|||||||
compatible = "talitos";
|
compatible = "talitos";
|
||||||
reg = <30000 f000>;
|
reg = <30000 f000>;
|
||||||
interrupts = <1d 2>;
|
interrupts = <1d 2>;
|
||||||
interrupt-parent = <40000>;
|
interrupt-parent = <&mpic>;
|
||||||
num-channels = <4>;
|
num-channels = <4>;
|
||||||
channel-fifo-len = <18>;
|
channel-fifo-len = <18>;
|
||||||
exec-units-mask = <000000fe>;
|
exec-units-mask = <000000fe>;
|
||||||
descriptor-types-mask = <012b0ebf>;
|
descriptor-types-mask = <012b0ebf>;
|
||||||
};
|
};
|
||||||
|
|
||||||
pic@40000 {
|
mpic: pic@40000 {
|
||||||
linux,phandle = <40000>;
|
|
||||||
clock-frequency = <0>;
|
clock-frequency = <0>;
|
||||||
interrupt-controller;
|
interrupt-controller;
|
||||||
#address-cells = <0>;
|
#address-cells = <0>;
|
||||||
@ -192,8 +181,7 @@
|
|||||||
device_type = "par_io";
|
device_type = "par_io";
|
||||||
num-ports = <7>;
|
num-ports = <7>;
|
||||||
|
|
||||||
ucc_pin@01 {
|
pio1: ucc_pin@01 {
|
||||||
linux,phandle = <e010001>;
|
|
||||||
pio-map = <
|
pio-map = <
|
||||||
/* port pin dir open_drain assignment has_irq */
|
/* port pin dir open_drain assignment has_irq */
|
||||||
4 0a 1 0 2 0 /* TxD0 */
|
4 0a 1 0 2 0 /* TxD0 */
|
||||||
@ -220,8 +208,7 @@
|
|||||||
4 13 1 0 2 0 /* GTX_CLK */
|
4 13 1 0 2 0 /* GTX_CLK */
|
||||||
1 1f 2 0 3 0>; /* GTX125 */
|
1 1f 2 0 3 0>; /* GTX125 */
|
||||||
};
|
};
|
||||||
ucc_pin@02 {
|
pio2: ucc_pin@02 {
|
||||||
linux,phandle = <e010002>;
|
|
||||||
pio-map = <
|
pio-map = <
|
||||||
/* port pin dir open_drain assignment has_irq */
|
/* port pin dir open_drain assignment has_irq */
|
||||||
5 0a 1 0 2 0 /* TxD0 */
|
5 0a 1 0 2 0 /* TxD0 */
|
||||||
@ -277,7 +264,7 @@
|
|||||||
compatible = "fsl_spi";
|
compatible = "fsl_spi";
|
||||||
reg = <4c0 40>;
|
reg = <4c0 40>;
|
||||||
interrupts = <2>;
|
interrupts = <2>;
|
||||||
interrupt-parent = <80>;
|
interrupt-parent = <&qeic>;
|
||||||
mode = "cpu";
|
mode = "cpu";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -286,7 +273,7 @@
|
|||||||
compatible = "fsl_spi";
|
compatible = "fsl_spi";
|
||||||
reg = <500 40>;
|
reg = <500 40>;
|
||||||
interrupts = <1>;
|
interrupts = <1>;
|
||||||
interrupt-parent = <80>;
|
interrupt-parent = <&qeic>;
|
||||||
mode = "cpu";
|
mode = "cpu";
|
||||||
};
|
};
|
||||||
|
|
||||||
@ -297,12 +284,12 @@
|
|||||||
device-id = <1>;
|
device-id = <1>;
|
||||||
reg = <2000 200>;
|
reg = <2000 200>;
|
||||||
interrupts = <20>;
|
interrupts = <20>;
|
||||||
interrupt-parent = <80>;
|
interrupt-parent = <&qeic>;
|
||||||
mac-address = [ 00 04 9f 00 23 23 ];
|
mac-address = [ 00 04 9f 00 23 23 ];
|
||||||
rx-clock = <0>;
|
rx-clock = <0>;
|
||||||
tx-clock = <19>;
|
tx-clock = <19>;
|
||||||
phy-handle = <212000>;
|
phy-handle = <&qe_phy0>;
|
||||||
pio-handle = <e010001>;
|
pio-handle = <&pio1>;
|
||||||
};
|
};
|
||||||
|
|
||||||
ucc@3000 {
|
ucc@3000 {
|
||||||
@ -312,12 +299,12 @@
|
|||||||
device-id = <2>;
|
device-id = <2>;
|
||||||
reg = <3000 200>;
|
reg = <3000 200>;
|
||||||
interrupts = <21>;
|
interrupts = <21>;
|
||||||
interrupt-parent = <80>;
|
interrupt-parent = <&qeic>;
|
||||||
mac-address = [ 00 11 22 33 44 55 ];
|
mac-address = [ 00 11 22 33 44 55 ];
|
||||||
rx-clock = <0>;
|
rx-clock = <0>;
|
||||||
tx-clock = <14>;
|
tx-clock = <14>;
|
||||||
phy-handle = <212001>;
|
phy-handle = <&qe_phy1>;
|
||||||
pio-handle = <e010002>;
|
pio-handle = <&pio2>;
|
||||||
};
|
};
|
||||||
|
|
||||||
mdio@2120 {
|
mdio@2120 {
|
||||||
@ -329,33 +316,29 @@
|
|||||||
|
|
||||||
/* These are the same PHYs as on
|
/* These are the same PHYs as on
|
||||||
* gianfar's MDIO bus */
|
* gianfar's MDIO bus */
|
||||||
ethernet-phy@00 {
|
qe_phy0: ethernet-phy@00 {
|
||||||
linux,phandle = <212000>;
|
interrupt-parent = <&mpic>;
|
||||||
interrupt-parent = <40000>;
|
|
||||||
interrupts = <31 1>;
|
interrupts = <31 1>;
|
||||||
reg = <0>;
|
reg = <0>;
|
||||||
device_type = "ethernet-phy";
|
device_type = "ethernet-phy";
|
||||||
interface = <6>; //ENET_1000_GMII
|
interface = <6>; //ENET_1000_GMII
|
||||||
};
|
};
|
||||||
ethernet-phy@01 {
|
qe_phy1: ethernet-phy@01 {
|
||||||
linux,phandle = <212001>;
|
interrupt-parent = <&mpic>;
|
||||||
interrupt-parent = <40000>;
|
|
||||||
interrupts = <32 1>;
|
interrupts = <32 1>;
|
||||||
reg = <1>;
|
reg = <1>;
|
||||||
device_type = "ethernet-phy";
|
device_type = "ethernet-phy";
|
||||||
interface = <6>;
|
interface = <6>;
|
||||||
};
|
};
|
||||||
ethernet-phy@02 {
|
qe_phy2: ethernet-phy@02 {
|
||||||
linux,phandle = <212002>;
|
interrupt-parent = <&mpic>;
|
||||||
interrupt-parent = <40000>;
|
|
||||||
interrupts = <31 1>;
|
interrupts = <31 1>;
|
||||||
reg = <2>;
|
reg = <2>;
|
||||||
device_type = "ethernet-phy";
|
device_type = "ethernet-phy";
|
||||||
interface = <6>; //ENET_1000_GMII
|
interface = <6>; //ENET_1000_GMII
|
||||||
};
|
};
|
||||||
ethernet-phy@03 {
|
qe_phy3: ethernet-phy@03 {
|
||||||
linux,phandle = <212003>;
|
interrupt-parent = <&mpic>;
|
||||||
interrupt-parent = <40000>;
|
|
||||||
interrupts = <32 1>;
|
interrupts = <32 1>;
|
||||||
reg = <3>;
|
reg = <3>;
|
||||||
device_type = "ethernet-phy";
|
device_type = "ethernet-phy";
|
||||||
@ -363,8 +346,7 @@
|
|||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
qeic@80 {
|
qeic: qeic@80 {
|
||||||
linux,phandle = <80>;
|
|
||||||
interrupt-controller;
|
interrupt-controller;
|
||||||
device_type = "qeic";
|
device_type = "qeic";
|
||||||
#address-cells = <0>;
|
#address-cells = <0>;
|
||||||
@ -373,7 +355,7 @@
|
|||||||
built-in;
|
built-in;
|
||||||
big-endian;
|
big-endian;
|
||||||
interrupts = <1e 2 1e 2>; //high:30 low:30
|
interrupts = <1e 2 1e 2>; //high:30 low:30
|
||||||
interrupt-parent = <40000>;
|
interrupt-parent = <&mpic>;
|
||||||
};
|
};
|
||||||
|
|
||||||
};
|
};
|
||||||
|
Loading…
Reference in New Issue
Block a user