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ARM: dts: r8a7745: Remove unit-address and reg from integrated cache

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The Cortex-A7 cache controller is an integrated controller, and thus the
device node representing it should not have a unit-addresses or reg
property.

Fixes: c95360247b ("ARM: dts: r8a7745: initial SoC device tree")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Geert Uytterhoeven 2017-03-06 17:40:38 +01:00 committed by Simon Horman
parent 37f0c804e5
commit 51c00a9f73
1 changed files with 1 additions and 2 deletions
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3
arch/arm/boot/dts/r8a7745.dtsi
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@ -32,9 +32,8 @@
next-level-cache = <&L2_CA7>;
};
L2_CA7: cache-controller@0 {
L2_CA7: cache-controller-0 {
compatible = "cache";
reg = <0>;
cache-unified;
cache-level = <2>;
power-domains = <&sysc R8A7745_PD_CA7_SCU>;