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mlx4: allow order-0 memory allocations in RX path
Signed-off-by: Eric Dumazet <edumazet@google.com> mlx4 exclusively uses order-2 allocations in RX path, which are likely to fail under memory pressure. We therefore drop frames more than needed. This patch tries order-3, order-2, order-1 and finally order-0 allocations to keep good performance, yet allow allocations if/when memory gets fragmented. By using larger pages, and avoiding unnecessary get_page()/put_page() on compound pages, this patch improves performance as well, lowering false sharing on struct page. Also use GFP_KERNEL allocations in initialization path, as allocating 12 MB (390 order-3 pages) can easily fail with GFP_ATOMIC. Signed-off-by: Eric Dumazet <edumazet@google.com> Cc: Amir Vadai <amirv@mellanox.com> Acked-by: Or Gerlitz <ogerlitz@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Eric Dumazet
David S. Miller
parent
3bae9db9aa
commit
51151a16a6
@ -43,40 +43,64 @@
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#include "mlx4_en.h"
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static int mlx4_alloc_pages(struct mlx4_en_priv *priv,
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struct mlx4_en_rx_alloc *page_alloc,
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const struct mlx4_en_frag_info *frag_info,
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gfp_t _gfp)
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{
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int order;
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struct page *page;
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dma_addr_t dma;
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for (order = MLX4_EN_ALLOC_PREFER_ORDER; ;) {
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gfp_t gfp = _gfp;
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if (order)
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gfp |= __GFP_COMP | __GFP_NOWARN;
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page = alloc_pages(gfp, order);
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if (likely(page))
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break;
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if (--order < 0 ||
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((PAGE_SIZE << order) < frag_info->frag_size))
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return -ENOMEM;
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}
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dma = dma_map_page(priv->ddev, page, 0, PAGE_SIZE << order,
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PCI_DMA_FROMDEVICE);
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if (dma_mapping_error(priv->ddev, dma)) {
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put_page(page);
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return -ENOMEM;
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}
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page_alloc->size = PAGE_SIZE << order;
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page_alloc->page = page;
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page_alloc->dma = dma;
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page_alloc->offset = frag_info->frag_align;
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/* Not doing get_page() for each frag is a big win
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* on asymetric workloads.
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*/
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atomic_set(&page->_count, page_alloc->size / frag_info->frag_stride);
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return 0;
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}
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static int mlx4_en_alloc_frags(struct mlx4_en_priv *priv,
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struct mlx4_en_rx_desc *rx_desc,
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struct mlx4_en_rx_alloc *frags,
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struct mlx4_en_rx_alloc *ring_alloc)
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struct mlx4_en_rx_alloc *ring_alloc,
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gfp_t gfp)
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{
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struct mlx4_en_rx_alloc page_alloc[MLX4_EN_MAX_RX_FRAGS];
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struct mlx4_en_frag_info *frag_info;
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const struct mlx4_en_frag_info *frag_info;
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struct page *page;
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dma_addr_t dma;
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int i;
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for (i = 0; i < priv->num_frags; i++) {
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frag_info = &priv->frag_info[i];
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if (ring_alloc[i].offset == frag_info->last_offset) {
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page = alloc_pages(GFP_ATOMIC | __GFP_COMP,
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MLX4_EN_ALLOC_ORDER);
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if (!page)
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goto out;
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dma = dma_map_page(priv->ddev, page, 0,
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MLX4_EN_ALLOC_SIZE, PCI_DMA_FROMDEVICE);
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if (dma_mapping_error(priv->ddev, dma)) {
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put_page(page);
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goto out;
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}
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page_alloc[i].page = page;
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page_alloc[i].dma = dma;
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page_alloc[i].offset = frag_info->frag_align;
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} else {
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page_alloc[i].page = ring_alloc[i].page;
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get_page(ring_alloc[i].page);
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page_alloc[i].dma = ring_alloc[i].dma;
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page_alloc[i].offset = ring_alloc[i].offset +
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frag_info->frag_stride;
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}
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page_alloc[i] = ring_alloc[i];
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page_alloc[i].offset += frag_info->frag_stride;
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if (page_alloc[i].offset + frag_info->frag_stride <= ring_alloc[i].size)
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continue;
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if (mlx4_alloc_pages(priv, &page_alloc[i], frag_info, gfp))
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goto out;
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}
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for (i = 0; i < priv->num_frags; i++) {
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@ -88,14 +112,16 @@ static int mlx4_en_alloc_frags(struct mlx4_en_priv *priv,
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return 0;
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out:
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while (i--) {
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frag_info = &priv->frag_info[i];
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if (ring_alloc[i].offset == frag_info->last_offset)
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if (page_alloc[i].page != ring_alloc[i].page) {
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dma_unmap_page(priv->ddev, page_alloc[i].dma,
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MLX4_EN_ALLOC_SIZE, PCI_DMA_FROMDEVICE);
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put_page(page_alloc[i].page);
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page_alloc[i].size, PCI_DMA_FROMDEVICE);
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page = page_alloc[i].page;
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atomic_set(&page->_count, 1);
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put_page(page);
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}
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}
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return -ENOMEM;
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}
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@ -104,12 +130,12 @@ static void mlx4_en_free_frag(struct mlx4_en_priv *priv,
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struct mlx4_en_rx_alloc *frags,
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int i)
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{
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struct mlx4_en_frag_info *frag_info = &priv->frag_info[i];
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const struct mlx4_en_frag_info *frag_info = &priv->frag_info[i];
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if (frags[i].offset == frag_info->last_offset) {
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dma_unmap_page(priv->ddev, frags[i].dma, MLX4_EN_ALLOC_SIZE,
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if (frags[i].offset + frag_info->frag_stride > frags[i].size)
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dma_unmap_page(priv->ddev, frags[i].dma, frags[i].size,
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PCI_DMA_FROMDEVICE);
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}
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if (frags[i].page)
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put_page(frags[i].page);
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}
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@ -117,35 +143,28 @@ static void mlx4_en_free_frag(struct mlx4_en_priv *priv,
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static int mlx4_en_init_allocator(struct mlx4_en_priv *priv,
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struct mlx4_en_rx_ring *ring)
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{
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struct mlx4_en_rx_alloc *page_alloc;
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int i;
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struct mlx4_en_rx_alloc *page_alloc;
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for (i = 0; i < priv->num_frags; i++) {
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page_alloc = &ring->page_alloc[i];
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page_alloc->page = alloc_pages(GFP_ATOMIC | __GFP_COMP,
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MLX4_EN_ALLOC_ORDER);
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if (!page_alloc->page)
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goto out;
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const struct mlx4_en_frag_info *frag_info = &priv->frag_info[i];
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page_alloc->dma = dma_map_page(priv->ddev, page_alloc->page, 0,
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MLX4_EN_ALLOC_SIZE, PCI_DMA_FROMDEVICE);
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if (dma_mapping_error(priv->ddev, page_alloc->dma)) {
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put_page(page_alloc->page);
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page_alloc->page = NULL;
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if (mlx4_alloc_pages(priv, &ring->page_alloc[i],
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frag_info, GFP_KERNEL))
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goto out;
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}
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page_alloc->offset = priv->frag_info[i].frag_align;
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en_dbg(DRV, priv, "Initialized allocator:%d with page:%p\n",
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i, page_alloc->page);
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}
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return 0;
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out:
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while (i--) {
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struct page *page;
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page_alloc = &ring->page_alloc[i];
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dma_unmap_page(priv->ddev, page_alloc->dma,
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MLX4_EN_ALLOC_SIZE, PCI_DMA_FROMDEVICE);
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put_page(page_alloc->page);
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page_alloc->size, PCI_DMA_FROMDEVICE);
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page = page_alloc->page;
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atomic_set(&page->_count, 1);
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put_page(page);
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page_alloc->page = NULL;
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}
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return -ENOMEM;
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@ -158,13 +177,18 @@ static void mlx4_en_destroy_allocator(struct mlx4_en_priv *priv,
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int i;
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for (i = 0; i < priv->num_frags; i++) {
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const struct mlx4_en_frag_info *frag_info = &priv->frag_info[i];
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page_alloc = &ring->page_alloc[i];
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en_dbg(DRV, priv, "Freeing allocator:%d count:%d\n",
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i, page_count(page_alloc->page));
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dma_unmap_page(priv->ddev, page_alloc->dma,
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MLX4_EN_ALLOC_SIZE, PCI_DMA_FROMDEVICE);
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put_page(page_alloc->page);
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page_alloc->size, PCI_DMA_FROMDEVICE);
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while (page_alloc->offset + frag_info->frag_stride < page_alloc->size) {
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put_page(page_alloc->page);
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page_alloc->offset += frag_info->frag_stride;
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}
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page_alloc->page = NULL;
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}
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}
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@ -195,13 +219,14 @@ static void mlx4_en_init_rx_desc(struct mlx4_en_priv *priv,
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}
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static int mlx4_en_prepare_rx_desc(struct mlx4_en_priv *priv,
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struct mlx4_en_rx_ring *ring, int index)
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struct mlx4_en_rx_ring *ring, int index,
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gfp_t gfp)
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{
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struct mlx4_en_rx_desc *rx_desc = ring->buf + (index * ring->stride);
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struct mlx4_en_rx_alloc *frags = ring->rx_info +
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(index << priv->log_rx_info);
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return mlx4_en_alloc_frags(priv, rx_desc, frags, ring->page_alloc);
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return mlx4_en_alloc_frags(priv, rx_desc, frags, ring->page_alloc, gfp);
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}
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static inline void mlx4_en_update_rx_prod_db(struct mlx4_en_rx_ring *ring)
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@ -235,7 +260,8 @@ static int mlx4_en_fill_rx_buffers(struct mlx4_en_priv *priv)
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ring = &priv->rx_ring[ring_ind];
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if (mlx4_en_prepare_rx_desc(priv, ring,
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ring->actual_size)) {
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ring->actual_size,
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GFP_KERNEL)) {
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if (ring->actual_size < MLX4_EN_MIN_RX_SIZE) {
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en_err(priv, "Failed to allocate "
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"enough rx buffers\n");
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@ -450,11 +476,11 @@ static int mlx4_en_complete_rx_desc(struct mlx4_en_priv *priv,
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DMA_FROM_DEVICE);
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/* Save page reference in skb */
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get_page(frags[nr].page);
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__skb_frag_set_page(&skb_frags_rx[nr], frags[nr].page);
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skb_frag_size_set(&skb_frags_rx[nr], frag_info->frag_size);
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skb_frags_rx[nr].page_offset = frags[nr].offset;
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skb->truesize += frag_info->frag_stride;
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frags[nr].page = NULL;
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}
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/* Adjust size of last fragment to match actual length */
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if (nr > 0)
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@ -547,7 +573,7 @@ static void mlx4_en_refill_rx_buffers(struct mlx4_en_priv *priv,
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int index = ring->prod & ring->size_mask;
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while ((u32) (ring->prod - ring->cons) < ring->actual_size) {
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if (mlx4_en_prepare_rx_desc(priv, ring, index))
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if (mlx4_en_prepare_rx_desc(priv, ring, index, GFP_ATOMIC))
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break;
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ring->prod++;
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index = ring->prod & ring->size_mask;
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@ -805,21 +831,7 @@ int mlx4_en_poll_rx_cq(struct napi_struct *napi, int budget)
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return done;
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}
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/* Calculate the last offset position that accommodates a full fragment
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* (assuming fagment size = stride-align) */
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static int mlx4_en_last_alloc_offset(struct mlx4_en_priv *priv, u16 stride, u16 align)
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{
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u16 res = MLX4_EN_ALLOC_SIZE % stride;
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u16 offset = MLX4_EN_ALLOC_SIZE - stride - res + align;
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en_dbg(DRV, priv, "Calculated last offset for stride:%d align:%d "
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"res:%d offset:%d\n", stride, align, res, offset);
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return offset;
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}
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static int frag_sizes[] = {
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static const int frag_sizes[] = {
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FRAG_SZ0,
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FRAG_SZ1,
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FRAG_SZ2,
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@ -847,9 +859,6 @@ void mlx4_en_calc_rx_buf(struct net_device *dev)
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priv->frag_info[i].frag_stride =
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ALIGN(frag_sizes[i], SMP_CACHE_BYTES);
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}
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priv->frag_info[i].last_offset = mlx4_en_last_alloc_offset(
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priv, priv->frag_info[i].frag_stride,
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priv->frag_info[i].frag_align);
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buf_size += priv->frag_info[i].frag_size;
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i++;
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}
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@ -861,13 +870,13 @@ void mlx4_en_calc_rx_buf(struct net_device *dev)
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en_dbg(DRV, priv, "Rx buffer scatter-list (effective-mtu:%d "
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"num_frags:%d):\n", eff_mtu, priv->num_frags);
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for (i = 0; i < priv->num_frags; i++) {
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en_dbg(DRV, priv, " frag:%d - size:%d prefix:%d align:%d "
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"stride:%d last_offset:%d\n", i,
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priv->frag_info[i].frag_size,
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priv->frag_info[i].frag_prefix_size,
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priv->frag_info[i].frag_align,
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priv->frag_info[i].frag_stride,
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priv->frag_info[i].last_offset);
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en_err(priv,
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" frag:%d - size:%d prefix:%d align:%d stride:%d\n",
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i,
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priv->frag_info[i].frag_size,
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priv->frag_info[i].frag_prefix_size,
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priv->frag_info[i].frag_align,
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priv->frag_info[i].frag_stride);
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}
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}
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@ -96,7 +96,8 @@
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/* Use the maximum between 16384 and a single page */
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#define MLX4_EN_ALLOC_SIZE PAGE_ALIGN(16384)
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#define MLX4_EN_ALLOC_ORDER get_order(MLX4_EN_ALLOC_SIZE)
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#define MLX4_EN_ALLOC_PREFER_ORDER PAGE_ALLOC_COSTLY_ORDER
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/* Receive fragment sizes; we use at most 3 fragments (for 9600 byte MTU
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* and 4K allocations) */
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@ -234,9 +235,10 @@ struct mlx4_en_tx_desc {
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#define MLX4_EN_CX3_HIGH_ID 0x1005
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struct mlx4_en_rx_alloc {
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struct page *page;
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dma_addr_t dma;
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u16 offset;
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struct page *page;
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dma_addr_t dma;
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u32 offset;
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u32 size;
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};
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struct mlx4_en_tx_ring {
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@ -439,8 +441,6 @@ struct mlx4_en_frag_info {
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u16 frag_prefix_size;
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u16 frag_stride;
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u16 frag_align;
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u16 last_offset;
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};
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#ifdef CONFIG_MLX4_EN_DCB
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