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ARM: tegra: Device tree changes for v4.13-rc1
This removes support for the Whistler board, which only a handful of people ever had access to and which doesn't provide any features over other Tegra20 devices that we support. Also this cleans up some PCI related device tree content in preparation for a future DTC release that has additional checks for the PCI bus. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAllDkUETHHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zoZshD/4sRJTnD5ssHfPmERnv3ezZmKw6ej/A lqnl29GX59JJ9EN3sbeUXvdTw0uYlAaw3UX55tfPhA57spaL/fH4GcdBnEcfaDKd i0LhtnBCY+jopaavQHKB0fyt9U7EJyXIq8t23yR1LWINp0frEiPoQUt89ttegTPs rJyJg//qa5egRsL1U/fN3pqqqmCQlboPOP2YLsR+D5kFShUA6qxDMWwqXKvR1V+v QIEOCC6stUDKRosEGj4B1i9AMoi2LgSQd+dszVOZMaycnPycunQ/ozPcgN98IqDn 0m4Y2VC6ac6l4eaA9RWyZai3YMF+eK2ZWOHbtbfT9z6+NEBUJeIrG7AmSsM2TtYQ vfCG5Tz3Ie8mgVUZ/wD+FE8aIPgVgCYYjypt0Kg/eREgiHvAeswp/N/YAGHDsiI6 tRzH+e0EDIndEyNYW7/Eb5jaJ/ueqsgLZkLIoExpvRlHmZTGCnAfWvvqnu8pVLRe cDzbkYgop/F52IJ5iE8QqDeAY098jum9YPafDIovsZRTV6KB50DJ32LsAZPrUfCg DhMGpAiENUkRv1hC4EWvMvg2VfecAQBnSuddNFwpmwsFcBLTsXtoDEO+61K41tym cTfJ+Xnm6ziLvLheCEZFqWLCPyRNijrhmQ/YNiS+fatJlNUKnw2WcnGEAWkSOhhQ DvGm2hZMJ2rzkw== =Il+U -----END PGP SIGNATURE----- Merge tag 'tegra-for-4.13-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt ARM: tegra: Device tree changes for v4.13-rc1 This removes support for the Whistler board, which only a handful of people ever had access to and which doesn't provide any features over other Tegra20 devices that we support. Also this cleans up some PCI related device tree content in preparation for a future DTC release that has additional checks for the PCI bus. * tag 'tegra-for-4.13-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: dts: tegra: fix PCI bus dtc warnings ARM: tegra: remove Whistler support Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
5088774b8f
@ -29,7 +29,6 @@ board-specific compatible values:
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nvidia,harmony
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nvidia,seaboard
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nvidia,ventana
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nvidia,whistler
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toradex,apalis_t30
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toradex,apalis_t30-eval
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toradex,apalis-tk1
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@ -928,8 +928,7 @@ dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \
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tegra20-seaboard.dtb \
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tegra20-tec.dtb \
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tegra20-trimslice.dtb \
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tegra20-ventana.dtb \
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tegra20-whistler.dtb
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tegra20-ventana.dtb
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dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += \
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tegra30-apalis-eval.dtb \
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tegra30-beaver.dtb \
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@ -63,7 +63,7 @@
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stdout-path = "serial0:115200n8";
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};
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pcie-controller@01003000 {
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pcie@1003000 {
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pci@1,0 {
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status = "okay";
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};
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@ -54,7 +54,7 @@
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reg = <0x0 0x80000000 0x0 0x80000000>;
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};
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pcie-controller@01003000 {
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pcie@1003000 {
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status = "okay";
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avddio-pex-supply = <&vdd_1v05>;
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@ -27,7 +27,7 @@
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reg = <0x0 0x80000000 0x0 0x80000000>;
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};
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pcie-controller@01003000 {
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pcie@1003000 {
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status = "okay";
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avddio-pex-supply = <&vdd_1v05_run>;
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@ -14,7 +14,7 @@
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#address-cells = <2>;
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#size-cells = <2>;
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pcie-controller@01003000 {
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pcie@1003000 {
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compatible = "nvidia,tegra124-pcie";
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device_type = "pci";
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reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */
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@ -54,6 +54,7 @@
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device_type = "pci";
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assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>;
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reg = <0x000800 0 0 0 0>;
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bus-range = <0x00 0xff>;
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status = "disabled";
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#address-cells = <3>;
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@ -67,6 +68,7 @@
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device_type = "pci";
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assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>;
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reg = <0x001000 0 0 0 0>;
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bus-range = <0x00 0xff>;
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status = "disabled";
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#address-cells = <3>;
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@ -566,7 +566,7 @@
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nvidia,sys-clock-req-active-high;
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};
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pcie-controller@80003000 {
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pcie@80003000 {
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status = "okay";
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avdd-pex-supply = <&pci_vdd_reg>;
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@ -478,7 +478,7 @@
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nvidia,sys-clock-req-active-high;
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};
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pcie-controller@80003000 {
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pcie@80003000 {
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avdd-pex-supply = <&pci_vdd_reg>;
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vdd-pex-supply = <&pci_vdd_reg>;
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avdd-pex-pll-supply = <&pci_vdd_reg>;
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@ -32,7 +32,7 @@
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};
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};
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pcie-controller@80003000 {
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pcie@80003000 {
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status = "okay";
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pci@1,0 {
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@ -321,7 +321,7 @@
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nvidia,sys-clock-req-active-high;
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};
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pcie-controller@80003000 {
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pcie@80003000 {
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status = "okay";
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avdd-pex-supply = <&pci_vdd_reg>;
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@ -1,636 +0,0 @@
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/dts-v1/;
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#include <dt-bindings/input/input.h>
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#include "tegra20.dtsi"
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/ {
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model = "NVIDIA Tegra20 Whistler evaluation board";
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compatible = "nvidia,whistler", "nvidia,tegra20";
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aliases {
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rtc0 = "/i2c@7000d000/max8907@3c";
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rtc1 = "/rtc@7000e000";
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serial0 = &uarta;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory {
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reg = <0x00000000 0x20000000>;
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};
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host1x@50000000 {
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hdmi@54280000 {
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status = "okay";
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vdd-supply = <&hdmi_vdd_reg>;
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pll-supply = <&hdmi_pll_reg>;
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nvidia,ddc-i2c-bus = <&hdmi_ddc>;
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nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
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GPIO_ACTIVE_HIGH>;
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};
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};
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pinmux@70000014 {
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pinctrl-names = "default";
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pinctrl-0 = <&state_default>;
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state_default: pinmux {
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ata {
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nvidia,pins = "ata", "atb", "ate", "gma", "gmb",
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"gmc", "gmd", "gpu";
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nvidia,function = "gmi";
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};
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atc {
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nvidia,pins = "atc", "atd";
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nvidia,function = "sdio4";
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};
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cdev1 {
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nvidia,pins = "cdev1";
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nvidia,function = "plla_out";
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};
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cdev2 {
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nvidia,pins = "cdev2";
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nvidia,function = "osc";
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};
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crtp {
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nvidia,pins = "crtp";
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nvidia,function = "crt";
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};
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csus {
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nvidia,pins = "csus";
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nvidia,function = "vi_sensor_clk";
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};
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dap1 {
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nvidia,pins = "dap1";
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nvidia,function = "dap1";
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};
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dap2 {
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nvidia,pins = "dap2";
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nvidia,function = "dap2";
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};
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dap3 {
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nvidia,pins = "dap3";
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nvidia,function = "dap3";
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};
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dap4 {
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nvidia,pins = "dap4";
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nvidia,function = "dap4";
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};
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ddc {
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nvidia,pins = "ddc";
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nvidia,function = "i2c2";
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};
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dta {
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nvidia,pins = "dta", "dtb", "dtc", "dtd";
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nvidia,function = "vi";
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};
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dte {
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nvidia,pins = "dte";
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nvidia,function = "rsvd1";
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};
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dtf {
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nvidia,pins = "dtf";
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nvidia,function = "i2c3";
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};
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gme {
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nvidia,pins = "gme";
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nvidia,function = "dap5";
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};
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gpu7 {
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nvidia,pins = "gpu7";
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nvidia,function = "rtck";
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};
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gpv {
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nvidia,pins = "gpv";
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nvidia,function = "pcie";
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};
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hdint {
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nvidia,pins = "hdint", "pta";
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nvidia,function = "hdmi";
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};
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i2cp {
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nvidia,pins = "i2cp";
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nvidia,function = "i2cp";
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};
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irrx {
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nvidia,pins = "irrx", "irtx";
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nvidia,function = "uartb";
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};
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kbca {
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nvidia,pins = "kbca", "kbcc", "kbce", "kbcf";
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nvidia,function = "kbc";
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};
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kbcb {
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nvidia,pins = "kbcb", "kbcd";
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nvidia,function = "sdio2";
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};
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lcsn {
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nvidia,pins = "lcsn", "lsck", "lsda", "lsdi",
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"spia", "spib", "spic";
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nvidia,function = "spi3";
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};
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ld0 {
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nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
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"ld5", "ld6", "ld7", "ld8", "ld9",
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"ld10", "ld11", "ld12", "ld13", "ld14",
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"ld15", "ld16", "ld17", "ldc", "ldi",
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"lhp0", "lhp1", "lhp2", "lhs", "lm0",
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"lm1", "lpp", "lpw0", "lpw1", "lpw2",
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"lsc0", "lsc1", "lspi", "lvp0", "lvp1",
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"lvs";
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nvidia,function = "displaya";
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};
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owc {
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nvidia,pins = "owc", "uac";
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nvidia,function = "owr";
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};
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pmc {
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nvidia,pins = "pmc";
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nvidia,function = "pwr_on";
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};
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rm {
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nvidia,pins = "rm";
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nvidia,function = "i2c1";
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};
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sdb {
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nvidia,pins = "sdb", "sdc", "sdd", "slxa",
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"slxc", "slxd", "slxk";
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nvidia,function = "sdio3";
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};
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sdio1 {
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nvidia,pins = "sdio1";
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nvidia,function = "sdio1";
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};
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spdi {
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nvidia,pins = "spdi", "spdo";
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nvidia,function = "rsvd2";
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};
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spid {
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nvidia,pins = "spid", "spie", "spig", "spih";
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nvidia,function = "spi2_alt";
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};
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spif {
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nvidia,pins = "spif";
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nvidia,function = "spi2";
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};
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uaa {
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nvidia,pins = "uaa", "uab";
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nvidia,function = "uarta";
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};
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uad {
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nvidia,pins = "uad";
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nvidia,function = "irda";
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};
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uca {
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nvidia,pins = "uca", "ucb";
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nvidia,function = "uartc";
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};
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uda {
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nvidia,pins = "uda";
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nvidia,function = "spi1";
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};
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conf_ata {
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nvidia,pins = "ata", "atb", "atc", "ddc", "gma",
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"gmb", "gmc", "gmd", "irrx", "irtx",
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"kbca", "kbcb", "kbcc", "kbcd", "kbce",
|
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"kbcf", "sdc", "sdd", "spie", "spig",
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"spih", "uaa", "uab", "uad", "uca",
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"ucb";
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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};
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conf_atd {
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nvidia,pins = "atd", "ate", "cdev1", "csus",
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"dap1", "dap2", "dap3", "dap4", "dte",
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"dtf", "gpu", "gpu7", "gpv", "i2cp",
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"rm", "sdio1", "slxa", "slxc", "slxd",
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"slxk", "spdi", "spdo", "uac", "uda";
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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};
|
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conf_cdev2 {
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||||
nvidia,pins = "cdev2", "spia", "spib";
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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||||
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
||||
};
|
||||
conf_ck32 {
|
||||
nvidia,pins = "ck32", "ddrc", "lc", "pmca",
|
||||
"pmcb", "pmcc", "pmcd", "xm2c",
|
||||
"xm2d";
|
||||
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
||||
};
|
||||
conf_crtp {
|
||||
nvidia,pins = "crtp";
|
||||
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
|
||||
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
||||
};
|
||||
conf_dta {
|
||||
nvidia,pins = "dta", "dtb", "dtc", "dtd",
|
||||
"spid", "spif";
|
||||
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
||||
nvidia,tristate = <TEGRA_PIN_DISABLE>;
|
||||
};
|
||||
conf_gme {
|
||||
nvidia,pins = "gme", "owc", "pta", "spic";
|
||||
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
||||
nvidia,tristate = <TEGRA_PIN_ENABLE>;
|
||||
};
|
||||
conf_ld17_0 {
|
||||
nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
|
||||
"ld23_22";
|
||||
nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
|
||||
};
|
||||
conf_ls {
|
||||
nvidia,pins = "ls", "pmce";
|
||||
nvidia,pull = <TEGRA_PIN_PULL_UP>;
|
||||
};
|
||||
drive_dap1 {
|
||||
nvidia,pins = "drive_dap1";
|
||||
nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
|
||||
nvidia,schmitt = <TEGRA_PIN_ENABLE>;
|
||||
nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_8>;
|
||||
nvidia,pull-down-strength = <0>;
|
||||
nvidia,pull-up-strength = <0>;
|
||||
nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
|
||||
nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
i2s@70002800 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
serial@70006000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
hdmi_ddc: i2c@7000c400 {
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
i2c@7000d000 {
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
|
||||
codec: codec@1a {
|
||||
compatible = "wlf,wm8753";
|
||||
reg = <0x1a>;
|
||||
};
|
||||
|
||||
tca6416: gpio@20 {
|
||||
compatible = "ti,tca6416";
|
||||
reg = <0x20>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
max8907@3c {
|
||||
compatible = "maxim,max8907";
|
||||
reg = <0x3c>;
|
||||
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
||||
maxim,system-power-controller;
|
||||
|
||||
mbatt-supply = <&usb0_vbus_reg>;
|
||||
in-v1-supply = <&mbatt_reg>;
|
||||
in-v2-supply = <&mbatt_reg>;
|
||||
in-v3-supply = <&mbatt_reg>;
|
||||
in1-supply = <&mbatt_reg>;
|
||||
in2-supply = <&nvvdd_sv3_reg>;
|
||||
in3-supply = <&mbatt_reg>;
|
||||
in4-supply = <&mbatt_reg>;
|
||||
in5-supply = <&mbatt_reg>;
|
||||
in6-supply = <&mbatt_reg>;
|
||||
in7-supply = <&mbatt_reg>;
|
||||
in8-supply = <&mbatt_reg>;
|
||||
in9-supply = <&mbatt_reg>;
|
||||
in10-supply = <&mbatt_reg>;
|
||||
in11-supply = <&mbatt_reg>;
|
||||
in12-supply = <&mbatt_reg>;
|
||||
in13-supply = <&mbatt_reg>;
|
||||
in14-supply = <&mbatt_reg>;
|
||||
in15-supply = <&mbatt_reg>;
|
||||
in16-supply = <&mbatt_reg>;
|
||||
in17-supply = <&nvvdd_sv3_reg>;
|
||||
in18-supply = <&nvvdd_sv3_reg>;
|
||||
in19-supply = <&mbatt_reg>;
|
||||
in20-supply = <&mbatt_reg>;
|
||||
|
||||
regulators {
|
||||
mbatt_reg: mbatt {
|
||||
regulator-name = "vbat_pmu";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
sd1 {
|
||||
regulator-name = "nvvdd_sv1,vdd_cpu_pmu";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
sd2 {
|
||||
regulator-name = "nvvdd_sv2,vdd_core";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
nvvdd_sv3_reg: sd3 {
|
||||
regulator-name = "nvvdd_sv3";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo1 {
|
||||
regulator-name = "nvvdd_ldo1,vddio_rx_ddr,vcore_acc";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo2 {
|
||||
regulator-name = "nvvdd_ldo2,avdd_pll*";
|
||||
regulator-min-microvolt = <1100000>;
|
||||
regulator-max-microvolt = <1100000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo3 {
|
||||
regulator-name = "nvvdd_ldo3,vcom_1v8b";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo4 {
|
||||
regulator-name = "nvvdd_ldo4,avdd_usb*";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo5 {
|
||||
regulator-name = "nvvdd_ldo5,vcore_mmc,avdd_lcd1,vddio_1wire";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
hdmi_pll_reg: ldo6 {
|
||||
regulator-name = "nvvdd_ldo6,avdd_hdmi_pll";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
ldo7 {
|
||||
regulator-name = "nvvdd_ldo7,avddio_audio";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo8 {
|
||||
regulator-name = "nvvdd_ldo8,vcom_3v0,vcore_cmps";
|
||||
regulator-min-microvolt = <3000000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
};
|
||||
|
||||
ldo9 {
|
||||
regulator-name = "nvvdd_ldo9,avdd_cam*";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
};
|
||||
|
||||
ldo10 {
|
||||
regulator-name = "nvvdd_ldo10,avdd_usb_ic_3v0";
|
||||
regulator-min-microvolt = <3000000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
hdmi_vdd_reg: ldo11 {
|
||||
regulator-name = "nvvdd_ldo11,vddio_pex_clk,vcom_33,avdd_hdmi";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
ldo12 {
|
||||
regulator-name = "nvvdd_ldo12,vddio_sdio";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo13 {
|
||||
regulator-name = "nvvdd_ldo13,vcore_phtn,vdd_af";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
};
|
||||
|
||||
ldo14 {
|
||||
regulator-name = "nvvdd_ldo14,avdd_vdac";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
};
|
||||
|
||||
ldo15 {
|
||||
regulator-name = "nvvdd_ldo15,vcore_temp,vddio_hdcp";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
||||
ldo16 {
|
||||
regulator-name = "nvvdd_ldo16,vdd_dbrtr";
|
||||
regulator-min-microvolt = <1300000>;
|
||||
regulator-max-microvolt = <1300000>;
|
||||
};
|
||||
|
||||
ldo17 {
|
||||
regulator-name = "nvvdd_ldo17,vddio_mipi";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
};
|
||||
|
||||
ldo18 {
|
||||
regulator-name = "nvvdd_ldo18,vddio_vi,vcore_cam*";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
ldo19 {
|
||||
regulator-name = "nvvdd_ldo19,avdd_lcd2,vddio_lx";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
};
|
||||
|
||||
ldo20 {
|
||||
regulator-name = "nvvdd_ldo20,vddio_ddr_1v2,vddio_hsic,vcom_1v2";
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
out5v {
|
||||
regulator-name = "usb0_vbus_reg";
|
||||
};
|
||||
|
||||
out33v {
|
||||
regulator-name = "pmu_out3v3";
|
||||
};
|
||||
|
||||
bbat {
|
||||
regulator-name = "pmu_bbat";
|
||||
regulator-min-microvolt = <2400000>;
|
||||
regulator-max-microvolt = <2400000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
sdby {
|
||||
regulator-name = "vdd_aon";
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vrtc {
|
||||
regulator-name = "vrtc,pmu_vccadc";
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
kbc@7000e200 {
|
||||
status = "okay";
|
||||
nvidia,debounce-delay-ms = <20>;
|
||||
nvidia,repeat-delay-ms = <160>;
|
||||
nvidia,kbc-row-pins = <0 1 2>;
|
||||
nvidia,kbc-col-pins = <16 17>;
|
||||
wakeup-source;
|
||||
linux,keymap = <MATRIX_KEY(0x00, 0x00, KEY_POWER)
|
||||
MATRIX_KEY(0x01, 0x00, KEY_HOME)
|
||||
MATRIX_KEY(0x01, 0x01, KEY_BACK)
|
||||
MATRIX_KEY(0x02, 0x01, KEY_MENU)>;
|
||||
};
|
||||
|
||||
pmc@7000e400 {
|
||||
nvidia,invert-interrupt;
|
||||
nvidia,suspend-mode = <1>;
|
||||
nvidia,cpu-pwr-good-time = <2000>;
|
||||
nvidia,cpu-pwr-off-time = <1000>;
|
||||
nvidia,core-pwr-good-time = <0 3845>;
|
||||
nvidia,core-pwr-off-time = <93727>;
|
||||
nvidia,core-power-req-active-high;
|
||||
nvidia,sys-clock-req-active-high;
|
||||
nvidia,combined-power-req;
|
||||
};
|
||||
|
||||
usb@c5000000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb-phy@c5000000 {
|
||||
status = "okay";
|
||||
vbus-supply = <&vbus1_reg>;
|
||||
};
|
||||
|
||||
usb@c5008000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usb-phy@c5008000 {
|
||||
status = "okay";
|
||||
vbus-supply = <&vbus3_reg>;
|
||||
};
|
||||
|
||||
sdhci@c8000400 {
|
||||
status = "okay";
|
||||
cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
|
||||
wp-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH>;
|
||||
bus-width = <8>;
|
||||
};
|
||||
|
||||
sdhci@c8000600 {
|
||||
status = "okay";
|
||||
bus-width = <8>;
|
||||
non-removable;
|
||||
};
|
||||
|
||||
clocks {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
clk32k_in: clock@0 {
|
||||
compatible = "fixed-clock";
|
||||
reg = <0>;
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <32768>;
|
||||
};
|
||||
};
|
||||
|
||||
regulators {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
usb0_vbus_reg: regulator@0 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <0>;
|
||||
regulator-name = "usb0_vbus";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vbus1_reg: regulator@2 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <2>;
|
||||
regulator-name = "vbus1";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
enable-active-high;
|
||||
gpio = <&tca6416 0 0>; /* GPIO_PMU0 */
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vbus3_reg: regulator@3 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <3>;
|
||||
regulator-name = "vbus3";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
enable-active-high;
|
||||
gpio = <&tca6416 1 0>; /* GPIO_PMU1 */
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
};
|
||||
|
||||
sound {
|
||||
compatible = "nvidia,tegra-audio-wm8753-whistler",
|
||||
"nvidia,tegra-audio-wm8753";
|
||||
nvidia,model = "NVIDIA Tegra Whistler";
|
||||
|
||||
nvidia,audio-routing =
|
||||
"Headphone Jack", "LOUT1",
|
||||
"Headphone Jack", "ROUT1",
|
||||
"MIC2", "Mic Jack",
|
||||
"MIC2N", "Mic Jack";
|
||||
|
||||
nvidia,i2s-controller = <&tegra_i2s1>;
|
||||
nvidia,audio-codec = <&codec>;
|
||||
|
||||
clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
|
||||
<&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
|
||||
<&tegra_car TEGRA20_CLK_CDEV1>;
|
||||
clock-names = "pll_a", "pll_a_out0", "mclk";
|
||||
};
|
||||
};
|
||||
@ -586,7 +586,7 @@
|
||||
reset-names = "fuse";
|
||||
};
|
||||
|
||||
pcie-controller@80003000 {
|
||||
pcie@80003000 {
|
||||
compatible = "nvidia,tegra20-pcie";
|
||||
device_type = "pci";
|
||||
reg = <0x80003000 0x00000800 /* PADS registers */
|
||||
@ -625,6 +625,7 @@
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x80000000 0 0x1000>;
|
||||
reg = <0x000800 0 0 0 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
status = "disabled";
|
||||
|
||||
#address-cells = <3>;
|
||||
@ -638,6 +639,7 @@
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82001000 0 0x80001000 0 0x1000>;
|
||||
reg = <0x001000 0 0 0 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
status = "disabled";
|
||||
|
||||
#address-cells = <3>;
|
||||
|
||||
@ -21,7 +21,7 @@
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
pcie-controller@00003000 {
|
||||
pcie@3000 {
|
||||
status = "okay";
|
||||
|
||||
pci@1,0 {
|
||||
|
||||
@ -9,7 +9,7 @@
|
||||
model = "Toradex Apalis T30";
|
||||
compatible = "toradex,apalis_t30", "nvidia,tegra30";
|
||||
|
||||
pcie-controller@00003000 {
|
||||
pcie@3000 {
|
||||
avdd-pexa-supply = <&vdd2_reg>;
|
||||
vdd-pexa-supply = <&vdd2_reg>;
|
||||
avdd-pexb-supply = <&vdd2_reg>;
|
||||
|
||||
@ -20,7 +20,7 @@
|
||||
reg = <0x80000000 0x7ff00000>;
|
||||
};
|
||||
|
||||
pcie-controller@00003000 {
|
||||
pcie@3000 {
|
||||
status = "okay";
|
||||
|
||||
avdd-pexa-supply = <&ldo1_reg>;
|
||||
|
||||
@ -43,7 +43,7 @@
|
||||
reg = <0x80000000 0x40000000>;
|
||||
};
|
||||
|
||||
pcie-controller@00003000 {
|
||||
pcie@3000 {
|
||||
status = "okay";
|
||||
|
||||
/* AVDD_PEXA and VDD_PEXA inputs are grounded on Cardhu. */
|
||||
|
||||
@ -10,7 +10,7 @@
|
||||
compatible = "nvidia,tegra30";
|
||||
interrupt-parent = <&lic>;
|
||||
|
||||
pcie-controller@00003000 {
|
||||
pcie@3000 {
|
||||
compatible = "nvidia,tegra30-pcie";
|
||||
device_type = "pci";
|
||||
reg = <0x00003000 0x00000800 /* PADS registers */
|
||||
@ -51,6 +51,7 @@
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82000800 0 0x00000000 0 0x1000>;
|
||||
reg = <0x000800 0 0 0 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
status = "disabled";
|
||||
|
||||
#address-cells = <3>;
|
||||
@ -64,6 +65,7 @@
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82001000 0 0x00001000 0 0x1000>;
|
||||
reg = <0x001000 0 0 0 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
status = "disabled";
|
||||
|
||||
#address-cells = <3>;
|
||||
@ -77,6 +79,7 @@
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82001800 0 0x00004000 0 0x1000>;
|
||||
reg = <0x001800 0 0 0 0>;
|
||||
bus-range = <0x00 0xff>;
|
||||
status = "disabled";
|
||||
|
||||
#address-cells = <3>;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user