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x86/alternatives: Use optimized NOPs for padding
Alternatives allow now for an empty old instruction. In this case we go and pad the space with NOPs at assembly time. However, there are the optimal, longer NOPs which should be used. Do that at patching time by adding alt_instr.padlen-sized NOPs at the old instruction address. Cc: Andy Lutomirski <luto@amacapital.net> Signed-off-by: Borislav Petkov <bp@suse.de>
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@ -323,6 +323,14 @@ done:
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n_dspl, (unsigned long)orig_insn + n_dspl + repl_len);
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}
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static void __init_or_module optimize_nops(struct alt_instr *a, u8 *instr)
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{
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add_nops(instr + (a->instrlen - a->padlen), a->padlen);
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DUMP_BYTES(instr, a->instrlen, "%p: [%d:%d) optimized NOPs: ",
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instr, a->instrlen - a->padlen, a->padlen);
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}
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/*
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* Replace instructions with better alternatives for this CPU type. This runs
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* before SMP is initialized to avoid SMP problems with self modifying code.
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@ -354,8 +362,12 @@ void __init_or_module apply_alternatives(struct alt_instr *start,
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replacement = (u8 *)&a->repl_offset + a->repl_offset;
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BUG_ON(a->instrlen > sizeof(insnbuf));
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BUG_ON(a->cpuid >= (NCAPINTS + NBUGINTS) * 32);
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if (!boot_cpu_has(a->cpuid))
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if (!boot_cpu_has(a->cpuid)) {
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if (a->padlen > 1)
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optimize_nops(a, instr);
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continue;
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}
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DPRINTK("feat: %d*32+%d, old: (%p, len: %d), repl: (%p, len: %d)",
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a->cpuid >> 5,
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