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Document: dt: fsl: snvs: change support syscon
snvs actually is multi fucntion driver. Change to use syscon to access register. Change snvs parent interrupt to option because single function may have seperated irq number. Signed-off-by: Frank Li <Frank.Li@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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@ -288,12 +288,13 @@ Secure Non-Volatile Storage (SNVS) Node
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Node defines address range and the associated
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interrupt for the SNVS function. This function
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monitors security state information & reports
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security violations.
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security violations. This also included rtc,
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system power off and ON/OFF key.
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- compatible
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Usage: required
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Value type: <string>
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Definition: Must include "fsl,sec-v4.0-mon".
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Definition: Must include "fsl,sec-v4.0-mon" and "syscon".
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- reg
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Usage: required
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@ -324,7 +325,7 @@ Secure Non-Volatile Storage (SNVS) Node
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the child address, parent address, & length.
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- interrupts
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Usage: required
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Usage: optional
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Value type: <prop_encoded-array>
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Definition: Specifies the interrupts generated by this
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device. The value of the interrupts property
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@ -341,7 +342,7 @@ Secure Non-Volatile Storage (SNVS) Node
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EXAMPLE
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sec_mon@314000 {
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compatible = "fsl,sec-v4.0-mon";
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compatible = "fsl,sec-v4.0-mon", "syscon";
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reg = <0x314000 0x1000>;
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ranges = <0 0x314000 0x1000>;
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interrupt-parent = <&mpic>;
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@ -358,16 +359,31 @@ Secure Non-Volatile Storage (SNVS) Low Power (LP) RTC Node
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Value type: <string>
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Definition: Must include "fsl,sec-v4.0-mon-rtc-lp".
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- reg
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- interrupts
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Usage: required
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Value type: <prop-encoded-array>
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Definition: A standard property. Specifies the physical
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address and length of the SNVS LP configuration registers.
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Value type: <prop_encoded-array>
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Definition: Specifies the interrupts generated by this
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device. The value of the interrupts property
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consists of one interrupt specifier. The format
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of the specifier is defined by the binding document
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describing the node's interrupt parent.
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- regmap
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Usage: required
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Value type: <phandle>
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Definition: this is phandle to the register map node.
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- offset
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Usage: option
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value type: <u32>
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Definition: LP register offset. default it is 0x34.
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EXAMPLE
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sec_mon_rtc_lp@314000 {
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sec_mon_rtc_lp@1 {
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compatible = "fsl,sec-v4.0-mon-rtc-lp";
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reg = <0x34 0x58>;
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interrupts = <93 2>;
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regmap = <&snvs>;
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offset = <0x34>;
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};
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=====================================================================
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@ -443,12 +459,12 @@ FULL EXAMPLE
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compatible = "fsl,sec-v4.0-mon";
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reg = <0x314000 0x1000>;
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ranges = <0 0x314000 0x1000>;
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interrupt-parent = <&mpic>;
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interrupts = <93 2>;
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sec_mon_rtc_lp@34 {
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compatible = "fsl,sec-v4.0-mon-rtc-lp";
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reg = <0x34 0x58>;
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regmap = <&sec_mon>;
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offset = <0x34>;
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interrupts = <93 2>;
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};
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};
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