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drm/radeon: fix atombios on big endian
The function for byteswapping the data send to/from atombios was buggy for num_bytes not divisible by four. The function must be aware of the fact that after byte-swapping the u32 units, valid bytes might end up after the num_bytes boundary. This patch was tested on kernel 3.12 and allowed us to sucesfully use DisplayPort on and Radeon SI card. Namely it fixed the link training and EDID readout. The function is patched both in radeon and amd drivers, since the functions and the fixes are identical. Signed-off-by: Roman Kapl <rka@sysgo.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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@ -1766,34 +1766,32 @@ bool amdgpu_atombios_scratch_need_asic_init(struct amdgpu_device *adev)
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return true;
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}
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/* Atom needs data in little endian format
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* so swap as appropriate when copying data to
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* or from atom. Note that atom operates on
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* dw units.
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/* Atom needs data in little endian format so swap as appropriate when copying
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* data to or from atom. Note that atom operates on dw units.
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*
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* Use to_le=true when sending data to atom and provide at least
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* ALIGN(num_bytes,4) bytes in the dst buffer.
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*
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* Use to_le=false when receiving data from atom and provide ALIGN(num_bytes,4)
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* byes in the src buffer.
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*/
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void amdgpu_atombios_copy_swap(u8 *dst, u8 *src, u8 num_bytes, bool to_le)
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{
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#ifdef __BIG_ENDIAN
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u8 src_tmp[20], dst_tmp[20]; /* used for byteswapping */
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u32 *dst32, *src32;
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u32 src_tmp[5], dst_tmp[5];
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int i;
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u8 align_num_bytes = ALIGN(num_bytes, 4);
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memcpy(src_tmp, src, num_bytes);
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src32 = (u32 *)src_tmp;
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dst32 = (u32 *)dst_tmp;
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if (to_le) {
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for (i = 0; i < ((num_bytes + 3) / 4); i++)
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dst32[i] = cpu_to_le32(src32[i]);
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memcpy(dst, dst_tmp, num_bytes);
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memcpy(src_tmp, src, num_bytes);
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for (i = 0; i < align_num_bytes / 4; i++)
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dst_tmp[i] = cpu_to_le32(src_tmp[i]);
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memcpy(dst, dst_tmp, align_num_bytes);
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} else {
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u8 dws = num_bytes & ~3;
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for (i = 0; i < ((num_bytes + 3) / 4); i++)
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dst32[i] = le32_to_cpu(src32[i]);
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memcpy(dst, dst_tmp, dws);
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if (num_bytes % 4) {
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for (i = 0; i < (num_bytes % 4); i++)
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dst[dws+i] = dst_tmp[dws+i];
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}
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memcpy(src_tmp, src, align_num_bytes);
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for (i = 0; i < align_num_bytes / 4; i++)
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dst_tmp[i] = le32_to_cpu(src_tmp[i]);
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memcpy(dst, dst_tmp, num_bytes);
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}
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#else
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memcpy(dst, src, num_bytes);
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@ -45,34 +45,32 @@ static char *pre_emph_names[] = {
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/***** radeon AUX functions *****/
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/* Atom needs data in little endian format
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* so swap as appropriate when copying data to
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* or from atom. Note that atom operates on
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* dw units.
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/* Atom needs data in little endian format so swap as appropriate when copying
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* data to or from atom. Note that atom operates on dw units.
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*
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* Use to_le=true when sending data to atom and provide at least
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* ALIGN(num_bytes,4) bytes in the dst buffer.
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*
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* Use to_le=false when receiving data from atom and provide ALIGN(num_bytes,4)
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* byes in the src buffer.
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*/
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void radeon_atom_copy_swap(u8 *dst, u8 *src, u8 num_bytes, bool to_le)
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{
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#ifdef __BIG_ENDIAN
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u8 src_tmp[20], dst_tmp[20]; /* used for byteswapping */
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u32 *dst32, *src32;
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u32 src_tmp[5], dst_tmp[5];
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int i;
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u8 align_num_bytes = ALIGN(num_bytes, 4);
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memcpy(src_tmp, src, num_bytes);
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src32 = (u32 *)src_tmp;
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dst32 = (u32 *)dst_tmp;
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if (to_le) {
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for (i = 0; i < ((num_bytes + 3) / 4); i++)
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dst32[i] = cpu_to_le32(src32[i]);
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memcpy(dst, dst_tmp, num_bytes);
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memcpy(src_tmp, src, num_bytes);
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for (i = 0; i < align_num_bytes / 4; i++)
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dst_tmp[i] = cpu_to_le32(src_tmp[i]);
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memcpy(dst, dst_tmp, align_num_bytes);
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} else {
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u8 dws = num_bytes & ~3;
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for (i = 0; i < ((num_bytes + 3) / 4); i++)
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dst32[i] = le32_to_cpu(src32[i]);
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memcpy(dst, dst_tmp, dws);
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if (num_bytes % 4) {
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for (i = 0; i < (num_bytes % 4); i++)
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dst[dws+i] = dst_tmp[dws+i];
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}
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memcpy(src_tmp, src, align_num_bytes);
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for (i = 0; i < align_num_bytes / 4; i++)
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dst_tmp[i] = le32_to_cpu(src_tmp[i]);
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memcpy(dst, dst_tmp, num_bytes);
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}
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#else
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memcpy(dst, src, num_bytes);
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