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KVM PPC update for 5.7
* Add a capability for enabling secure guests under the Protected Execution Framework ultravisor * Various bug fixes and cleanups. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQEcBAABCAAGBQJegnq3AAoJEJ2a6ncsY3GfrU8IANpaxS7kTAsW3ZN0wJnP2PHq i8j7ZPlCVLpkQWArrMyMimDLdiN9VP7lvaWonAWjG0HJrxlmMUUVnwVSMuPTXhWY vSwEqhUXwSF5KKxN7DYkgxqaKFxkElJIubVE/AYJjH9zFpu9ca4vM5sCxnzWcvS3 hxPNe756nKhFH9xhrC/9NRUZWmDAiv75wvzq+5DRKbSVPJGJugchdIPBbi3Yrr7P qxnUCPZdCxzXXU94bfQl038wrjSMR3S7b4FvekJ12go2FalujqzsL2lVtift4Rf0 jvu+RIINcmTiaQqclY332j7l24LZ6Pni456RygT5OwFxuYoxWKZRafN16JmaMCo= =rpJL -----END PGP SIGNATURE----- Merge tag 'kvm-ppc-next-5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc into HEAD KVM PPC update for 5.7 * Add a capability for enabling secure guests under the Protected Execution Framework ultravisor * Various bug fixes and cleanups.
This commit is contained in:
commit
4f4af841f0
@ -5785,6 +5785,23 @@ it hard or impossible to use it correctly. The availability of
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KVM_CAP_MANUAL_DIRTY_LOG_PROTECT2 signals that those bugs are fixed.
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Userspace should not try to use KVM_CAP_MANUAL_DIRTY_LOG_PROTECT.
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7.19 KVM_CAP_PPC_SECURE_GUEST
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------------------------------
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:Architectures: ppc
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This capability indicates that KVM is running on a host that has
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ultravisor firmware and thus can support a secure guest. On such a
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system, a guest can ask the ultravisor to make it a secure guest,
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one whose memory is inaccessible to the host except for pages which
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are explicitly requested to be shared with the host. The ultravisor
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notifies KVM when a guest requests to become a secure guest, and KVM
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has the opportunity to veto the transition.
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If present, this capability can be enabled for a VM, meaning that KVM
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will allow the transition to secure guest mode. Otherwise KVM will
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veto the transition.
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8. Other capabilities.
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======================
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@ -150,4 +150,7 @@
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#define KVM_INST_FETCH_FAILED -1
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/* Extract PO and XOP opcode fields */
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#define PO_XOP_OPCODE_MASK 0xfc0007fe
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#endif /* __POWERPC_KVM_ASM_H__ */
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@ -5,6 +5,7 @@
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#ifdef CONFIG_PPC_UV
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int kvmppc_uvmem_init(void);
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void kvmppc_uvmem_free(void);
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bool kvmppc_uvmem_available(void);
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int kvmppc_uvmem_slot_init(struct kvm *kvm, const struct kvm_memory_slot *slot);
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void kvmppc_uvmem_slot_free(struct kvm *kvm,
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const struct kvm_memory_slot *slot);
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@ -30,6 +31,11 @@ static inline int kvmppc_uvmem_init(void)
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static inline void kvmppc_uvmem_free(void) { }
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static inline bool kvmppc_uvmem_available(void)
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{
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return false;
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}
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static inline int
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kvmppc_uvmem_slot_init(struct kvm *kvm, const struct kvm_memory_slot *slot)
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{
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@ -303,6 +303,7 @@ struct kvm_arch {
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u8 radix;
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u8 fwnmi_enabled;
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u8 secure_guest;
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u8 svm_enabled;
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bool threads_indep;
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bool nested_enable;
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pgd_t *pgtable;
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@ -107,8 +107,6 @@ extern void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gpa_t gpaddr,
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unsigned int gtlb_idx);
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extern void kvmppc_mmu_priv_switch(struct kvm_vcpu *vcpu, int usermode);
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extern void kvmppc_mmu_switch_pid(struct kvm_vcpu *vcpu, u32 pid);
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extern void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu);
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extern int kvmppc_mmu_init(struct kvm_vcpu *vcpu);
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extern int kvmppc_mmu_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr);
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extern int kvmppc_mmu_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr);
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extern gpa_t kvmppc_mmu_xlate(struct kvm_vcpu *vcpu, unsigned int gtlb_index,
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@ -289,7 +287,6 @@ struct kvmppc_ops {
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int (*age_hva)(struct kvm *kvm, unsigned long start, unsigned long end);
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int (*test_age_hva)(struct kvm *kvm, unsigned long hva);
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void (*set_spte_hva)(struct kvm *kvm, unsigned long hva, pte_t pte);
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void (*mmu_destroy)(struct kvm_vcpu *vcpu);
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void (*free_memslot)(struct kvm_memory_slot *slot);
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int (*init_vm)(struct kvm *kvm);
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void (*destroy_vm)(struct kvm *kvm);
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@ -316,6 +313,7 @@ struct kvmppc_ops {
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int size);
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int (*store_to_eaddr)(struct kvm_vcpu *vcpu, ulong *eaddr, void *ptr,
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int size);
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int (*enable_svm)(struct kvm *kvm);
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int (*svm_off)(struct kvm *kvm);
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};
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@ -858,11 +858,6 @@ int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
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return 0;
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}
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void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
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{
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vcpu->kvm->arch.kvm_ops->mmu_destroy(vcpu);
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}
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int kvmppc_core_init_vm(struct kvm *kvm)
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{
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@ -16,6 +16,7 @@ extern int kvm_age_hva_hv(struct kvm *kvm, unsigned long start,
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extern int kvm_test_age_hva_hv(struct kvm *kvm, unsigned long hva);
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extern void kvm_set_spte_hva_hv(struct kvm *kvm, unsigned long hva, pte_t pte);
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extern int kvmppc_mmu_init_pr(struct kvm_vcpu *vcpu);
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extern void kvmppc_mmu_destroy_pr(struct kvm_vcpu *vcpu);
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extern int kvmppc_core_emulate_op_pr(struct kvm_run *run, struct kvm_vcpu *vcpu,
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unsigned int inst, int *advance);
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@ -234,7 +234,7 @@ static int kvmppc_mmu_book3s_32_xlate_pte(struct kvm_vcpu *vcpu, gva_t eaddr,
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case 2:
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case 6:
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pte->may_write = true;
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/* fall through */
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fallthrough;
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case 3:
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case 5:
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case 7:
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@ -356,7 +356,7 @@ void kvmppc_mmu_destroy_pr(struct kvm_vcpu *vcpu)
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/* From mm/mmu_context_hash32.c */
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#define CTX_TO_VSID(c, id) ((((c) * (897 * 16)) + (id * 0x111)) & 0xffffff)
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int kvmppc_mmu_init(struct kvm_vcpu *vcpu)
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int kvmppc_mmu_init_pr(struct kvm_vcpu *vcpu)
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{
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struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
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int err;
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@ -311,7 +311,7 @@ do_second:
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case 2:
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case 6:
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gpte->may_write = true;
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/* fall through */
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fallthrough;
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case 3:
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case 5:
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case 7:
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@ -384,7 +384,7 @@ void kvmppc_mmu_destroy_pr(struct kvm_vcpu *vcpu)
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__destroy_context(to_book3s(vcpu)->context_id[0]);
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}
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int kvmppc_mmu_init(struct kvm_vcpu *vcpu)
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int kvmppc_mmu_init_pr(struct kvm_vcpu *vcpu)
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{
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struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
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int err;
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@ -485,18 +485,18 @@ int kvmppc_book3s_hv_page_fault(struct kvm_run *run, struct kvm_vcpu *vcpu,
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__be64 *hptep;
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unsigned long mmu_seq, psize, pte_size;
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unsigned long gpa_base, gfn_base;
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unsigned long gpa, gfn, hva, pfn;
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unsigned long gpa, gfn, hva, pfn, hpa;
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struct kvm_memory_slot *memslot;
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unsigned long *rmap;
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struct revmap_entry *rev;
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struct page *page, *pages[1];
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long index, ret, npages;
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struct page *page;
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long index, ret;
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bool is_ci;
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unsigned int writing, write_ok;
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struct vm_area_struct *vma;
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bool writing, write_ok;
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unsigned int shift;
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unsigned long rcbits;
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long mmio_update;
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struct mm_struct *mm;
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pte_t pte, *ptep;
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if (kvm_is_radix(kvm))
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return kvmppc_book3s_radix_page_fault(run, vcpu, ea, dsisr);
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@ -570,59 +570,62 @@ int kvmppc_book3s_hv_page_fault(struct kvm_run *run, struct kvm_vcpu *vcpu,
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smp_rmb();
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ret = -EFAULT;
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is_ci = false;
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pfn = 0;
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page = NULL;
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mm = kvm->mm;
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pte_size = PAGE_SIZE;
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writing = (dsisr & DSISR_ISSTORE) != 0;
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/* If writing != 0, then the HPTE must allow writing, if we get here */
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write_ok = writing;
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hva = gfn_to_hva_memslot(memslot, gfn);
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npages = get_user_pages_fast(hva, 1, writing ? FOLL_WRITE : 0, pages);
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if (npages < 1) {
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/* Check if it's an I/O mapping */
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down_read(&mm->mmap_sem);
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vma = find_vma(mm, hva);
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if (vma && vma->vm_start <= hva && hva + psize <= vma->vm_end &&
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(vma->vm_flags & VM_PFNMAP)) {
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pfn = vma->vm_pgoff +
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((hva - vma->vm_start) >> PAGE_SHIFT);
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pte_size = psize;
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is_ci = pte_ci(__pte((pgprot_val(vma->vm_page_prot))));
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write_ok = vma->vm_flags & VM_WRITE;
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}
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up_read(&mm->mmap_sem);
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if (!pfn)
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goto out_put;
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/*
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* Do a fast check first, since __gfn_to_pfn_memslot doesn't
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* do it with !atomic && !async, which is how we call it.
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* We always ask for write permission since the common case
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* is that the page is writable.
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*/
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if (__get_user_pages_fast(hva, 1, 1, &page) == 1) {
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write_ok = true;
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} else {
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page = pages[0];
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pfn = page_to_pfn(page);
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if (PageHuge(page)) {
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page = compound_head(page);
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pte_size <<= compound_order(page);
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}
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/* if the guest wants write access, see if that is OK */
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if (!writing && hpte_is_writable(r)) {
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pte_t *ptep, pte;
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unsigned long flags;
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/*
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* We need to protect against page table destruction
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* hugepage split and collapse.
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*/
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local_irq_save(flags);
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ptep = find_current_mm_pte(mm->pgd, hva, NULL, NULL);
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if (ptep) {
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pte = kvmppc_read_update_linux_pte(ptep, 1);
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if (__pte_write(pte))
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write_ok = 1;
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}
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local_irq_restore(flags);
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/* Call KVM generic code to do the slow-path check */
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pfn = __gfn_to_pfn_memslot(memslot, gfn, false, NULL,
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writing, &write_ok);
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if (is_error_noslot_pfn(pfn))
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return -EFAULT;
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page = NULL;
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if (pfn_valid(pfn)) {
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page = pfn_to_page(pfn);
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if (PageReserved(page))
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page = NULL;
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}
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}
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/*
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* Read the PTE from the process' radix tree and use that
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* so we get the shift and attribute bits.
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*/
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local_irq_disable();
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ptep = __find_linux_pte(vcpu->arch.pgdir, hva, NULL, &shift);
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/*
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* If the PTE disappeared temporarily due to a THP
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* collapse, just return and let the guest try again.
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*/
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if (!ptep) {
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local_irq_enable();
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if (page)
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put_page(page);
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return RESUME_GUEST;
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}
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pte = *ptep;
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local_irq_enable();
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hpa = pte_pfn(pte) << PAGE_SHIFT;
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pte_size = PAGE_SIZE;
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if (shift)
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pte_size = 1ul << shift;
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is_ci = pte_ci(pte);
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if (psize > pte_size)
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goto out_put;
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if (pte_size > psize)
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hpa |= hva & (pte_size - psize);
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/* Check WIMG vs. the actual page we're accessing */
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if (!hpte_cache_flags_ok(r, is_ci)) {
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@ -636,14 +639,13 @@ int kvmppc_book3s_hv_page_fault(struct kvm_run *run, struct kvm_vcpu *vcpu,
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}
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/*
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* Set the HPTE to point to pfn.
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* Since the pfn is at PAGE_SIZE granularity, make sure we
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* Set the HPTE to point to hpa.
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* Since the hpa is at PAGE_SIZE granularity, make sure we
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* don't mask out lower-order bits if psize < PAGE_SIZE.
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*/
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if (psize < PAGE_SIZE)
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psize = PAGE_SIZE;
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r = (r & HPTE_R_KEY_HI) | (r & ~(HPTE_R_PP0 - psize)) |
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((pfn << PAGE_SHIFT) & ~(psize - 1));
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r = (r & HPTE_R_KEY_HI) | (r & ~(HPTE_R_PP0 - psize)) | hpa;
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if (hpte_is_writable(r) && !write_ok)
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r = hpte_make_readonly(r);
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ret = RESUME_GUEST;
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@ -708,20 +710,13 @@ int kvmppc_book3s_hv_page_fault(struct kvm_run *run, struct kvm_vcpu *vcpu,
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asm volatile("ptesync" : : : "memory");
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preempt_enable();
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if (page && hpte_is_writable(r))
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SetPageDirty(page);
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set_page_dirty_lock(page);
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||||
|
||||
out_put:
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trace_kvm_page_fault_exit(vcpu, hpte, ret);
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if (page) {
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/*
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* We drop pages[0] here, not page because page might
|
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* have been set to the head page of a compound, but
|
||||
* we have to drop the reference on the correct tail
|
||||
* page to match the get inside gup()
|
||||
*/
|
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put_page(pages[0]);
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}
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if (page)
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put_page(page);
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return ret;
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||||
|
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out_unlock:
|
||||
|
@ -425,7 +425,7 @@ static void kvmppc_unmap_free_pte(struct kvm *kvm, pte_t *pte, bool full,
|
||||
unsigned int lpid)
|
||||
{
|
||||
if (full) {
|
||||
memset(pte, 0, sizeof(long) << PTE_INDEX_SIZE);
|
||||
memset(pte, 0, sizeof(long) << RADIX_PTE_INDEX_SIZE);
|
||||
} else {
|
||||
pte_t *p = pte;
|
||||
unsigned long it;
|
||||
|
@ -1073,25 +1073,35 @@ int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu)
|
||||
kvmppc_get_gpr(vcpu, 6));
|
||||
break;
|
||||
case H_SVM_PAGE_IN:
|
||||
ret = kvmppc_h_svm_page_in(vcpu->kvm,
|
||||
kvmppc_get_gpr(vcpu, 4),
|
||||
kvmppc_get_gpr(vcpu, 5),
|
||||
kvmppc_get_gpr(vcpu, 6));
|
||||
ret = H_UNSUPPORTED;
|
||||
if (kvmppc_get_srr1(vcpu) & MSR_S)
|
||||
ret = kvmppc_h_svm_page_in(vcpu->kvm,
|
||||
kvmppc_get_gpr(vcpu, 4),
|
||||
kvmppc_get_gpr(vcpu, 5),
|
||||
kvmppc_get_gpr(vcpu, 6));
|
||||
break;
|
||||
case H_SVM_PAGE_OUT:
|
||||
ret = kvmppc_h_svm_page_out(vcpu->kvm,
|
||||
kvmppc_get_gpr(vcpu, 4),
|
||||
kvmppc_get_gpr(vcpu, 5),
|
||||
kvmppc_get_gpr(vcpu, 6));
|
||||
ret = H_UNSUPPORTED;
|
||||
if (kvmppc_get_srr1(vcpu) & MSR_S)
|
||||
ret = kvmppc_h_svm_page_out(vcpu->kvm,
|
||||
kvmppc_get_gpr(vcpu, 4),
|
||||
kvmppc_get_gpr(vcpu, 5),
|
||||
kvmppc_get_gpr(vcpu, 6));
|
||||
break;
|
||||
case H_SVM_INIT_START:
|
||||
ret = kvmppc_h_svm_init_start(vcpu->kvm);
|
||||
ret = H_UNSUPPORTED;
|
||||
if (kvmppc_get_srr1(vcpu) & MSR_S)
|
||||
ret = kvmppc_h_svm_init_start(vcpu->kvm);
|
||||
break;
|
||||
case H_SVM_INIT_DONE:
|
||||
ret = kvmppc_h_svm_init_done(vcpu->kvm);
|
||||
ret = H_UNSUPPORTED;
|
||||
if (kvmppc_get_srr1(vcpu) & MSR_S)
|
||||
ret = kvmppc_h_svm_init_done(vcpu->kvm);
|
||||
break;
|
||||
case H_SVM_INIT_ABORT:
|
||||
ret = kvmppc_h_svm_init_abort(vcpu->kvm);
|
||||
ret = H_UNSUPPORTED;
|
||||
if (kvmppc_get_srr1(vcpu) & MSR_S)
|
||||
ret = kvmppc_h_svm_init_abort(vcpu->kvm);
|
||||
break;
|
||||
|
||||
default:
|
||||
@ -3615,6 +3625,7 @@ int kvmhv_p9_guest_entry(struct kvm_vcpu *vcpu, u64 time_limit,
|
||||
if (trap == BOOK3S_INTERRUPT_SYSCALL && !vcpu->arch.nested &&
|
||||
kvmppc_get_gpr(vcpu, 3) == H_CEDE) {
|
||||
kvmppc_nested_cede(vcpu);
|
||||
kvmppc_set_gpr(vcpu, 3, 0);
|
||||
trap = 0;
|
||||
}
|
||||
} else {
|
||||
@ -4554,11 +4565,6 @@ void kvmppc_update_lpcr(struct kvm *kvm, unsigned long lpcr, unsigned long mask)
|
||||
}
|
||||
}
|
||||
|
||||
static void kvmppc_mmu_destroy_hv(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
return;
|
||||
}
|
||||
|
||||
void kvmppc_setup_partition_table(struct kvm *kvm)
|
||||
{
|
||||
unsigned long dw0, dw1;
|
||||
@ -5422,6 +5428,21 @@ static void unpin_vpa_reset(struct kvm *kvm, struct kvmppc_vpa *vpa)
|
||||
vpa->update_pending = 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Enable a guest to become a secure VM, or test whether
|
||||
* that could be enabled.
|
||||
* Called when the KVM_CAP_PPC_SECURE_GUEST capability is
|
||||
* tested (kvm == NULL) or enabled (kvm != NULL).
|
||||
*/
|
||||
static int kvmhv_enable_svm(struct kvm *kvm)
|
||||
{
|
||||
if (!kvmppc_uvmem_available())
|
||||
return -EINVAL;
|
||||
if (kvm)
|
||||
kvm->arch.svm_enabled = 1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* IOCTL handler to turn off secure mode of guest
|
||||
*
|
||||
@ -5522,7 +5543,6 @@ static struct kvmppc_ops kvm_ops_hv = {
|
||||
.age_hva = kvm_age_hva_hv,
|
||||
.test_age_hva = kvm_test_age_hva_hv,
|
||||
.set_spte_hva = kvm_set_spte_hva_hv,
|
||||
.mmu_destroy = kvmppc_mmu_destroy_hv,
|
||||
.free_memslot = kvmppc_core_free_memslot_hv,
|
||||
.init_vm = kvmppc_core_init_vm_hv,
|
||||
.destroy_vm = kvmppc_core_destroy_vm_hv,
|
||||
@ -5543,6 +5563,7 @@ static struct kvmppc_ops kvm_ops_hv = {
|
||||
.enable_nested = kvmhv_enable_nested,
|
||||
.load_from_eaddr = kvmhv_load_from_eaddr,
|
||||
.store_to_eaddr = kvmhv_store_to_eaddr,
|
||||
.enable_svm = kvmhv_enable_svm,
|
||||
.svm_off = kvmhv_svm_off,
|
||||
};
|
||||
|
||||
|
@ -3,6 +3,8 @@
|
||||
* Copyright 2017 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
|
||||
*/
|
||||
|
||||
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
|
||||
|
||||
#include <linux/kvm_host.h>
|
||||
|
||||
#include <asm/kvm_ppc.h>
|
||||
@ -44,7 +46,18 @@ int kvmhv_p9_tm_emulation(struct kvm_vcpu *vcpu)
|
||||
u64 newmsr, bescr;
|
||||
int ra, rs;
|
||||
|
||||
switch (instr & 0xfc0007ff) {
|
||||
/*
|
||||
* rfid, rfebb, and mtmsrd encode bit 31 = 0 since it's a reserved bit
|
||||
* in these instructions, so masking bit 31 out doesn't change these
|
||||
* instructions. For treclaim., tsr., and trechkpt. instructions if bit
|
||||
* 31 = 0 then they are per ISA invalid forms, however P9 UM, in section
|
||||
* 4.6.10 Book II Invalid Forms, informs specifically that ignoring bit
|
||||
* 31 is an acceptable way to handle these invalid forms that have
|
||||
* bit 31 = 0. Moreover, for emulation purposes both forms (w/ and wo/
|
||||
* bit 31 set) can generate a softpatch interrupt. Hence both forms
|
||||
* are handled below for these instructions so they behave the same way.
|
||||
*/
|
||||
switch (instr & PO_XOP_OPCODE_MASK) {
|
||||
case PPC_INST_RFID:
|
||||
/* XXX do we need to check for PR=0 here? */
|
||||
newmsr = vcpu->arch.shregs.srr1;
|
||||
@ -105,7 +118,8 @@ int kvmhv_p9_tm_emulation(struct kvm_vcpu *vcpu)
|
||||
vcpu->arch.shregs.msr = newmsr;
|
||||
return RESUME_GUEST;
|
||||
|
||||
case PPC_INST_TSR:
|
||||
/* ignore bit 31, see comment above */
|
||||
case (PPC_INST_TSR & PO_XOP_OPCODE_MASK):
|
||||
/* check for PR=1 and arch 2.06 bit set in PCR */
|
||||
if ((msr & MSR_PR) && (vcpu->arch.vcore->pcr & PCR_ARCH_206)) {
|
||||
/* generate an illegal instruction interrupt */
|
||||
@ -140,7 +154,8 @@ int kvmhv_p9_tm_emulation(struct kvm_vcpu *vcpu)
|
||||
vcpu->arch.shregs.msr = msr;
|
||||
return RESUME_GUEST;
|
||||
|
||||
case PPC_INST_TRECLAIM:
|
||||
/* ignore bit 31, see comment above */
|
||||
case (PPC_INST_TRECLAIM & PO_XOP_OPCODE_MASK):
|
||||
/* check for TM disabled in the HFSCR or MSR */
|
||||
if (!(vcpu->arch.hfscr & HFSCR_TM)) {
|
||||
/* generate an illegal instruction interrupt */
|
||||
@ -176,7 +191,8 @@ int kvmhv_p9_tm_emulation(struct kvm_vcpu *vcpu)
|
||||
vcpu->arch.shregs.msr &= ~MSR_TS_MASK;
|
||||
return RESUME_GUEST;
|
||||
|
||||
case PPC_INST_TRECHKPT:
|
||||
/* ignore bit 31, see comment above */
|
||||
case (PPC_INST_TRECHKPT & PO_XOP_OPCODE_MASK):
|
||||
/* XXX do we need to check for PR=0 here? */
|
||||
/* check for TM disabled in the HFSCR or MSR */
|
||||
if (!(vcpu->arch.hfscr & HFSCR_TM)) {
|
||||
@ -208,6 +224,8 @@ int kvmhv_p9_tm_emulation(struct kvm_vcpu *vcpu)
|
||||
}
|
||||
|
||||
/* What should we do here? We didn't recognize the instruction */
|
||||
WARN_ON_ONCE(1);
|
||||
kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
|
||||
pr_warn_ratelimited("Unrecognized TM-related instruction %#x for emulation", instr);
|
||||
|
||||
return RESUME_GUEST;
|
||||
}
|
||||
|
@ -23,7 +23,18 @@ int kvmhv_p9_tm_emulation_early(struct kvm_vcpu *vcpu)
|
||||
u64 newmsr, msr, bescr;
|
||||
int rs;
|
||||
|
||||
switch (instr & 0xfc0007ff) {
|
||||
/*
|
||||
* rfid, rfebb, and mtmsrd encode bit 31 = 0 since it's a reserved bit
|
||||
* in these instructions, so masking bit 31 out doesn't change these
|
||||
* instructions. For the tsr. instruction if bit 31 = 0 then it is per
|
||||
* ISA an invalid form, however P9 UM, in section 4.6.10 Book II Invalid
|
||||
* Forms, informs specifically that ignoring bit 31 is an acceptable way
|
||||
* to handle TM-related invalid forms that have bit 31 = 0. Moreover,
|
||||
* for emulation purposes both forms (w/ and wo/ bit 31 set) can
|
||||
* generate a softpatch interrupt. Hence both forms are handled below
|
||||
* for tsr. to make them behave the same way.
|
||||
*/
|
||||
switch (instr & PO_XOP_OPCODE_MASK) {
|
||||
case PPC_INST_RFID:
|
||||
/* XXX do we need to check for PR=0 here? */
|
||||
newmsr = vcpu->arch.shregs.srr1;
|
||||
@ -73,7 +84,8 @@ int kvmhv_p9_tm_emulation_early(struct kvm_vcpu *vcpu)
|
||||
vcpu->arch.shregs.msr = newmsr;
|
||||
return 1;
|
||||
|
||||
case PPC_INST_TSR:
|
||||
/* ignore bit 31, see comment above */
|
||||
case (PPC_INST_TSR & PO_XOP_OPCODE_MASK):
|
||||
/* we know the MSR has the TS field = S (0b01) here */
|
||||
msr = vcpu->arch.shregs.msr;
|
||||
/* check for PR=1 and arch 2.06 bit set in PCR */
|
||||
|
@ -113,6 +113,15 @@ struct kvmppc_uvmem_page_pvt {
|
||||
bool skip_page_out;
|
||||
};
|
||||
|
||||
bool kvmppc_uvmem_available(void)
|
||||
{
|
||||
/*
|
||||
* If kvmppc_uvmem_bitmap != NULL, then there is an ultravisor
|
||||
* and our data structures have been initialized successfully.
|
||||
*/
|
||||
return !!kvmppc_uvmem_bitmap;
|
||||
}
|
||||
|
||||
int kvmppc_uvmem_slot_init(struct kvm *kvm, const struct kvm_memory_slot *slot)
|
||||
{
|
||||
struct kvmppc_uvmem_slot *p;
|
||||
@ -209,6 +218,8 @@ unsigned long kvmppc_h_svm_init_start(struct kvm *kvm)
|
||||
int ret = H_SUCCESS;
|
||||
int srcu_idx;
|
||||
|
||||
kvm->arch.secure_guest = KVMPPC_SECURE_INIT_START;
|
||||
|
||||
if (!kvmppc_uvmem_bitmap)
|
||||
return H_UNSUPPORTED;
|
||||
|
||||
@ -216,6 +227,10 @@ unsigned long kvmppc_h_svm_init_start(struct kvm *kvm)
|
||||
if (!kvm_is_radix(kvm))
|
||||
return H_UNSUPPORTED;
|
||||
|
||||
/* NAK the transition to secure if not enabled */
|
||||
if (!kvm->arch.svm_enabled)
|
||||
return H_AUTHORITY;
|
||||
|
||||
srcu_idx = srcu_read_lock(&kvm->srcu);
|
||||
slots = kvm_memslots(kvm);
|
||||
kvm_for_each_memslot(memslot, slots) {
|
||||
@ -233,7 +248,6 @@ unsigned long kvmppc_h_svm_init_start(struct kvm *kvm)
|
||||
goto out;
|
||||
}
|
||||
}
|
||||
kvm->arch.secure_guest |= KVMPPC_SECURE_INIT_START;
|
||||
out:
|
||||
srcu_read_unlock(&kvm->srcu, srcu_idx);
|
||||
return ret;
|
||||
@ -806,6 +820,9 @@ out:
|
||||
|
||||
void kvmppc_uvmem_free(void)
|
||||
{
|
||||
if (!kvmppc_uvmem_bitmap)
|
||||
return;
|
||||
|
||||
memunmap_pages(&kvmppc_uvmem_pgmap);
|
||||
release_mem_region(kvmppc_uvmem_pgmap.res.start,
|
||||
resource_size(&kvmppc_uvmem_pgmap.res));
|
||||
|
@ -740,7 +740,7 @@ int kvmppc_handle_pagefault(struct kvm_run *run, struct kvm_vcpu *vcpu,
|
||||
(vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) &&
|
||||
((pte.raddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS))
|
||||
pte.raddr &= ~SPLIT_HACK_MASK;
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
case MSR_IR:
|
||||
vcpu->arch.mmu.esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid);
|
||||
|
||||
@ -1795,7 +1795,7 @@ static int kvmppc_core_vcpu_create_pr(struct kvm_vcpu *vcpu)
|
||||
|
||||
vcpu->arch.shadow_msr = MSR_USER64 & ~MSR_LE;
|
||||
|
||||
err = kvmppc_mmu_init(vcpu);
|
||||
err = kvmppc_mmu_init_pr(vcpu);
|
||||
if (err < 0)
|
||||
goto free_shared_page;
|
||||
|
||||
@ -1817,6 +1817,7 @@ static void kvmppc_core_vcpu_free_pr(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
|
||||
|
||||
kvmppc_mmu_destroy_pr(vcpu);
|
||||
free_page((unsigned long)vcpu->arch.shared & PAGE_MASK);
|
||||
#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
|
||||
kfree(vcpu->arch.shadow_vcpu);
|
||||
@ -2086,7 +2087,6 @@ static struct kvmppc_ops kvm_ops_pr = {
|
||||
.age_hva = kvm_age_hva_pr,
|
||||
.test_age_hva = kvm_test_age_hva_pr,
|
||||
.set_spte_hva = kvm_set_spte_hva_pr,
|
||||
.mmu_destroy = kvmppc_mmu_destroy_pr,
|
||||
.free_memslot = kvmppc_core_free_memslot_pr,
|
||||
.init_vm = kvmppc_core_init_vm_pr,
|
||||
.destroy_vm = kvmppc_core_destroy_vm_pr,
|
||||
|
@ -421,11 +421,11 @@ static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
|
||||
case BOOKE_IRQPRIO_DATA_STORAGE:
|
||||
case BOOKE_IRQPRIO_ALIGNMENT:
|
||||
update_dear = true;
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
case BOOKE_IRQPRIO_INST_STORAGE:
|
||||
case BOOKE_IRQPRIO_PROGRAM:
|
||||
update_esr = true;
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
case BOOKE_IRQPRIO_ITLB_MISS:
|
||||
case BOOKE_IRQPRIO_SYSCALL:
|
||||
case BOOKE_IRQPRIO_FP_UNAVAIL:
|
||||
@ -459,7 +459,7 @@ static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
|
||||
case BOOKE_IRQPRIO_DECREMENTER:
|
||||
case BOOKE_IRQPRIO_FIT:
|
||||
keep_irq = true;
|
||||
/* fall through */
|
||||
fallthrough;
|
||||
case BOOKE_IRQPRIO_EXTERNAL:
|
||||
case BOOKE_IRQPRIO_DBELL:
|
||||
allowed = vcpu->arch.shared->msr & MSR_EE;
|
||||
@ -2073,11 +2073,6 @@ void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu)
|
||||
kvmppc_clear_dbsr();
|
||||
}
|
||||
|
||||
void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
vcpu->kvm->arch.kvm_ops->mmu_destroy(vcpu);
|
||||
}
|
||||
|
||||
int kvmppc_core_init_vm(struct kvm *kvm)
|
||||
{
|
||||
return kvm->arch.kvm_ops->init_vm(kvm);
|
||||
|
@ -94,7 +94,6 @@ enum int_class {
|
||||
|
||||
void kvmppc_set_pending_interrupt(struct kvm_vcpu *vcpu, enum int_class type);
|
||||
|
||||
extern void kvmppc_mmu_destroy_e500(struct kvm_vcpu *vcpu);
|
||||
extern int kvmppc_core_emulate_op_e500(struct kvm_run *run,
|
||||
struct kvm_vcpu *vcpu,
|
||||
unsigned int inst, int *advance);
|
||||
@ -102,7 +101,6 @@ extern int kvmppc_core_emulate_mtspr_e500(struct kvm_vcpu *vcpu, int sprn,
|
||||
ulong spr_val);
|
||||
extern int kvmppc_core_emulate_mfspr_e500(struct kvm_vcpu *vcpu, int sprn,
|
||||
ulong *spr_val);
|
||||
extern void kvmppc_mmu_destroy_e500(struct kvm_vcpu *vcpu);
|
||||
extern int kvmppc_core_emulate_op_e500(struct kvm_run *run,
|
||||
struct kvm_vcpu *vcpu,
|
||||
unsigned int inst, int *advance);
|
||||
|
@ -490,7 +490,6 @@ static struct kvmppc_ops kvm_ops_e500 = {
|
||||
.vcpu_put = kvmppc_core_vcpu_put_e500,
|
||||
.vcpu_create = kvmppc_core_vcpu_create_e500,
|
||||
.vcpu_free = kvmppc_core_vcpu_free_e500,
|
||||
.mmu_destroy = kvmppc_mmu_destroy_e500,
|
||||
.init_vm = kvmppc_core_init_vm_e500,
|
||||
.destroy_vm = kvmppc_core_destroy_vm_e500,
|
||||
.emulate_op = kvmppc_core_emulate_op_e500,
|
||||
|
@ -533,10 +533,6 @@ gpa_t kvmppc_mmu_xlate(struct kvm_vcpu *vcpu, unsigned int index,
|
||||
return get_tlb_raddr(gtlbe) | (eaddr & pgmask);
|
||||
}
|
||||
|
||||
void kvmppc_mmu_destroy_e500(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
}
|
||||
|
||||
/*****************************************/
|
||||
|
||||
static void free_gtlb(struct kvmppc_vcpu_e500 *vcpu_e500)
|
||||
|
@ -376,7 +376,6 @@ static struct kvmppc_ops kvm_ops_e500mc = {
|
||||
.vcpu_put = kvmppc_core_vcpu_put_e500mc,
|
||||
.vcpu_create = kvmppc_core_vcpu_create_e500mc,
|
||||
.vcpu_free = kvmppc_core_vcpu_free_e500mc,
|
||||
.mmu_destroy = kvmppc_mmu_destroy_e500,
|
||||
.init_vm = kvmppc_core_init_vm_e500mc,
|
||||
.destroy_vm = kvmppc_core_destroy_vm_e500mc,
|
||||
.emulate_op = kvmppc_core_emulate_op_e500,
|
||||
|
@ -524,7 +524,6 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
|
||||
r = 1;
|
||||
break;
|
||||
case KVM_CAP_PPC_GUEST_DEBUG_SSTEP:
|
||||
/* fall through */
|
||||
case KVM_CAP_PPC_PAIRED_SINGLES:
|
||||
case KVM_CAP_PPC_OSI:
|
||||
case KVM_CAP_PPC_GET_PVINFO:
|
||||
@ -669,6 +668,12 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
|
||||
r = !!(cur_cpu_spec->cpu_user_features2 & PPC_FEATURE2_HTM) ||
|
||||
(hv_enabled && cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST));
|
||||
break;
|
||||
#endif
|
||||
#if defined(CONFIG_KVM_BOOK3S_HV_POSSIBLE)
|
||||
case KVM_CAP_PPC_SECURE_GUEST:
|
||||
r = hv_enabled && kvmppc_hv_ops->enable_svm &&
|
||||
!kvmppc_hv_ops->enable_svm(NULL);
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
r = 0;
|
||||
@ -751,7 +756,6 @@ int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
|
||||
return 0;
|
||||
|
||||
out_vcpu_uninit:
|
||||
kvmppc_mmu_destroy(vcpu);
|
||||
kvmppc_subarch_vcpu_uninit(vcpu);
|
||||
return err;
|
||||
}
|
||||
@ -784,7 +788,6 @@ void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
|
||||
|
||||
kvmppc_core_vcpu_free(vcpu);
|
||||
|
||||
kvmppc_mmu_destroy(vcpu);
|
||||
kvmppc_subarch_vcpu_uninit(vcpu);
|
||||
}
|
||||
|
||||
@ -2169,6 +2172,14 @@ int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
|
||||
break;
|
||||
r = kvm->arch.kvm_ops->enable_nested(kvm);
|
||||
break;
|
||||
#endif
|
||||
#if defined(CONFIG_KVM_BOOK3S_HV_POSSIBLE)
|
||||
case KVM_CAP_PPC_SECURE_GUEST:
|
||||
r = -EINVAL;
|
||||
if (!is_kvmppc_hv_enabled(kvm) || !kvm->arch.kvm_ops->enable_svm)
|
||||
break;
|
||||
r = kvm->arch.kvm_ops->enable_svm(kvm);
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
r = -EINVAL;
|
||||
|
@ -1016,6 +1016,7 @@ struct kvm_ppc_resize_hpt {
|
||||
#define KVM_CAP_ARM_INJECT_EXT_DABT 178
|
||||
#define KVM_CAP_S390_VCPU_RESETS 179
|
||||
#define KVM_CAP_S390_PROTECTED 180
|
||||
#define KVM_CAP_PPC_SECURE_GUEST 181
|
||||
|
||||
#ifdef KVM_CAP_IRQ_ROUTING
|
||||
|
||||
|
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Reference in New Issue
Block a user