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Merge branch 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev
* 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev: [PATCH] libata: Fixup ata_sas_queuecmd to handle __ata_scsi_queuecmd failure [PATCH] ahci: AHCI mode SATA patch for Intel ICH9 [PATCH] libata: don't schedule EH on wcache on/off if old EH
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commit
4f404caf67
@ -314,6 +314,17 @@ static const struct pci_device_id ahci_pci_tbl[] = {
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{ PCI_VDEVICE(INTEL, 0x2824), board_ahci }, /* ICH8 */
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{ PCI_VDEVICE(INTEL, 0x2829), board_ahci }, /* ICH8M */
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{ PCI_VDEVICE(INTEL, 0x282a), board_ahci }, /* ICH8M */
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{ PCI_VDEVICE(INTEL, 0x2922), board_ahci }, /* ICH9 */
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{ PCI_VDEVICE(INTEL, 0x2923), board_ahci }, /* ICH9 */
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{ PCI_VDEVICE(INTEL, 0x2924), board_ahci }, /* ICH9 */
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{ PCI_VDEVICE(INTEL, 0x2925), board_ahci }, /* ICH9 */
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{ PCI_VDEVICE(INTEL, 0x2927), board_ahci }, /* ICH9 */
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{ PCI_VDEVICE(INTEL, 0x2929), board_ahci }, /* ICH9M */
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{ PCI_VDEVICE(INTEL, 0x292a), board_ahci }, /* ICH9M */
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{ PCI_VDEVICE(INTEL, 0x292b), board_ahci }, /* ICH9M */
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{ PCI_VDEVICE(INTEL, 0x292f), board_ahci }, /* ICH9M */
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{ PCI_VDEVICE(INTEL, 0x294d), board_ahci }, /* ICH9 */
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{ PCI_VDEVICE(INTEL, 0x294e), board_ahci }, /* ICH9M */
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/* JMicron */
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{ PCI_VDEVICE(JMICRON, 0x2360), board_ahci }, /* JMicron JMB360 */
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@ -1451,6 +1451,7 @@ nothing_to_do:
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static void ata_scsi_qc_complete(struct ata_queued_cmd *qc)
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{
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struct ata_port *ap = qc->ap;
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struct scsi_cmnd *cmd = qc->scsicmd;
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u8 *cdb = cmd->cmnd;
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int need_sense = (qc->err_mask != 0);
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@ -1459,11 +1460,12 @@ static void ata_scsi_qc_complete(struct ata_queued_cmd *qc)
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* schedule EH_REVALIDATE operation to update the IDENTIFY DEVICE
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* cache
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*/
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if (!need_sense && (qc->tf.command == ATA_CMD_SET_FEATURES) &&
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if (ap->ops->error_handler &&
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!need_sense && (qc->tf.command == ATA_CMD_SET_FEATURES) &&
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((qc->tf.feature == SETFEATURES_WC_ON) ||
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(qc->tf.feature == SETFEATURES_WC_OFF))) {
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qc->ap->eh_info.action |= ATA_EH_REVALIDATE;
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ata_port_schedule_eh(qc->ap);
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ap->eh_info.action |= ATA_EH_REVALIDATE;
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ata_port_schedule_eh(ap);
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}
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/* For ATA pass thru (SAT) commands, generate a sense block if
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@ -1490,8 +1492,8 @@ static void ata_scsi_qc_complete(struct ata_queued_cmd *qc)
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}
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}
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if (need_sense && !qc->ap->ops->error_handler)
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ata_dump_status(qc->ap->id, &qc->result_tf);
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if (need_sense && !ap->ops->error_handler)
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ata_dump_status(ap->id, &qc->result_tf);
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qc->scsidone(cmd);
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@ -3345,20 +3347,23 @@ EXPORT_SYMBOL_GPL(ata_sas_slave_configure);
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* @ap: ATA port to which the command is being sent
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*
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* RETURNS:
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* Zero.
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* Return value from __ata_scsi_queuecmd() if @cmd can be queued,
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* 0 otherwise.
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*/
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int ata_sas_queuecmd(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *),
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struct ata_port *ap)
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{
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int rc = 0;
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ata_scsi_dump_cdb(ap, cmd);
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if (likely(ata_scsi_dev_enabled(ap->device)))
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__ata_scsi_queuecmd(cmd, done, ap->device);
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rc = __ata_scsi_queuecmd(cmd, done, ap->device);
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else {
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cmd->result = (DID_BAD_TARGET << 16);
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done(cmd);
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}
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return 0;
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return rc;
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}
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EXPORT_SYMBOL_GPL(ata_sas_queuecmd);
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