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scsi: scsi_debug: IMMED related delay adjustments
A patch titled: "[PATCH v2] scsi_debug: implement IMMED bit" introduced long delays to the Start stop unit (SSU) and Synchronize cache (SC) commands when the IMMED bit is clear. This patch makes those delays more realistic. It causes SSU to only delay when the start stop state is changed; SC only delays when there's been a write since the previous SC. It also reduced the SC delay from 1 second to 50 milliseconds. Signed-off-by: Douglas Gilbert <dgilbert@interlog.com> Tested-by: Ming Lei <ming.lei@redhat.com> Reported-by: Ming Lei <ming.lei@redhat.com> Reviewed-by: Johannes Thumshirn <jthumshirn@suse.de> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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@ -234,11 +234,13 @@ static const char *sdebug_version_date = "20180128";
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#define F_INV_OP 0x200
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#define F_FAKE_RW 0x400
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#define F_M_ACCESS 0x800 /* media access */
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#define F_LONG_DELAY 0x1000
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#define F_SSU_DELAY 0x1000
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#define F_SYNC_DELAY 0x2000
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#define FF_RESPOND (F_RL_WLUN_OK | F_SKIP_UA | F_DELAY_OVERR)
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#define FF_MEDIA_IO (F_M_ACCESS | F_FAKE_RW)
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#define FF_SA (F_SA_HIGH | F_SA_LOW)
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#define F_LONG_DELAY (F_SSU_DELAY | F_SYNC_DELAY)
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#define SDEBUG_MAX_PARTS 4
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@ -510,7 +512,7 @@ static const struct opcode_info_t release_iarr[] = {
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};
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static const struct opcode_info_t sync_cache_iarr[] = {
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{0, 0x91, 0, F_LONG_DELAY | F_M_ACCESS, resp_sync_cache, NULL,
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{0, 0x91, 0, F_SYNC_DELAY | F_M_ACCESS, resp_sync_cache, NULL,
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{16, 0x6, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0x3f, 0xc7} }, /* SYNC_CACHE (16) */
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};
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@ -553,7 +555,7 @@ static const struct opcode_info_t opcode_info_arr[SDEB_I_LAST_ELEMENT + 1] = {
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resp_write_dt0, write_iarr, /* WRITE(16) */
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{16, 0xfa, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xc7} },
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{0, 0x1b, 0, F_LONG_DELAY, resp_start_stop, NULL,/* START STOP UNIT */
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{0, 0x1b, 0, F_SSU_DELAY, resp_start_stop, NULL,/* START STOP UNIT */
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{6, 0x1, 0, 0xf, 0xf7, 0xc7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0} },
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{ARRAY_SIZE(sa_in_16_iarr), 0x9e, 0x10, F_SA_LOW | F_D_IN,
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resp_readcap16, sa_in_16_iarr, /* SA_IN(16), READ CAPACITY(16) */
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@ -606,7 +608,7 @@ static const struct opcode_info_t opcode_info_arr[SDEB_I_LAST_ELEMENT + 1] = {
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resp_write_same_10, write_same_iarr, /* WRITE SAME(10) */
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{10, 0xff, 0xff, 0xff, 0xff, 0xff, 0x3f, 0xff, 0xff, 0xc7, 0,
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0, 0, 0, 0, 0} },
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{ARRAY_SIZE(sync_cache_iarr), 0x35, 0, F_LONG_DELAY | F_M_ACCESS,
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{ARRAY_SIZE(sync_cache_iarr), 0x35, 0, F_SYNC_DELAY | F_M_ACCESS,
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resp_sync_cache, sync_cache_iarr,
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{10, 0x7, 0xff, 0xff, 0xff, 0xff, 0x3f, 0xff, 0xff, 0xc7, 0, 0,
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0, 0, 0, 0} }, /* SYNC_CACHE (10) */
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@ -667,6 +669,7 @@ static bool sdebug_strict = DEF_STRICT;
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static bool sdebug_any_injecting_opt;
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static bool sdebug_verbose;
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static bool have_dif_prot;
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static bool write_since_sync;
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static bool sdebug_statistics = DEF_STATISTICS;
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static unsigned int sdebug_store_sectors;
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@ -1607,6 +1610,7 @@ static int resp_start_stop(struct scsi_cmnd *scp,
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{
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unsigned char *cmd = scp->cmnd;
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int power_cond, stop;
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bool changing;
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power_cond = (cmd[4] & 0xf0) >> 4;
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if (power_cond) {
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@ -1614,8 +1618,12 @@ static int resp_start_stop(struct scsi_cmnd *scp,
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return check_condition_result;
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}
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stop = !(cmd[4] & 1);
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changing = atomic_read(&devip->stopped) == !stop;
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atomic_xchg(&devip->stopped, stop);
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return (cmd[1] & 0x1) ? SDEG_RES_IMMED_MASK : 0; /* check IMMED bit */
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if (!changing || cmd[1] & 0x1) /* state unchanged or IMMED set */
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return SDEG_RES_IMMED_MASK;
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else
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return 0;
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}
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static sector_t get_sdebug_capacity(void)
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@ -2473,6 +2481,7 @@ static int do_device_access(struct scsi_cmnd *scmd, u32 sg_skip, u64 lba,
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if (do_write) {
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sdb = scsi_out(scmd);
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dir = DMA_TO_DEVICE;
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write_since_sync = true;
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} else {
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sdb = scsi_in(scmd);
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dir = DMA_FROM_DEVICE;
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@ -3583,6 +3592,7 @@ static int resp_get_lba_status(struct scsi_cmnd *scp,
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static int resp_sync_cache(struct scsi_cmnd *scp,
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struct sdebug_dev_info *devip)
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{
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int res = 0;
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u64 lba;
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u32 num_blocks;
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u8 *cmd = scp->cmnd;
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@ -3598,7 +3608,11 @@ static int resp_sync_cache(struct scsi_cmnd *scp,
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mk_sense_buffer(scp, ILLEGAL_REQUEST, LBA_OUT_OF_RANGE, 0);
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return check_condition_result;
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}
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return (cmd[1] & 0x2) ? SDEG_RES_IMMED_MASK : 0; /* check IMMED bit */
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if (!write_since_sync || cmd[1] & 0x2)
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res = SDEG_RES_IMMED_MASK;
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else /* delay if write_since_sync and IMMED clear */
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write_since_sync = false;
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return res;
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}
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#define RL_BUCKET_ELEMS 8
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@ -5777,13 +5791,14 @@ fini:
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return schedule_resp(scp, devip, errsts, pfp, 0, 0);
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else if ((sdebug_jdelay || sdebug_ndelay) && (flags & F_LONG_DELAY)) {
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/*
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* If any delay is active, want F_LONG_DELAY to be at least 1
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* If any delay is active, for F_SSU_DELAY want at least 1
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* second and if sdebug_jdelay>0 want a long delay of that
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* many seconds.
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* many seconds; for F_SYNC_DELAY want 1/20 of that.
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*/
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int jdelay = (sdebug_jdelay < 2) ? 1 : sdebug_jdelay;
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int denom = (flags & F_SYNC_DELAY) ? 20 : 1;
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jdelay = mult_frac(USER_HZ * jdelay, HZ, USER_HZ);
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jdelay = mult_frac(USER_HZ * jdelay, HZ, denom * USER_HZ);
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return schedule_resp(scp, devip, errsts, pfp, jdelay, 0);
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} else
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return schedule_resp(scp, devip, errsts, pfp, sdebug_jdelay,
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