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iwlwifi: mvm: support using multiple ACs on single HW queue
"DQA" is shorthand for "dynamic queue allocation", with the idea of allocating queues per-RA/TID on-demand rather than using shared queues statically allocated per vif. The goal of this is to enable future features (like GO PM) and to improve performance measurements of TX traffic. When RA/TID streams can't be neatly sorted into different AC queues, DQA allows sharing queues for the same RA. This means that DQA allows different ACs may reach the same HW queue. Update the code to allow such queue sharing by having a mapping between the HW queue and the mac80211 queues using it (as this could be more than one queue). Signed-off-by: Liad Kaufman <liad.kaufman@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
This commit is contained in:
Liad Kaufman
Luca Coelho
parent
56882e6cab
commit
4ecafae9e5
@ -616,12 +616,8 @@ static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
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* will be empty.
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*/
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for (i = 0; i < IWL_MAX_HW_QUEUES; i++) {
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if (i < mvm->first_agg_queue && i != IWL_MVM_CMD_QUEUE)
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mvm->queue_to_mac80211[i] = i;
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else
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mvm->queue_to_mac80211[i] = IWL_INVALID_MAC80211_QUEUE;
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}
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memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
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mvm->queue_info[IWL_MVM_CMD_QUEUE].hw_queue_refcount = 1;
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for (i = 0; i < IEEE80211_MAX_QUEUES; i++)
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atomic_set(&mvm->mac80211_queue_stop_count[i], 0);
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@ -486,15 +486,17 @@ int iwl_mvm_mac_ctxt_init(struct iwl_mvm *mvm, struct ieee80211_vif *vif)
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switch (vif->type) {
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case NL80211_IFTYPE_P2P_DEVICE:
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iwl_mvm_enable_ac_txq(mvm, IWL_MVM_OFFCHANNEL_QUEUE,
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IWL_MVM_OFFCHANNEL_QUEUE,
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IWL_MVM_TX_FIFO_VO, wdg_timeout);
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break;
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case NL80211_IFTYPE_AP:
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iwl_mvm_enable_ac_txq(mvm, vif->cab_queue,
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iwl_mvm_enable_ac_txq(mvm, vif->cab_queue, vif->cab_queue,
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IWL_MVM_TX_FIFO_MCAST, wdg_timeout);
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/* fall through */
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default:
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for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
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iwl_mvm_enable_ac_txq(mvm, vif->hw_queue[ac],
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vif->hw_queue[ac],
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iwl_mvm_ac_to_tx_fifo[ac],
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wdg_timeout);
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break;
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@ -511,14 +513,19 @@ void iwl_mvm_mac_ctxt_release(struct iwl_mvm *mvm, struct ieee80211_vif *vif)
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switch (vif->type) {
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case NL80211_IFTYPE_P2P_DEVICE:
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iwl_mvm_disable_txq(mvm, IWL_MVM_OFFCHANNEL_QUEUE, 0);
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iwl_mvm_disable_txq(mvm, IWL_MVM_OFFCHANNEL_QUEUE,
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IWL_MVM_OFFCHANNEL_QUEUE, IWL_MAX_TID_COUNT,
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0);
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break;
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case NL80211_IFTYPE_AP:
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iwl_mvm_disable_txq(mvm, vif->cab_queue, 0);
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iwl_mvm_disable_txq(mvm, vif->cab_queue, vif->cab_queue,
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IWL_MAX_TID_COUNT, 0);
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/* fall through */
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default:
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for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
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iwl_mvm_disable_txq(mvm, vif->hw_queue[ac], 0);
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iwl_mvm_disable_txq(mvm, vif->hw_queue[ac],
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vif->hw_queue[ac],
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IWL_MAX_TID_COUNT, 0);
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}
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}
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@ -82,7 +82,6 @@
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#include "constants.h"
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#include "tof.h"
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#define IWL_INVALID_MAC80211_QUEUE 0xff
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#define IWL_MVM_MAX_ADDRESSES 5
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/* RSSI offset for WkP */
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#define IWL_RSSI_OFFSET 50
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@ -605,7 +604,14 @@ struct iwl_mvm {
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u64 on_time_scan;
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} radio_stats, accu_radio_stats;
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u8 queue_to_mac80211[IWL_MAX_HW_QUEUES];
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struct {
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/* Map to HW queue */
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u32 hw_queue_to_mac80211;
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u8 hw_queue_refcount;
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bool setup_reserved;
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u16 tid_bitmap; /* Bitmap of the TIDs mapped to this queue */
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} queue_info[IWL_MAX_HW_QUEUES];
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spinlock_t queue_info_lock; /* For syncing queue mgmt operations */
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atomic_t mac80211_queue_stop_count[IEEE80211_MAX_QUEUES];
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const char *nvm_file_name;
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@ -910,6 +916,12 @@ static inline bool iwl_mvm_is_d0i3_supported(struct iwl_mvm *mvm)
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IWL_UCODE_TLV_CAPA_D0I3_SUPPORT);
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}
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static inline bool iwl_mvm_is_dqa_supported(struct iwl_mvm *mvm)
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{
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return fw_has_capa(&mvm->fw->ucode_capa,
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IWL_UCODE_TLV_CAPA_DQA_SUPPORT);
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}
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static inline bool iwl_mvm_is_lar_supported(struct iwl_mvm *mvm)
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{
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bool nvm_lar = mvm->nvm_data->lar_enabled;
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@ -1341,13 +1353,19 @@ static inline bool iwl_mvm_vif_low_latency(struct iwl_mvm_vif *mvmvif)
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}
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/* hw scheduler queue config */
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void iwl_mvm_enable_txq(struct iwl_mvm *mvm, int queue, u16 ssn,
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const struct iwl_trans_txq_scd_cfg *cfg,
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void iwl_mvm_enable_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue,
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u16 ssn, const struct iwl_trans_txq_scd_cfg *cfg,
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unsigned int wdg_timeout);
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void iwl_mvm_disable_txq(struct iwl_mvm *mvm, int queue, u8 flags);
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/*
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* Disable a TXQ.
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* Note that in non-DQA mode the %mac80211_queue and %tid params are ignored.
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*/
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void iwl_mvm_disable_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue,
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u8 tid, u8 flags);
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int iwl_mvm_find_free_queue(struct iwl_mvm *mvm, u8 minq, u8 maxq);
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static inline
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void iwl_mvm_enable_ac_txq(struct iwl_mvm *mvm, int queue,
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void iwl_mvm_enable_ac_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue,
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u8 fifo, unsigned int wdg_timeout)
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{
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struct iwl_trans_txq_scd_cfg cfg = {
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@ -1357,13 +1375,13 @@ void iwl_mvm_enable_ac_txq(struct iwl_mvm *mvm, int queue,
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.frame_limit = IWL_FRAME_LIMIT,
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};
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iwl_mvm_enable_txq(mvm, queue, 0, &cfg, wdg_timeout);
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iwl_mvm_enable_txq(mvm, queue, mac80211_queue, 0, &cfg, wdg_timeout);
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}
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static inline void iwl_mvm_enable_agg_txq(struct iwl_mvm *mvm, int queue,
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int fifo, int sta_id, int tid,
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int frame_limit, u16 ssn,
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unsigned int wdg_timeout)
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int mac80211_queue, int fifo,
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int sta_id, int tid, int frame_limit,
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u16 ssn, unsigned int wdg_timeout)
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{
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struct iwl_trans_txq_scd_cfg cfg = {
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.fifo = fifo,
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@ -1373,7 +1391,7 @@ static inline void iwl_mvm_enable_agg_txq(struct iwl_mvm *mvm, int queue,
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.aggregate = true,
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};
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iwl_mvm_enable_txq(mvm, queue, ssn, &cfg, wdg_timeout);
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iwl_mvm_enable_txq(mvm, queue, mac80211_queue, ssn, &cfg, wdg_timeout);
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}
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/* Thermal management and CT-kill */
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@ -453,6 +453,7 @@ iwl_op_mode_mvm_start(struct iwl_trans *trans, const struct iwl_cfg *cfg,
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INIT_LIST_HEAD(&mvm->aux_roc_te_list);
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INIT_LIST_HEAD(&mvm->async_handlers_list);
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spin_lock_init(&mvm->time_event_lock);
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spin_lock_init(&mvm->queue_info_lock);
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INIT_WORK(&mvm->async_handlers_wk, iwl_mvm_async_handlers_wk);
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INIT_WORK(&mvm->roc_done_wk, iwl_mvm_roc_done_wk);
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@ -775,37 +776,51 @@ static void iwl_mvm_rx_dispatch(struct iwl_op_mode *op_mode,
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static void iwl_mvm_stop_sw_queue(struct iwl_op_mode *op_mode, int queue)
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{
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struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
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int mq = mvm->queue_to_mac80211[queue];
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unsigned long mq;
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int q;
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if (WARN_ON_ONCE(mq == IWL_INVALID_MAC80211_QUEUE))
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spin_lock_bh(&mvm->queue_info_lock);
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mq = mvm->queue_info[queue].hw_queue_to_mac80211;
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spin_unlock_bh(&mvm->queue_info_lock);
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if (WARN_ON_ONCE(!mq))
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return;
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if (atomic_inc_return(&mvm->mac80211_queue_stop_count[mq]) > 1) {
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IWL_DEBUG_TX_QUEUES(mvm,
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"queue %d (mac80211 %d) already stopped\n",
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queue, mq);
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return;
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for_each_set_bit(q, &mq, IEEE80211_MAX_QUEUES) {
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if (atomic_inc_return(&mvm->mac80211_queue_stop_count[q]) > 1) {
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IWL_DEBUG_TX_QUEUES(mvm,
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"queue %d (mac80211 %d) already stopped\n",
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queue, q);
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continue;
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}
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ieee80211_stop_queue(mvm->hw, q);
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}
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ieee80211_stop_queue(mvm->hw, mq);
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}
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static void iwl_mvm_wake_sw_queue(struct iwl_op_mode *op_mode, int queue)
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{
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struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
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int mq = mvm->queue_to_mac80211[queue];
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unsigned long mq;
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int q;
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if (WARN_ON_ONCE(mq == IWL_INVALID_MAC80211_QUEUE))
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spin_lock_bh(&mvm->queue_info_lock);
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mq = mvm->queue_info[queue].hw_queue_to_mac80211;
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spin_unlock_bh(&mvm->queue_info_lock);
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if (WARN_ON_ONCE(!mq))
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return;
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if (atomic_dec_return(&mvm->mac80211_queue_stop_count[mq]) > 0) {
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IWL_DEBUG_TX_QUEUES(mvm,
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"queue %d (mac80211 %d) still stopped\n",
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queue, mq);
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return;
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for_each_set_bit(q, &mq, IEEE80211_MAX_QUEUES) {
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if (atomic_dec_return(&mvm->mac80211_queue_stop_count[q]) > 0) {
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IWL_DEBUG_TX_QUEUES(mvm,
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"queue %d (mac80211 %d) still stopped\n",
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queue, q);
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continue;
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}
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ieee80211_wake_queue(mvm->hw, q);
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}
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ieee80211_wake_queue(mvm->hw, mq);
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}
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void iwl_mvm_set_hw_ctkill_state(struct iwl_mvm *mvm, bool state)
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@ -234,6 +234,7 @@ static int iwl_mvm_tdls_sta_init(struct iwl_mvm *mvm,
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/* Found a place for all queues - enable them */
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for (ac = 0; ac < IEEE80211_NUM_ACS; ac++) {
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iwl_mvm_enable_ac_txq(mvm, mvmsta->hw_queue[ac],
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mvmsta->hw_queue[ac],
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iwl_mvm_ac_to_tx_fifo[ac], wdg_timeout);
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mvmsta->tfd_queue_msk |= BIT(mvmsta->hw_queue[ac]);
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}
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@ -253,7 +254,7 @@ static void iwl_mvm_tdls_sta_deinit(struct iwl_mvm *mvm,
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/* disable the TDLS STA-specific queues */
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sta_msk = mvmsta->tfd_queue_msk;
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for_each_set_bit(i, &sta_msk, sizeof(sta_msk) * BITS_PER_BYTE)
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iwl_mvm_disable_txq(mvm, i, 0);
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iwl_mvm_disable_txq(mvm, i, i, 0, 0);
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}
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int iwl_mvm_add_sta(struct iwl_mvm *mvm,
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@ -472,7 +473,7 @@ void iwl_mvm_sta_drained_wk(struct work_struct *wk)
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unsigned long i, msk = mvm->tfd_drained[sta_id];
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for_each_set_bit(i, &msk, sizeof(msk) * BITS_PER_BYTE)
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iwl_mvm_disable_txq(mvm, i, 0);
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iwl_mvm_disable_txq(mvm, i, i, 0, 0);
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mvm->tfd_drained[sta_id] = 0;
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IWL_DEBUG_TDLS(mvm, "Drained sta %d, with queues %ld\n",
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@ -651,7 +652,7 @@ int iwl_mvm_add_aux_sta(struct iwl_mvm *mvm)
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lockdep_assert_held(&mvm->mutex);
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/* Map Aux queue to fifo - needs to happen before adding Aux station */
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iwl_mvm_enable_ac_txq(mvm, mvm->aux_queue,
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iwl_mvm_enable_ac_txq(mvm, mvm->aux_queue, mvm->aux_queue,
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IWL_MVM_TX_FIFO_MCAST, wdg_timeout);
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/* Allocate aux station and assign to it the aux queue */
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@ -923,6 +924,7 @@ int iwl_mvm_sta_tx_agg_start(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
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struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta);
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struct iwl_mvm_tid_data *tid_data;
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int txq_id;
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int ret;
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if (WARN_ON_ONCE(tid >= IWL_MAX_TID_COUNT))
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return -EINVAL;
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@ -935,17 +937,6 @@ int iwl_mvm_sta_tx_agg_start(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
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lockdep_assert_held(&mvm->mutex);
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for (txq_id = mvm->first_agg_queue;
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txq_id <= mvm->last_agg_queue; txq_id++)
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if (mvm->queue_to_mac80211[txq_id] ==
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IWL_INVALID_MAC80211_QUEUE)
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break;
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if (txq_id > mvm->last_agg_queue) {
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IWL_ERR(mvm, "Failed to allocate agg queue\n");
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return -EIO;
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}
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spin_lock_bh(&mvmsta->lock);
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/* possible race condition - we entered D0i3 while starting agg */
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@ -955,8 +946,18 @@ int iwl_mvm_sta_tx_agg_start(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
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return -EIO;
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}
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/* the new tx queue is still connected to the same mac80211 queue */
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mvm->queue_to_mac80211[txq_id] = vif->hw_queue[tid_to_mac80211_ac[tid]];
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spin_lock_bh(&mvm->queue_info_lock);
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txq_id = iwl_mvm_find_free_queue(mvm, mvm->first_agg_queue,
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mvm->last_agg_queue);
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if (txq_id < 0) {
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ret = txq_id;
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spin_unlock_bh(&mvm->queue_info_lock);
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IWL_ERR(mvm, "Failed to allocate agg queue\n");
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goto release_locks;
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}
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mvm->queue_info[txq_id].setup_reserved = true;
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spin_unlock_bh(&mvm->queue_info_lock);
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tid_data = &mvmsta->tid_data[tid];
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tid_data->ssn = IEEE80211_SEQ_TO_SN(tid_data->seq_number);
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@ -975,9 +976,12 @@ int iwl_mvm_sta_tx_agg_start(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
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tid_data->state = IWL_EMPTYING_HW_QUEUE_ADDBA;
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}
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ret = 0;
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release_locks:
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spin_unlock_bh(&mvmsta->lock);
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return 0;
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return ret;
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}
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int iwl_mvm_sta_tx_agg_oper(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
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@ -1005,13 +1009,19 @@ int iwl_mvm_sta_tx_agg_oper(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
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fifo = iwl_mvm_ac_to_tx_fifo[tid_to_mac80211_ac[tid]];
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iwl_mvm_enable_agg_txq(mvm, queue, fifo, mvmsta->sta_id, tid,
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buf_size, ssn, wdg_timeout);
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iwl_mvm_enable_agg_txq(mvm, queue,
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vif->hw_queue[tid_to_mac80211_ac[tid]], fifo,
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mvmsta->sta_id, tid, buf_size, ssn, wdg_timeout);
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ret = iwl_mvm_sta_tx_agg(mvm, sta, tid, queue, true);
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if (ret)
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return -EIO;
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/* No need to mark as reserved */
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spin_lock_bh(&mvm->queue_info_lock);
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mvm->queue_info[queue].setup_reserved = false;
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spin_unlock_bh(&mvm->queue_info_lock);
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/*
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* Even though in theory the peer could have different
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* aggregation reorder buffer sizes for different sessions,
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@ -1056,6 +1066,11 @@ int iwl_mvm_sta_tx_agg_stop(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
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mvmsta->agg_tids &= ~BIT(tid);
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/* No need to mark as reserved anymore */
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spin_lock_bh(&mvm->queue_info_lock);
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mvm->queue_info[txq_id].setup_reserved = false;
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spin_unlock_bh(&mvm->queue_info_lock);
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switch (tid_data->state) {
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case IWL_AGG_ON:
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tid_data->ssn = IEEE80211_SEQ_TO_SN(tid_data->seq_number);
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@ -1073,14 +1088,15 @@ int iwl_mvm_sta_tx_agg_stop(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
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tid_data->ssn = 0xffff;
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tid_data->state = IWL_AGG_OFF;
|
||||
mvm->queue_to_mac80211[txq_id] = IWL_INVALID_MAC80211_QUEUE;
|
||||
spin_unlock_bh(&mvmsta->lock);
|
||||
|
||||
ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
|
||||
|
||||
iwl_mvm_sta_tx_agg(mvm, sta, tid, txq_id, false);
|
||||
|
||||
iwl_mvm_disable_txq(mvm, txq_id, 0);
|
||||
iwl_mvm_disable_txq(mvm, txq_id,
|
||||
vif->hw_queue[tid_to_mac80211_ac[tid]], tid,
|
||||
0);
|
||||
return 0;
|
||||
case IWL_AGG_STARTING:
|
||||
case IWL_EMPTYING_HW_QUEUE_ADDBA:
|
||||
@ -1091,7 +1107,6 @@ int iwl_mvm_sta_tx_agg_stop(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
|
||||
|
||||
/* No barriers since we are under mutex */
|
||||
lockdep_assert_held(&mvm->mutex);
|
||||
mvm->queue_to_mac80211[txq_id] = IWL_INVALID_MAC80211_QUEUE;
|
||||
|
||||
ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
|
||||
tid_data->state = IWL_AGG_OFF;
|
||||
@ -1132,6 +1147,11 @@ int iwl_mvm_sta_tx_agg_flush(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
|
||||
mvmsta->agg_tids &= ~BIT(tid);
|
||||
spin_unlock_bh(&mvmsta->lock);
|
||||
|
||||
/* No need to mark as reserved */
|
||||
spin_lock_bh(&mvm->queue_info_lock);
|
||||
mvm->queue_info[txq_id].setup_reserved = false;
|
||||
spin_unlock_bh(&mvm->queue_info_lock);
|
||||
|
||||
if (old_state >= IWL_AGG_ON) {
|
||||
iwl_mvm_drain_sta(mvm, mvmsta, true);
|
||||
if (iwl_mvm_flush_tx_path(mvm, BIT(txq_id), true))
|
||||
@ -1142,12 +1162,11 @@ int iwl_mvm_sta_tx_agg_flush(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
|
||||
|
||||
iwl_mvm_sta_tx_agg(mvm, sta, tid, txq_id, false);
|
||||
|
||||
iwl_mvm_disable_txq(mvm, tid_data->txq_id, 0);
|
||||
iwl_mvm_disable_txq(mvm, tid_data->txq_id,
|
||||
vif->hw_queue[tid_to_mac80211_ac[tid]], tid,
|
||||
0);
|
||||
}
|
||||
|
||||
mvm->queue_to_mac80211[tid_data->txq_id] =
|
||||
IWL_INVALID_MAC80211_QUEUE;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
@ -560,15 +560,10 @@ static void iwl_mvm_check_ratid_empty(struct iwl_mvm *mvm,
|
||||
IWL_DEBUG_TX_QUEUES(mvm,
|
||||
"Can continue DELBA flow ssn = next_recl = %d\n",
|
||||
tid_data->next_reclaimed);
|
||||
iwl_mvm_disable_txq(mvm, tid_data->txq_id, CMD_ASYNC);
|
||||
iwl_mvm_disable_txq(mvm, tid_data->txq_id,
|
||||
vif->hw_queue[tid_to_mac80211_ac[tid]], tid,
|
||||
CMD_ASYNC);
|
||||
tid_data->state = IWL_AGG_OFF;
|
||||
/*
|
||||
* we can't hold the mutex - but since we are after a sequence
|
||||
* point (call to iwl_mvm_disable_txq(), so we don't even need
|
||||
* a memory barrier.
|
||||
*/
|
||||
mvm->queue_to_mac80211[tid_data->txq_id] =
|
||||
IWL_INVALID_MAC80211_QUEUE;
|
||||
ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
|
||||
break;
|
||||
|
||||
|
||||
@ -7,6 +7,7 @@
|
||||
*
|
||||
* Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
|
||||
* Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
|
||||
* Copyright (C) 2015 Intel Deutschland GmbH
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of version 2 of the GNU General Public License as
|
||||
@ -657,34 +658,143 @@ void iwl_mvm_dump_nic_error_log(struct iwl_mvm *mvm)
|
||||
if (mvm->support_umac_log)
|
||||
iwl_mvm_dump_umac_error_log(mvm);
|
||||
}
|
||||
void iwl_mvm_enable_txq(struct iwl_mvm *mvm, int queue, u16 ssn,
|
||||
const struct iwl_trans_txq_scd_cfg *cfg,
|
||||
unsigned int wdg_timeout)
|
||||
{
|
||||
struct iwl_scd_txq_cfg_cmd cmd = {
|
||||
.scd_queue = queue,
|
||||
.enable = 1,
|
||||
.window = cfg->frame_limit,
|
||||
.sta_id = cfg->sta_id,
|
||||
.ssn = cpu_to_le16(ssn),
|
||||
.tx_fifo = cfg->fifo,
|
||||
.aggregate = cfg->aggregate,
|
||||
.tid = cfg->tid,
|
||||
};
|
||||
|
||||
iwl_trans_txq_enable_cfg(mvm->trans, queue, ssn, NULL, wdg_timeout);
|
||||
WARN(iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0, sizeof(cmd), &cmd),
|
||||
"Failed to configure queue %d on FIFO %d\n", queue, cfg->fifo);
|
||||
int iwl_mvm_find_free_queue(struct iwl_mvm *mvm, u8 minq, u8 maxq)
|
||||
{
|
||||
int i;
|
||||
|
||||
lockdep_assert_held(&mvm->queue_info_lock);
|
||||
|
||||
for (i = minq; i <= maxq; i++)
|
||||
if (mvm->queue_info[i].hw_queue_refcount == 0 &&
|
||||
!mvm->queue_info[i].setup_reserved)
|
||||
return i;
|
||||
|
||||
return -ENOSPC;
|
||||
}
|
||||
|
||||
void iwl_mvm_disable_txq(struct iwl_mvm *mvm, int queue, u8 flags)
|
||||
void iwl_mvm_enable_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue,
|
||||
u16 ssn, const struct iwl_trans_txq_scd_cfg *cfg,
|
||||
unsigned int wdg_timeout)
|
||||
{
|
||||
bool enable_queue = true;
|
||||
|
||||
spin_lock_bh(&mvm->queue_info_lock);
|
||||
|
||||
/* Make sure this TID isn't already enabled */
|
||||
if (mvm->queue_info[queue].tid_bitmap & BIT(cfg->tid)) {
|
||||
spin_unlock_bh(&mvm->queue_info_lock);
|
||||
IWL_ERR(mvm, "Trying to enable TXQ with existing TID %d\n",
|
||||
cfg->tid);
|
||||
return;
|
||||
}
|
||||
|
||||
/* Update mappings and refcounts */
|
||||
mvm->queue_info[queue].hw_queue_to_mac80211 |= BIT(mac80211_queue);
|
||||
mvm->queue_info[queue].hw_queue_refcount++;
|
||||
if (mvm->queue_info[queue].hw_queue_refcount > 1)
|
||||
enable_queue = false;
|
||||
mvm->queue_info[queue].tid_bitmap |= BIT(cfg->tid);
|
||||
|
||||
IWL_DEBUG_TX_QUEUES(mvm,
|
||||
"Enabling TXQ #%d refcount=%d (mac80211 map:0x%x)\n",
|
||||
queue, mvm->queue_info[queue].hw_queue_refcount,
|
||||
mvm->queue_info[queue].hw_queue_to_mac80211);
|
||||
|
||||
spin_unlock_bh(&mvm->queue_info_lock);
|
||||
|
||||
/* Send the enabling command if we need to */
|
||||
if (enable_queue) {
|
||||
struct iwl_scd_txq_cfg_cmd cmd = {
|
||||
.scd_queue = queue,
|
||||
.enable = 1,
|
||||
.window = cfg->frame_limit,
|
||||
.sta_id = cfg->sta_id,
|
||||
.ssn = cpu_to_le16(ssn),
|
||||
.tx_fifo = cfg->fifo,
|
||||
.aggregate = cfg->aggregate,
|
||||
.tid = cfg->tid,
|
||||
};
|
||||
|
||||
iwl_trans_txq_enable_cfg(mvm->trans, queue, ssn, NULL,
|
||||
wdg_timeout);
|
||||
WARN(iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0, sizeof(cmd),
|
||||
&cmd),
|
||||
"Failed to configure queue %d on FIFO %d\n", queue,
|
||||
cfg->fifo);
|
||||
}
|
||||
}
|
||||
|
||||
void iwl_mvm_disable_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue,
|
||||
u8 tid, u8 flags)
|
||||
{
|
||||
struct iwl_scd_txq_cfg_cmd cmd = {
|
||||
.scd_queue = queue,
|
||||
.enable = 0,
|
||||
};
|
||||
bool remove_mac_queue = true;
|
||||
int ret;
|
||||
|
||||
spin_lock_bh(&mvm->queue_info_lock);
|
||||
|
||||
if (WARN_ON(mvm->queue_info[queue].hw_queue_refcount == 0)) {
|
||||
spin_unlock_bh(&mvm->queue_info_lock);
|
||||
return;
|
||||
}
|
||||
|
||||
mvm->queue_info[queue].tid_bitmap &= ~BIT(tid);
|
||||
|
||||
/*
|
||||
* If there is another TID with the same AC - don't remove the MAC queue
|
||||
* from the mapping
|
||||
*/
|
||||
if (tid < IWL_MAX_TID_COUNT) {
|
||||
unsigned long tid_bitmap =
|
||||
mvm->queue_info[queue].tid_bitmap;
|
||||
int ac = tid_to_mac80211_ac[tid];
|
||||
int i;
|
||||
|
||||
for_each_set_bit(i, &tid_bitmap, IWL_MAX_TID_COUNT) {
|
||||
if (tid_to_mac80211_ac[i] == ac)
|
||||
remove_mac_queue = false;
|
||||
}
|
||||
}
|
||||
|
||||
if (remove_mac_queue)
|
||||
mvm->queue_info[queue].hw_queue_to_mac80211 &=
|
||||
~BIT(mac80211_queue);
|
||||
mvm->queue_info[queue].hw_queue_refcount--;
|
||||
|
||||
cmd.enable = mvm->queue_info[queue].hw_queue_refcount ? 1 : 0;
|
||||
|
||||
IWL_DEBUG_TX_QUEUES(mvm,
|
||||
"Disabling TXQ #%d refcount=%d (mac80211 map:0x%x)\n",
|
||||
queue,
|
||||
mvm->queue_info[queue].hw_queue_refcount,
|
||||
mvm->queue_info[queue].hw_queue_to_mac80211);
|
||||
|
||||
/* If the queue is still enabled - nothing left to do in this func */
|
||||
if (cmd.enable) {
|
||||
spin_unlock_bh(&mvm->queue_info_lock);
|
||||
return;
|
||||
}
|
||||
|
||||
/* Make sure queue info is correct even though we overwrite it */
|
||||
WARN(mvm->queue_info[queue].hw_queue_refcount ||
|
||||
mvm->queue_info[queue].tid_bitmap ||
|
||||
mvm->queue_info[queue].hw_queue_to_mac80211,
|
||||
"TXQ #%d info out-of-sync - refcount=%d, mac map=0x%x, tid=0x%x\n",
|
||||
queue, mvm->queue_info[queue].hw_queue_refcount,
|
||||
mvm->queue_info[queue].hw_queue_to_mac80211,
|
||||
mvm->queue_info[queue].tid_bitmap);
|
||||
|
||||
/* If we are here - the queue is freed and we can zero out these vals */
|
||||
mvm->queue_info[queue].hw_queue_refcount = 0;
|
||||
mvm->queue_info[queue].tid_bitmap = 0;
|
||||
mvm->queue_info[queue].hw_queue_to_mac80211 = 0;
|
||||
|
||||
spin_unlock_bh(&mvm->queue_info_lock);
|
||||
|
||||
iwl_trans_txq_disable(mvm->trans, queue, false);
|
||||
ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, flags,
|
||||
sizeof(cmd), &cmd);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user