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KVM: Don't automatically expose the TSC deadline timer in cpuid
Unlike all of the other cpuid bits, the TSC deadline timer bit is set unconditionally, regardless of what userspace wants. This is broken in several ways: - if userspace doesn't use KVM_CREATE_IRQCHIP, and doesn't emulate the TSC deadline timer feature, a guest that uses the feature will break - live migration to older host kernels that don't support the TSC deadline timer will cause the feature to be pulled from under the guest's feet; breaking it - guests that are broken wrt the feature will fail. Fix by not enabling the feature automatically; instead report it to userspace. Because the feature depends on KVM_CREATE_IRQCHIP, which we cannot guarantee will be called, we expose it via a KVM_CAP_TSC_DEADLINE_TIMER and not KVM_GET_SUPPORTED_CPUID. Fixes the Illumos guest kernel, which uses the TSC deadline timer feature. [avi: add the KVM_CAP + documentation] Reported-by: Alexey Zaytsev <alexey.zaytsev@gmail.com> Tested-by: Alexey Zaytsev <alexey.zaytsev@gmail.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Avi Kivity <avi@redhat.com>
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@ -1100,6 +1100,15 @@ emulate them efficiently. The fields in each entry are defined as follows:
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eax, ebx, ecx, edx: the values returned by the cpuid instruction for
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this function/index combination
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The TSC deadline timer feature (CPUID leaf 1, ecx[24]) is always returned
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as false, since the feature depends on KVM_CREATE_IRQCHIP for local APIC
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support. Instead it is reported via
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ioctl(KVM_CHECK_EXTENSION, KVM_CAP_TSC_DEADLINE_TIMER)
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if that returns true and you use KVM_CREATE_IRQCHIP, or if you emulate the
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feature in userspace, then you can enable the feature for KVM_SET_CPUID2.
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4.47 KVM_PPC_GET_PVINFO
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Capability: KVM_CAP_PPC_GET_PVINFO
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@ -602,7 +602,6 @@ static void update_cpuid(struct kvm_vcpu *vcpu)
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{
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struct kvm_cpuid_entry2 *best;
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struct kvm_lapic *apic = vcpu->arch.apic;
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u32 timer_mode_mask;
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best = kvm_find_cpuid_entry(vcpu, 1, 0);
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if (!best)
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@ -615,15 +614,12 @@ static void update_cpuid(struct kvm_vcpu *vcpu)
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best->ecx |= bit(X86_FEATURE_OSXSAVE);
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}
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if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
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best->function == 0x1) {
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best->ecx |= bit(X86_FEATURE_TSC_DEADLINE_TIMER);
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timer_mode_mask = 3 << 17;
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} else
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timer_mode_mask = 1 << 17;
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if (apic)
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apic->lapic_timer.timer_mode_mask = timer_mode_mask;
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if (apic) {
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if (best->ecx & bit(X86_FEATURE_TSC_DEADLINE_TIMER))
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apic->lapic_timer.timer_mode_mask = 3 << 17;
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else
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apic->lapic_timer.timer_mode_mask = 1 << 17;
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}
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}
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int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
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@ -2135,6 +2131,9 @@ int kvm_dev_ioctl_check_extension(long ext)
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case KVM_CAP_TSC_CONTROL:
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r = kvm_has_tsc_control;
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break;
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case KVM_CAP_TSC_DEADLINE_TIMER:
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r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
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break;
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default:
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r = 0;
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break;
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@ -557,6 +557,7 @@ struct kvm_ppc_pvinfo {
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#define KVM_CAP_MAX_VCPUS 66 /* returns max vcpus per vm */
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#define KVM_CAP_PPC_PAPR 68
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#define KVM_CAP_S390_GMAP 71
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#define KVM_CAP_TSC_DEADLINE_TIMER 72
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#ifdef KVM_CAP_IRQ_ROUTING
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