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synced 2025-01-22 05:44:31 +08:00
usb: musb: tusb6010_omap: Allocate DMA channels upfront
Instead of requesting the DMA channel in tusb_omap_dma_allocate() do it when the controller is created and in runtime work from the DMA channel pool. This change is needed for the DMAengine conversion of the driver since the tusb_omap_dma_allocate() is called in interrupt context which might lead to lock within the DMAengine API when requesting channel. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Bin Liu <b-liu@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -45,7 +45,7 @@ struct tusb_omap_dma_ch {
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u8 tx;
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struct musb_hw_ep *hw_ep;
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struct tusb_dma_data dma_data;
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struct tusb_dma_data *dma_data;
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struct tusb_omap_dma *tusb_dma;
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@ -62,7 +62,7 @@ struct tusb_omap_dma {
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struct dma_controller controller;
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void __iomem *tbase;
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struct tusb_dma_data dma_data;
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struct tusb_dma_data dma_pool[MAX_DMAREQ];
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unsigned multichannel:1;
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};
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@ -120,10 +120,7 @@ static void tusb_omap_dma_cb(int lch, u16 ch_status, void *data)
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spin_lock_irqsave(&musb->lock, flags);
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if (tusb_dma->multichannel)
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ch = chdat->dma_data.ch;
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else
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ch = tusb_dma->dma_data.ch;
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ch = chdat->dma_data->ch;
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if (ch_status != OMAP_DMA_BLOCK_IRQ)
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printk(KERN_ERR "TUSB DMA error status: %i\n", ch_status);
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@ -248,7 +245,8 @@ static int tusb_omap_dma_program(struct dma_channel *channel, u16 packet_sz,
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dma_remaining = TUSB_EP_CONFIG_XFR_SIZE(dma_remaining);
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if (dma_remaining) {
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dev_dbg(musb->controller, "Busy %s dma ch%i, not using: %08x\n",
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chdat->tx ? "tx" : "rx", chdat->dma_data.ch,
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chdat->tx ? "tx" : "rx",
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chdat->dma_data ? chdat->dma_data->ch : -1,
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dma_remaining);
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return false;
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}
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@ -260,11 +258,8 @@ static int tusb_omap_dma_program(struct dma_channel *channel, u16 packet_sz,
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else
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chdat->transfer_packet_sz = packet_sz;
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if (tusb_dma->multichannel) {
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dma_data = &chdat->dma_data;
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} else {
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dma_data = &tusb_dma->dma_data;
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dma_data = chdat->dma_data;
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if (!tusb_dma->multichannel) {
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if (tusb_omap_use_shared_dmareq(chdat) != 0) {
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dev_dbg(musb->controller, "could not get dma for ep%i\n", chdat->epnum);
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return false;
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@ -276,10 +271,10 @@ static int tusb_omap_dma_program(struct dma_channel *channel, u16 packet_sz,
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WARN_ON(1);
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return false;
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}
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omap_set_dma_callback(dma_data->ch, tusb_omap_dma_cb, channel);
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}
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omap_set_dma_callback(dma_data->ch, tusb_omap_dma_cb, channel);
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chdat->packet_sz = packet_sz;
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chdat->len = len;
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channel->actual_len = 0;
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@ -410,19 +405,9 @@ static int tusb_omap_dma_program(struct dma_channel *channel, u16 packet_sz,
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static int tusb_omap_dma_abort(struct dma_channel *channel)
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{
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struct tusb_omap_dma_ch *chdat = to_chdat(channel);
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struct tusb_omap_dma *tusb_dma = chdat->tusb_dma;
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struct tusb_dma_data *dma_data = &tusb_dma->dma_data;
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if (!tusb_dma->multichannel) {
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if (dma_data->ch >= 0) {
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omap_stop_dma(dma_data->ch);
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omap_free_dma(dma_data->ch);
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dma_data->ch = -1;
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}
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dma_data->dmareq = -1;
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dma_data->sync_dev = -1;
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}
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if (chdat->dma_data)
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omap_stop_dma(chdat->dma_data->ch);
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channel->status = MUSB_DMA_STATUS_FREE;
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@ -434,15 +419,6 @@ static inline int tusb_omap_dma_allocate_dmareq(struct tusb_omap_dma_ch *chdat)
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u32 reg = musb_readl(chdat->tbase, TUSB_DMA_EP_MAP);
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int i, dmareq_nr = -1;
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const int sync_dev[6] = {
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OMAP24XX_DMA_EXT_DMAREQ0,
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OMAP24XX_DMA_EXT_DMAREQ1,
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OMAP242X_DMA_EXT_DMAREQ2,
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OMAP242X_DMA_EXT_DMAREQ3,
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OMAP242X_DMA_EXT_DMAREQ4,
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OMAP242X_DMA_EXT_DMAREQ5,
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};
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for (i = 0; i < MAX_DMAREQ; i++) {
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int cur = (reg & (0xf << (i * 5))) >> (i * 5);
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if (cur == 0) {
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@ -459,8 +435,7 @@ static inline int tusb_omap_dma_allocate_dmareq(struct tusb_omap_dma_ch *chdat)
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reg |= ((1 << 4) << (dmareq_nr * 5));
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musb_writel(chdat->tbase, TUSB_DMA_EP_MAP, reg);
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chdat->dma_data.dmareq = dmareq_nr;
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chdat->dma_data.sync_dev = sync_dev[chdat->dma_data.dmareq];
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chdat->dma_data = &chdat->tusb_dma->dma_pool[dmareq_nr];
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return 0;
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}
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@ -469,15 +444,14 @@ static inline void tusb_omap_dma_free_dmareq(struct tusb_omap_dma_ch *chdat)
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{
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u32 reg;
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if (!chdat || chdat->dma_data.dmareq < 0)
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if (!chdat || !chdat->dma_data || chdat->dma_data->dmareq < 0)
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return;
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reg = musb_readl(chdat->tbase, TUSB_DMA_EP_MAP);
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reg &= ~(0x1f << (chdat->dma_data.dmareq * 5));
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reg &= ~(0x1f << (chdat->dma_data->dmareq * 5));
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musb_writel(chdat->tbase, TUSB_DMA_EP_MAP, reg);
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chdat->dma_data.dmareq = -1;
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chdat->dma_data.sync_dev = -1;
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chdat->dma_data = NULL;
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}
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static struct dma_channel *dma_channel_pool[MAX_DMAREQ];
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@ -488,8 +462,6 @@ tusb_omap_dma_allocate(struct dma_controller *c,
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u8 tx)
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{
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int ret, i;
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const char *dev_name;
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void *cb_data;
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struct tusb_omap_dma *tusb_dma;
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struct musb *musb;
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void __iomem *tbase;
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@ -543,46 +515,22 @@ tusb_omap_dma_allocate(struct dma_controller *c,
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channel->desired_mode = 0;
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channel->actual_len = 0;
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if (tusb_dma->multichannel) {
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dma_data = &chdat->dma_data;
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ret = tusb_omap_dma_allocate_dmareq(chdat);
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if (ret != 0)
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goto free_dmareq;
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if (chdat->tx)
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dev_name = "TUSB transmit";
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else
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dev_name = "TUSB receive";
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cb_data = channel;
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} else if (tusb_dma->dma_data.ch == -1) {
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dma_data = &tusb_dma->dma_data;
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dma_data->dmareq = 0;
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dma_data->sync_dev = OMAP24XX_DMA_EXT_DMAREQ0;
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dev_name = "TUSB shared";
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/* Callback data gets set later in the shared dmareq case */
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cb_data = NULL;
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chdat->dma_data.dmareq = -1;
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chdat->dma_data.ch = -1;
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chdat->dma_data.sync_dev = -1;
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if (!chdat->dma_data) {
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if (tusb_dma->multichannel) {
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ret = tusb_omap_dma_allocate_dmareq(chdat);
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if (ret != 0)
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goto free_dmareq;
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} else {
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chdat->dma_data = &tusb_dma->dma_pool[0];
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}
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}
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if (dma_data) {
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ret = omap_request_dma(dma_data->sync_dev, dev_name,
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tusb_omap_dma_cb, cb_data,
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&dma_data->ch);
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if (ret != 0)
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goto free_dmareq;
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} else {
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/* Already allocated shared, single DMA channel. */
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dma_data = &tusb_dma->dma_data;
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}
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dma_data = chdat->dma_data;
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dev_dbg(musb->controller, "ep%i %s dma: %s dma%i dmareq%i sync%i\n",
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chdat->epnum,
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chdat->tx ? "tx" : "rx",
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chdat->dma_data.ch >= 0 ? "dedicated" : "shared",
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tusb_dma->multichannel ? "shared" : "dedicated",
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dma_data->ch, dma_data->dmareq, dma_data->sync_dev);
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return channel;
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@ -604,7 +552,7 @@ static void tusb_omap_dma_release(struct dma_channel *channel)
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u32 reg;
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dev_dbg(musb->controller, "ep%i ch%i\n", chdat->epnum,
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chdat->dma_data.ch);
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chdat->dma_data->ch);
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reg = musb_readl(tbase, TUSB_DMA_INT_MASK);
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if (chdat->tx)
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@ -622,14 +570,8 @@ static void tusb_omap_dma_release(struct dma_channel *channel)
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channel->status = MUSB_DMA_STATUS_UNKNOWN;
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if (chdat->dma_data.ch >= 0) {
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omap_stop_dma(chdat->dma_data.ch);
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omap_free_dma(chdat->dma_data.ch);
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chdat->dma_data.ch = -1;
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}
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if (chdat->dma_data.dmareq >= 0)
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tusb_omap_dma_free_dmareq(chdat);
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omap_stop_dma(chdat->dma_data->ch);
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tusb_omap_dma_free_dmareq(chdat);
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channel = NULL;
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}
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@ -646,15 +588,73 @@ void tusb_dma_controller_destroy(struct dma_controller *c)
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kfree(ch->private_data);
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kfree(ch);
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}
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}
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if (tusb_dma && !tusb_dma->multichannel && tusb_dma->dma_data.ch >= 0)
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omap_free_dma(tusb_dma->dma_data.ch);
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/* Free up the DMA channels */
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if (tusb_dma && tusb_dma->dma_pool[i].ch >= 0)
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omap_free_dma(tusb_dma->dma_pool[i].ch);
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}
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kfree(tusb_dma);
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}
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EXPORT_SYMBOL_GPL(tusb_dma_controller_destroy);
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static int tusb_omap_allocate_dma_pool(struct tusb_omap_dma *tusb_dma)
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{
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int i;
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int ret = 0;
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const int sync_dev[6] = {
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OMAP24XX_DMA_EXT_DMAREQ0,
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OMAP24XX_DMA_EXT_DMAREQ1,
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OMAP242X_DMA_EXT_DMAREQ2,
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OMAP242X_DMA_EXT_DMAREQ3,
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OMAP242X_DMA_EXT_DMAREQ4,
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OMAP242X_DMA_EXT_DMAREQ5,
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};
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for (i = 0; i < MAX_DMAREQ; i++) {
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struct tusb_dma_data *dma_data = &tusb_dma->dma_pool[i];
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/*
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* Request DMA channels:
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* - one channel in case of non multichannel mode
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* - MAX_DMAREQ number of channels in multichannel mode
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*/
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if (i == 0 || tusb_dma->multichannel) {
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char ch_name[8];
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sprintf(ch_name, "dmareq%d", i);
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dma_data->sync_dev = sync_dev[i];
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dma_data->ch = -1;
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/* callback data is ngoing to be set later */
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ret = omap_request_dma(dma_data->sync_dev, ch_name,
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tusb_omap_dma_cb, NULL, &dma_data->ch);
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if (ret != 0) {
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dev_err(tusb_dma->controller.musb->controller,
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"Failed to request %s\n", ch_name);
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goto dma_error;
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}
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dma_data->dmareq = i;
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} else {
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dma_data->dmareq = -1;
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dma_data->sync_dev = -1;
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dma_data->ch = -1;
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}
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}
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return 0;
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dma_error:
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for (; i >= 0; i--) {
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struct tusb_dma_data *dma_data = &tusb_dma->dma_pool[i];
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if (dma_data->ch >= 0)
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omap_free_dma(dma_data->ch);
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}
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return ret;
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}
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struct dma_controller *
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tusb_dma_controller_create(struct musb *musb, void __iomem *base)
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{
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@ -679,10 +679,6 @@ tusb_dma_controller_create(struct musb *musb, void __iomem *base)
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tusb_dma->controller.musb = musb;
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tusb_dma->tbase = musb->ctrl_base;
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tusb_dma->dma_data.ch = -1;
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tusb_dma->dma_data.dmareq = -1;
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tusb_dma->dma_data.sync_dev = -1;
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tusb_dma->controller.channel_alloc = tusb_omap_dma_allocate;
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tusb_dma->controller.channel_release = tusb_omap_dma_release;
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tusb_dma->controller.channel_program = tusb_omap_dma_program;
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@ -709,6 +705,9 @@ tusb_dma_controller_create(struct musb *musb, void __iomem *base)
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ch->private_data = chdat;
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}
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if (tusb_omap_allocate_dma_pool(tusb_dma))
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goto cleanup;
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return &tusb_dma->controller;
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cleanup:
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