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ARM: dts: add SMSC ethernet on the APQ8060 Dragonboard
The SMSC9112 ethernet controller is connected to chip select 2 on the EBI2 bus on the APQ8060 Dragonboard. We set this up by activating EBI2, creating a chipselect entry as a subnode, and then putting the ethernet controller in a subnode of the chipselect. After the chipselect is configured, the SMSC device will be instantiated. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
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@ -51,6 +51,29 @@
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regulator-boot-on;
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};
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/* GPIO controlled ethernet power regulator */
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dragon_veth: xc622a331mrg {
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compatible = "regulator-fixed";
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regulator-name = "XC6222A331MR-G";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vph>;
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gpio = <&pm8058_gpio 40 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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pinctrl-names = "default";
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pinctrl-0 = <&dragon_veth_gpios>;
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regulator-always-on;
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};
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/* VDDvario fixed regulator */
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dragon_vario: nds332p {
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compatible = "regulator-fixed";
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regulator-name = "NDS332P";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <&pm8058_s3>;
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};
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/* This is a levelshifter for SDCC5 */
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dragon_vio_txb: txb0104rgyr {
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compatible = "regulator-fixed";
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@ -167,6 +190,36 @@
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bias-pull-up;
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};
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};
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dragon_ebi2_pins: ebi2 {
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/*
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* Pins used by EBI2 on the Dragonboard, actually only
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* CS2 is used by a real peripheral. CS0 is just
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* routed to a test point.
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*/
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mux0 {
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pins =
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/* "gpio39", CS1A_N this is not good to mux */
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"gpio40", /* CS2A_N */
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"gpio134"; /* CS0_N testpoint TP29 */
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function = "ebi2cs";
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};
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mux1 {
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pins =
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/* EBI2_ADDR_7 downto EBI2_ADDR_0 address bus */
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"gpio123", "gpio124", "gpio125", "gpio126",
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"gpio127", "gpio128", "gpio129", "gpio130",
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/* EBI2_DATA_15 downto EBI2_DATA_0 data bus */
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"gpio135", "gpio136", "gpio137", "gpio138",
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"gpio139", "gpio140", "gpio141", "gpio142",
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"gpio143", "gpio144", "gpio145", "gpio146",
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"gpio147", "gpio148", "gpio149", "gpio150",
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"gpio151", /* EBI2_OE_N */
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"gpio153", /* EBI2_ADV */
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"gpio157"; /* EBI2_WE_N */
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function = "ebi2";
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};
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};
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};
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qcom,ssbi@500000 {
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@ -201,6 +254,15 @@
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};
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gpio@150 {
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dragon_ethernet_gpios: ethernet-gpios {
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pinconf {
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pins = "gpio7";
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function = "normal";
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input-enable;
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bias-disable;
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power-source = <PM8058_GPIO_S3>;
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};
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};
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dragon_bmp085_gpios: bmp085-gpios {
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pinconf {
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pins = "gpio16";
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@ -238,6 +300,14 @@
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power-source = <PM8058_GPIO_S3>;
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};
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};
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dragon_veth_gpios: veth-gpios {
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pinconf {
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pins = "gpio40";
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function = "normal";
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bias-disable;
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drive-push-pull;
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};
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};
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};
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led@48 {
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@ -322,6 +392,55 @@
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};
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};
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external-bus@1a100000 {
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/* The EBI2 will instantiate first, then populate its children */
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status = "ok";
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pinctrl-names = "default";
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pinctrl-0 = <&dragon_ebi2_pins>;
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/*
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* An on-board SMSC LAN9221 chip for "debug ethernet",
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* which is actually just an ordinary ethernet on the
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* EBI2. This has a 25MHz chrystal next to it, so no
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* clocking is needed.
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*/
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ethernet-ebi2@2,0 {
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compatible = "smsc,lan9221", "smsc,lan9115";
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reg = <2 0x0 0x100>;
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/*
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* GPIO7 has interrupt 198 on the PM8058
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* The second interrupt is the PME interrupt
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* for network wakeup, connected to the TLMM.
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*/
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interrupts-extended = <&pmicintc 198 IRQ_TYPE_EDGE_FALLING>,
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<&tlmm 29 IRQ_TYPE_EDGE_RISING>;
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reset-gpios = <&tlmm 30 GPIO_ACTIVE_LOW>;
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vdd33a-supply = <&dragon_veth>;
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vddvario-supply = <&dragon_vario>;
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pinctrl-names = "default";
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pinctrl-0 = <&dragon_ethernet_gpios>;
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phy-mode = "mii";
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reg-io-width = <2>;
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smsc,force-external-phy;
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/* IRQ on edge falling = active low */
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smsc,irq-active-low;
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smsc,irq-push-pull;
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/*
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* SLOW chipselect config
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* Delay 9 cycles (140ns@64MHz) between SMSC
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* LAN9221 Ethernet controller reads and writes
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* on CS2.
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*/
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qcom,xmem-recovery-cycles = <0>;
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qcom,xmem-write-hold-cycles = <3>;
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qcom,xmem-write-delta-cycles = <31>;
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qcom,xmem-read-delta-cycles = <28>;
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qcom,xmem-write-wait-cycles = <9>;
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qcom,xmem-read-wait-cycles = <9>;
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};
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};
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rpm@104000 {
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/*
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* Set up of the PMIC RPM regulators for this board
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