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iio:proximity:sx9324: Add SX9324 support
Semtech SAR sensor SX9324 is an evolution of the SX9310: It has 4 phases that can be configured to capture and process data from any of 3 CS pins and provide independent detection: proximity, table proximity or body proximity. Gather antenna data: echo sx9324-dev3 > trigger/current_trigger echo 1 > scan_elements/in_proximity0_en echo 1 > buffer/enable od -v -An --endian=big -t d2 -w2 /dev/iio\:device3 (at 10Hz, the default). Trigger events: Setting: thresh_falling_period: 2 (events) thresh_rising_period: 2 (events) in_proximity0_thresh_either_value: 300 in_proximity0_thresh_either_hysteresis: 72 using iio_event_monitor /dev/iio\:deviceX, approaching my hand to the antenna pad, I see: ... Event: time: 1634763907532035297, type: proximity, channel: 0, evtype: thresh, direction: falling Event: time: 1634763910138104640, type: proximity, channel: 0, evtype: thresh, direction: rising ... Datasheet: https://edit.wpgdadawant.com/uploads/news_file/program/2019/30184/tech_files/program_30184_suggest_other_file.pdf Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20220101203817.290512-4-gwendal@chromium.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This commit is contained in:
Gwendal Grignou
Jonathan Cameron
parent
caa8ce7f61
commit
4c18a890df
28
Documentation/ABI/testing/sysfs-bus-iio-sx9324
Normal file
28
Documentation/ABI/testing/sysfs-bus-iio-sx9324
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@ -0,0 +1,28 @@
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What: /sys/bus/iio/devices/iio:deviceX/in_proximity<id>_setup
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Date: November 2021
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KernelVersion: 5.17
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Contact: Gwendal Grignou <gwendal@chromium.org>
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Description:
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SX9324 has 3 inputs, CS0, CS1 and CS2. Hardware layout
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defines if the input is
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+ not connected (HZ),
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+ grounded (GD),
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+ connected to an antenna where it can act as a base
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(DS - data shield), or measured input (MI).
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The sensor rotates measurement across 4 phases
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(PH0, PH1, PH2, PH3), where the inputs are configured
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and then measured.
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By default, during the first phase, [PH0], CS0 is measured,
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while CS1 and CS2 are used as shields.
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`cat in_proximity0_setup` returns "MI,DS,DS".
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[PH1], CS1 is measured, CS0 and CS2 are shield:
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`cat in_proximity1_setup` returns "DS,MI,DS".
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[PH2], CS2 is measured, CS0 and CS1 are shield:
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`cat in_proximity1_setup` returns "DS,DS,MI".
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[PH3], CS1 and CS2 are measured (combo mode):
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`cat in_proximity1_setup` returns "DS,MI,MI".
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Note, these are the chip default. Hardware layout will most
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likely dictate different output. The entry is read-only.
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@ -131,6 +131,20 @@ config SX9310
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To compile this driver as a module, choose M here: the
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module will be called sx9310.
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config SX9324
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tristate "SX9324 Semtech proximity sensor"
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select IIO_BUFFER
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select IIO_TRIGGERED_BUFFER
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select REGMAP_I2C
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select SX_COMMON
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depends on I2C
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help
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Say Y here to build a driver for Semtech's SX9324
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proximity/button sensor.
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To compile this driver as a module, choose M here: the
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module will be called sx9324.
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config SX9500
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tristate "SX9500 Semtech proximity sensor"
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select IIO_BUFFER
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@ -14,6 +14,7 @@ obj-$(CONFIG_RFD77402) += rfd77402.o
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obj-$(CONFIG_SRF04) += srf04.o
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obj-$(CONFIG_SRF08) += srf08.o
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obj-$(CONFIG_SX9310) += sx9310.o
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obj-$(CONFIG_SX9324) += sx9324.o
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obj-$(CONFIG_SX_COMMON) += sx_common.o
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obj-$(CONFIG_SX9500) += sx9500.o
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obj-$(CONFIG_VCNL3020) += vcnl3020.o
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904
drivers/iio/proximity/sx9324.c
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904
drivers/iio/proximity/sx9324.c
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@ -0,0 +1,904 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright 2021 Google LLC.
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*
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* Driver for Semtech's SX9324 capacitive proximity/button solution.
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* Based on SX9324 driver and copy of datasheet at:
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* https://edit.wpgdadawant.com/uploads/news_file/program/2019/30184/tech_files/program_30184_suggest_other_file.pdf
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*/
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#include <linux/acpi.h>
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#include <linux/bits.h>
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#include <linux/bitfield.h>
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#include <linux/delay.h>
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#include <linux/i2c.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/log2.h>
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#include <linux/mod_devicetable.h>
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#include <linux/module.h>
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#include <linux/pm.h>
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#include <linux/property.h>
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#include <linux/regmap.h>
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#include <linux/iio/iio.h>
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#include "sx_common.h"
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/* Register definitions. */
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#define SX9324_REG_IRQ_SRC SX_COMMON_REG_IRQ_SRC
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#define SX9324_REG_STAT0 0x01
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#define SX9324_REG_STAT1 0x02
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#define SX9324_REG_STAT2 0x03
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#define SX9324_REG_STAT2_COMPSTAT_MASK GENMASK(3, 0)
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#define SX9324_REG_STAT3 0x04
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#define SX9324_REG_IRQ_MSK 0x05
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#define SX9324_CONVDONE_IRQ BIT(3)
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#define SX9324_FAR_IRQ BIT(5)
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#define SX9324_CLOSE_IRQ BIT(6)
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#define SX9324_REG_IRQ_CFG0 0x06
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#define SX9324_REG_IRQ_CFG1 0x07
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#define SX9324_REG_IRQ_CFG1_FAILCOND 0x80
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#define SX9324_REG_IRQ_CFG2 0x08
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#define SX9324_REG_GNRL_CTRL0 0x10
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#define SX9324_REG_GNRL_CTRL0_SCANPERIOD_MASK GENMASK(4, 0)
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#define SX9324_REG_GNRL_CTRL0_SCANPERIOD_100MS 0x16
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#define SX9324_REG_GNRL_CTRL1 0x11
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#define SX9324_REG_GNRL_CTRL1_PHEN_MASK GENMASK(3, 0)
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#define SX9324_REG_GNRL_CTRL1_PAUSECTRL 0x20
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#define SX9324_REG_I2C_ADDR 0x14
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#define SX9324_REG_CLK_SPRD 0x15
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#define SX9324_REG_AFE_CTRL0 0x20
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#define SX9324_REG_AFE_CTRL1 0x21
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#define SX9324_REG_AFE_CTRL2 0x22
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#define SX9324_REG_AFE_CTRL3 0x23
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#define SX9324_REG_AFE_CTRL4 0x24
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#define SX9324_REG_AFE_CTRL4_FREQ_83_33HZ 0x40
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#define SX9324_REG_AFE_CTRL4_RESOLUTION_MASK GENMASK(2, 0)
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#define SX9324_REG_AFE_CTRL4_RES_100 0x04
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#define SX9324_REG_AFE_CTRL5 0x25
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#define SX9324_REG_AFE_CTRL6 0x26
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#define SX9324_REG_AFE_CTRL7 0x27
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#define SX9324_REG_AFE_PH0 0x28
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#define SX9324_REG_AFE_PH0_PIN_MASK(_pin) \
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GENMASK(2 * (_pin) + 1, 2 * (_pin))
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#define SX9324_REG_AFE_PH1 0x29
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#define SX9324_REG_AFE_PH2 0x2a
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#define SX9324_REG_AFE_PH3 0x2b
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#define SX9324_REG_AFE_CTRL8 0x2c
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#define SX9324_REG_AFE_CTRL8_RESFILTN_4KOHM 0x02
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#define SX9324_REG_AFE_CTRL9 0x2d
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#define SX9324_REG_AFE_CTRL9_AGAIN_1 0x08
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#define SX9324_REG_PROX_CTRL0 0x30
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#define SX9324_REG_PROX_CTRL0_GAIN_MASK GENMASK(5, 3)
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#define SX9324_REG_PROX_CTRL0_GAIN_1 0x80
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#define SX9324_REG_PROX_CTRL0_RAWFILT_1P50 0x01
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#define SX9324_REG_PROX_CTRL1 0x31
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#define SX9324_REG_PROX_CTRL2 0x32
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#define SX9324_REG_PROX_CTRL2_AVGNEG_THRESH_16K 0x20
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#define SX9324_REG_PROX_CTRL3 0x33
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#define SX9324_REG_PROX_CTRL3_AVGDEB_2SAMPLES 0x40
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#define SX9324_REG_PROX_CTRL3_AVGPOS_THRESH_16K 0x20
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#define SX9324_REG_PROX_CTRL4 0x34
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#define SX9324_REG_PROX_CTRL4_AVGNEGFILT_MASK GENMASK(5, 3)
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#define SX9324_REG_PROX_CTRL4_AVGNEG_FILT_2 0x08
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#define SX9324_REG_PROX_CTRL4_AVGPOSFILT_MASK GENMASK(2, 0)
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#define SX9324_REG_PROX_CTRL3_AVGPOS_FILT_256 0x04
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#define SX9324_REG_PROX_CTRL5 0x35
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#define SX9324_REG_PROX_CTRL5_HYST_MASK GENMASK(5, 4)
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#define SX9324_REG_PROX_CTRL5_CLOSE_DEBOUNCE_MASK GENMASK(3, 2)
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#define SX9324_REG_PROX_CTRL5_FAR_DEBOUNCE_MASK GENMASK(1, 0)
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#define SX9324_REG_PROX_CTRL6 0x36
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#define SX9324_REG_PROX_CTRL6_PROXTHRESH_32 0x08
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#define SX9324_REG_PROX_CTRL7 0x37
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#define SX9324_REG_ADV_CTRL0 0x40
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#define SX9324_REG_ADV_CTRL1 0x41
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#define SX9324_REG_ADV_CTRL2 0x42
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#define SX9324_REG_ADV_CTRL3 0x43
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#define SX9324_REG_ADV_CTRL4 0x44
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#define SX9324_REG_ADV_CTRL5 0x45
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#define SX9324_REG_ADV_CTRL5_STARTUPSENS_MASK GENMASK(3, 2)
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#define SX9324_REG_ADV_CTRL5_STARTUP_SENSOR_1 0x04
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#define SX9324_REG_ADV_CTRL5_STARTUP_METHOD_1 0x01
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#define SX9324_REG_ADV_CTRL6 0x46
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#define SX9324_REG_ADV_CTRL7 0x47
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#define SX9324_REG_ADV_CTRL8 0x48
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#define SX9324_REG_ADV_CTRL9 0x49
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#define SX9324_REG_ADV_CTRL10 0x4a
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#define SX9324_REG_ADV_CTRL11 0x4b
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#define SX9324_REG_ADV_CTRL12 0x4c
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#define SX9324_REG_ADV_CTRL13 0x4d
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#define SX9324_REG_ADV_CTRL14 0x4e
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#define SX9324_REG_ADV_CTRL15 0x4f
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#define SX9324_REG_ADV_CTRL16 0x50
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#define SX9324_REG_ADV_CTRL17 0x51
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#define SX9324_REG_ADV_CTRL18 0x52
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#define SX9324_REG_ADV_CTRL19 0x53
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#define SX9324_REG_ADV_CTRL20 0x54
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#define SX9324_REG_ADV_CTRL19_HIGHT_FAILURE_THRESH_SATURATION 0xf0
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#define SX9324_REG_PHASE_SEL 0x60
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#define SX9324_REG_USEFUL_MSB 0x61
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#define SX9324_REG_USEFUL_LSB 0x62
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#define SX9324_REG_AVG_MSB 0x63
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#define SX9324_REG_AVG_LSB 0x64
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#define SX9324_REG_DIFF_MSB 0x65
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#define SX9324_REG_DIFF_LSB 0x66
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#define SX9324_REG_OFFSET_MSB 0x67
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#define SX9324_REG_OFFSET_LSB 0x68
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#define SX9324_REG_SAR_MSB 0x69
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#define SX9324_REG_SAR_LSB 0x6a
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#define SX9324_REG_RESET 0x9f
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/* Write this to REG_RESET to do a soft reset. */
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#define SX9324_SOFT_RESET 0xde
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#define SX9324_REG_WHOAMI 0xfa
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#define SX9324_WHOAMI_VALUE 0x23
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#define SX9324_REG_REVISION 0xfe
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/* 4 channels, as defined in STAT0: PH0, PH1, PH2 and PH3. */
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#define SX9324_NUM_CHANNELS 4
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/* 3 CS pins: CS0, CS1, CS2. */
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#define SX9324_NUM_PINS 3
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static const char * const sx9324_cs_pin_usage[] = { "HZ", "MI", "DS", "GD" };
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static ssize_t sx9324_phase_configuration_show(struct iio_dev *indio_dev,
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uintptr_t private,
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const struct iio_chan_spec *chan,
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char *buf)
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{
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struct sx_common_data *data = iio_priv(indio_dev);
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unsigned int val;
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int i, ret, pin_idx;
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size_t len = 0;
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ret = regmap_read(data->regmap, SX9324_REG_AFE_PH0 + chan->channel, &val);
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if (ret < 0)
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return ret;
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for (i = 0; i < SX9324_NUM_PINS; i++) {
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pin_idx = (val & SX9324_REG_AFE_PH0_PIN_MASK(i)) >> (2 * i);
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len += sysfs_emit_at(buf, len, "%s,",
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sx9324_cs_pin_usage[pin_idx]);
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}
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buf[len - 1] = '\n';
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return len;
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}
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static const struct iio_chan_spec_ext_info sx9324_channel_ext_info[] = {
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{
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.name = "setup",
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.shared = IIO_SEPARATE,
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.read = sx9324_phase_configuration_show,
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},
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{}
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};
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#define SX9324_CHANNEL(idx) \
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{ \
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.type = IIO_PROXIMITY, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
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BIT(IIO_CHAN_INFO_HARDWAREGAIN), \
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.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
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.info_mask_separate_available = \
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BIT(IIO_CHAN_INFO_HARDWAREGAIN), \
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.info_mask_shared_by_all_available = \
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BIT(IIO_CHAN_INFO_SAMP_FREQ), \
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.indexed = 1, \
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.channel = idx, \
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.address = SX9324_REG_DIFF_MSB, \
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.event_spec = sx_common_events, \
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.num_event_specs = ARRAY_SIZE(sx_common_events), \
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.scan_index = idx, \
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.scan_type = { \
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.sign = 's', \
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.realbits = 12, \
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.storagebits = 16, \
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.endianness = IIO_BE, \
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}, \
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.ext_info = sx9324_channel_ext_info, \
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}
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static const struct iio_chan_spec sx9324_channels[] = {
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SX9324_CHANNEL(0), /* Phase 0 */
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SX9324_CHANNEL(1), /* Phase 1 */
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SX9324_CHANNEL(2), /* Phase 2 */
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SX9324_CHANNEL(3), /* Phase 3 */
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IIO_CHAN_SOFT_TIMESTAMP(4),
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};
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/*
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* Each entry contains the integer part (val) and the fractional part, in micro
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* seconds. It conforms to the IIO output IIO_VAL_INT_PLUS_MICRO.
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*/
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static const struct {
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int val;
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int val2;
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} sx9324_samp_freq_table[] = {
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{ 1000, 0 }, /* 00000: Min (no idle time) */
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{ 500, 0 }, /* 00001: 2 ms */
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{ 250, 0 }, /* 00010: 4 ms */
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{ 166, 666666 }, /* 00011: 6 ms */
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{ 125, 0 }, /* 00100: 8 ms */
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{ 100, 0 }, /* 00101: 10 ms */
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{ 71, 428571 }, /* 00110: 14 ms */
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{ 55, 555556 }, /* 00111: 18 ms */
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{ 45, 454545 }, /* 01000: 22 ms */
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{ 38, 461538 }, /* 01001: 26 ms */
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{ 33, 333333 }, /* 01010: 30 ms */
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{ 29, 411765 }, /* 01011: 34 ms */
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{ 26, 315789 }, /* 01100: 38 ms */
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{ 23, 809524 }, /* 01101: 42 ms */
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{ 21, 739130 }, /* 01110: 46 ms */
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{ 20, 0 }, /* 01111: 50 ms */
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{ 17, 857143 }, /* 10000: 56 ms */
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{ 16, 129032 }, /* 10001: 62 ms */
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{ 14, 705882 }, /* 10010: 68 ms */
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{ 13, 513514 }, /* 10011: 74 ms */
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{ 12, 500000 }, /* 10100: 80 ms */
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{ 11, 111111 }, /* 10101: 90 ms */
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{ 10, 0 }, /* 10110: 100 ms (Typ.) */
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{ 5, 0 }, /* 10111: 200 ms */
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{ 3, 333333 }, /* 11000: 300 ms */
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{ 2, 500000 }, /* 11001: 400 ms */
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{ 1, 666667 }, /* 11010: 600 ms */
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{ 1, 250000 }, /* 11011: 800 ms */
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{ 1, 0 }, /* 11100: 1 s */
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{ 0, 500000 }, /* 11101: 2 s */
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{ 0, 333333 }, /* 11110: 3 s */
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{ 0, 250000 }, /* 11111: 4 s */
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};
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static const unsigned int sx9324_scan_period_table[] = {
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2, 15, 30, 45, 60, 90, 120, 200,
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400, 600, 800, 1000, 2000, 3000, 4000, 5000,
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};
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static const struct regmap_range sx9324_writable_reg_ranges[] = {
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/*
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* To set COMPSTAT for compensation, even if datasheet says register is
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* RO.
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*/
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regmap_reg_range(SX9324_REG_STAT2, SX9324_REG_STAT2),
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regmap_reg_range(SX9324_REG_IRQ_MSK, SX9324_REG_IRQ_CFG2),
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regmap_reg_range(SX9324_REG_GNRL_CTRL0, SX9324_REG_GNRL_CTRL1),
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/* Leave i2c and clock spreading as unavailable */
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regmap_reg_range(SX9324_REG_AFE_CTRL0, SX9324_REG_AFE_CTRL9),
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regmap_reg_range(SX9324_REG_PROX_CTRL0, SX9324_REG_PROX_CTRL7),
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regmap_reg_range(SX9324_REG_ADV_CTRL0, SX9324_REG_ADV_CTRL20),
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||||
regmap_reg_range(SX9324_REG_PHASE_SEL, SX9324_REG_PHASE_SEL),
|
||||
regmap_reg_range(SX9324_REG_OFFSET_MSB, SX9324_REG_OFFSET_LSB),
|
||||
regmap_reg_range(SX9324_REG_RESET, SX9324_REG_RESET),
|
||||
};
|
||||
|
||||
static const struct regmap_access_table sx9324_writeable_regs = {
|
||||
.yes_ranges = sx9324_writable_reg_ranges,
|
||||
.n_yes_ranges = ARRAY_SIZE(sx9324_writable_reg_ranges),
|
||||
};
|
||||
|
||||
/*
|
||||
* All allocated registers are readable, so we just list unallocated
|
||||
* ones.
|
||||
*/
|
||||
static const struct regmap_range sx9324_non_readable_reg_ranges[] = {
|
||||
regmap_reg_range(SX9324_REG_IRQ_CFG2 + 1, SX9324_REG_GNRL_CTRL0 - 1),
|
||||
regmap_reg_range(SX9324_REG_GNRL_CTRL1 + 1, SX9324_REG_AFE_CTRL0 - 1),
|
||||
regmap_reg_range(SX9324_REG_AFE_CTRL9 + 1, SX9324_REG_PROX_CTRL0 - 1),
|
||||
regmap_reg_range(SX9324_REG_PROX_CTRL7 + 1, SX9324_REG_ADV_CTRL0 - 1),
|
||||
regmap_reg_range(SX9324_REG_ADV_CTRL20 + 1, SX9324_REG_PHASE_SEL - 1),
|
||||
regmap_reg_range(SX9324_REG_SAR_LSB + 1, SX9324_REG_RESET - 1),
|
||||
regmap_reg_range(SX9324_REG_RESET + 1, SX9324_REG_WHOAMI - 1),
|
||||
regmap_reg_range(SX9324_REG_WHOAMI + 1, SX9324_REG_REVISION - 1),
|
||||
};
|
||||
|
||||
static const struct regmap_access_table sx9324_readable_regs = {
|
||||
.no_ranges = sx9324_non_readable_reg_ranges,
|
||||
.n_no_ranges = ARRAY_SIZE(sx9324_non_readable_reg_ranges),
|
||||
};
|
||||
|
||||
static const struct regmap_range sx9324_volatile_reg_ranges[] = {
|
||||
regmap_reg_range(SX9324_REG_IRQ_SRC, SX9324_REG_STAT3),
|
||||
regmap_reg_range(SX9324_REG_USEFUL_MSB, SX9324_REG_DIFF_LSB),
|
||||
regmap_reg_range(SX9324_REG_SAR_MSB, SX9324_REG_SAR_LSB),
|
||||
regmap_reg_range(SX9324_REG_WHOAMI, SX9324_REG_WHOAMI),
|
||||
regmap_reg_range(SX9324_REG_REVISION, SX9324_REG_REVISION),
|
||||
};
|
||||
|
||||
static const struct regmap_access_table sx9324_volatile_regs = {
|
||||
.yes_ranges = sx9324_volatile_reg_ranges,
|
||||
.n_yes_ranges = ARRAY_SIZE(sx9324_volatile_reg_ranges),
|
||||
};
|
||||
|
||||
static const struct regmap_config sx9324_regmap_config = {
|
||||
.reg_bits = 8,
|
||||
.val_bits = 8,
|
||||
|
||||
.max_register = SX9324_REG_REVISION,
|
||||
.cache_type = REGCACHE_RBTREE,
|
||||
|
||||
.wr_table = &sx9324_writeable_regs,
|
||||
.rd_table = &sx9324_readable_regs,
|
||||
.volatile_table = &sx9324_volatile_regs,
|
||||
};
|
||||
|
||||
static int sx9324_read_prox_data(struct sx_common_data *data,
|
||||
const struct iio_chan_spec *chan,
|
||||
__be16 *val)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = regmap_write(data->regmap, SX9324_REG_PHASE_SEL, chan->channel);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
return regmap_bulk_read(data->regmap, chan->address, val, sizeof(*val));
|
||||
}
|
||||
|
||||
/*
|
||||
* If we have no interrupt support, we have to wait for a scan period
|
||||
* after enabling a channel to get a result.
|
||||
*/
|
||||
static int sx9324_wait_for_sample(struct sx_common_data *data)
|
||||
{
|
||||
int ret;
|
||||
unsigned int val;
|
||||
|
||||
ret = regmap_read(data->regmap, SX9324_REG_GNRL_CTRL0, &val);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
val = FIELD_GET(SX9324_REG_GNRL_CTRL0_SCANPERIOD_MASK, val);
|
||||
|
||||
msleep(sx9324_scan_period_table[val]);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sx9324_read_gain(struct sx_common_data *data,
|
||||
const struct iio_chan_spec *chan, int *val)
|
||||
{
|
||||
unsigned int reg, regval;
|
||||
int ret;
|
||||
|
||||
reg = SX9324_REG_PROX_CTRL0 + chan->channel / 2;
|
||||
ret = regmap_read(data->regmap, reg, ®val);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
*val = 1 << FIELD_GET(SX9324_REG_PROX_CTRL0_GAIN_MASK, regval);
|
||||
|
||||
return IIO_VAL_INT;
|
||||
}
|
||||
|
||||
static int sx9324_read_samp_freq(struct sx_common_data *data,
|
||||
int *val, int *val2)
|
||||
{
|
||||
int ret;
|
||||
unsigned int regval;
|
||||
|
||||
ret = regmap_read(data->regmap, SX9324_REG_GNRL_CTRL0, ®val);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
regval = FIELD_GET(SX9324_REG_GNRL_CTRL0_SCANPERIOD_MASK, regval);
|
||||
*val = sx9324_samp_freq_table[regval].val;
|
||||
*val2 = sx9324_samp_freq_table[regval].val2;
|
||||
|
||||
return IIO_VAL_INT_PLUS_MICRO;
|
||||
}
|
||||
|
||||
static int sx9324_read_raw(struct iio_dev *indio_dev,
|
||||
const struct iio_chan_spec *chan,
|
||||
int *val, int *val2, long mask)
|
||||
{
|
||||
struct sx_common_data *data = iio_priv(indio_dev);
|
||||
int ret;
|
||||
|
||||
switch (mask) {
|
||||
case IIO_CHAN_INFO_RAW:
|
||||
ret = iio_device_claim_direct_mode(indio_dev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = sx_common_read_proximity(data, chan, val);
|
||||
iio_device_release_direct_mode(indio_dev);
|
||||
return ret;
|
||||
case IIO_CHAN_INFO_HARDWAREGAIN:
|
||||
ret = iio_device_claim_direct_mode(indio_dev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = sx9324_read_gain(data, chan, val);
|
||||
iio_device_release_direct_mode(indio_dev);
|
||||
return ret;
|
||||
case IIO_CHAN_INFO_SAMP_FREQ:
|
||||
return sx9324_read_samp_freq(data, val, val2);
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
static const int sx9324_gain_vals[] = { 1, 2, 4, 8 };
|
||||
|
||||
static int sx9324_read_avail(struct iio_dev *indio_dev,
|
||||
struct iio_chan_spec const *chan,
|
||||
const int **vals, int *type, int *length,
|
||||
long mask)
|
||||
{
|
||||
if (chan->type != IIO_PROXIMITY)
|
||||
return -EINVAL;
|
||||
|
||||
switch (mask) {
|
||||
case IIO_CHAN_INFO_HARDWAREGAIN:
|
||||
*type = IIO_VAL_INT;
|
||||
*length = ARRAY_SIZE(sx9324_gain_vals);
|
||||
*vals = sx9324_gain_vals;
|
||||
return IIO_AVAIL_LIST;
|
||||
case IIO_CHAN_INFO_SAMP_FREQ:
|
||||
*type = IIO_VAL_INT_PLUS_MICRO;
|
||||
*length = ARRAY_SIZE(sx9324_samp_freq_table) * 2;
|
||||
*vals = (int *)sx9324_samp_freq_table;
|
||||
return IIO_AVAIL_LIST;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
static int sx9324_set_samp_freq(struct sx_common_data *data,
|
||||
int val, int val2)
|
||||
{
|
||||
int i, ret;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(sx9324_samp_freq_table); i++)
|
||||
if (val == sx9324_samp_freq_table[i].val &&
|
||||
val2 == sx9324_samp_freq_table[i].val2)
|
||||
break;
|
||||
|
||||
if (i == ARRAY_SIZE(sx9324_samp_freq_table))
|
||||
return -EINVAL;
|
||||
|
||||
mutex_lock(&data->mutex);
|
||||
|
||||
ret = regmap_update_bits(data->regmap,
|
||||
SX9324_REG_GNRL_CTRL0,
|
||||
SX9324_REG_GNRL_CTRL0_SCANPERIOD_MASK, i);
|
||||
|
||||
mutex_unlock(&data->mutex);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int sx9324_read_thresh(struct sx_common_data *data,
|
||||
const struct iio_chan_spec *chan, int *val)
|
||||
{
|
||||
unsigned int regval;
|
||||
unsigned int reg;
|
||||
int ret;
|
||||
|
||||
/*
|
||||
* TODO(gwendal): Depending on the phase function
|
||||
* (proximity/table/body), retrieve the right threshold.
|
||||
* For now, return the proximity threshold.
|
||||
*/
|
||||
reg = SX9324_REG_PROX_CTRL6 + chan->channel / 2;
|
||||
ret = regmap_read(data->regmap, reg, ®val);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (regval <= 1)
|
||||
*val = regval;
|
||||
else
|
||||
*val = (regval * regval) / 2;
|
||||
|
||||
return IIO_VAL_INT;
|
||||
}
|
||||
|
||||
static int sx9324_read_hysteresis(struct sx_common_data *data,
|
||||
const struct iio_chan_spec *chan, int *val)
|
||||
{
|
||||
unsigned int regval, pthresh;
|
||||
int ret;
|
||||
|
||||
ret = sx9324_read_thresh(data, chan, &pthresh);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ret = regmap_read(data->regmap, SX9324_REG_PROX_CTRL5, ®val);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
regval = FIELD_GET(SX9324_REG_PROX_CTRL5_HYST_MASK, regval);
|
||||
if (!regval)
|
||||
*val = 0;
|
||||
else
|
||||
*val = pthresh >> (5 - regval);
|
||||
|
||||
return IIO_VAL_INT;
|
||||
}
|
||||
|
||||
static int sx9324_read_far_debounce(struct sx_common_data *data, int *val)
|
||||
{
|
||||
unsigned int regval;
|
||||
int ret;
|
||||
|
||||
ret = regmap_read(data->regmap, SX9324_REG_PROX_CTRL5, ®val);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
regval = FIELD_GET(SX9324_REG_PROX_CTRL5_FAR_DEBOUNCE_MASK, regval);
|
||||
if (regval)
|
||||
*val = 1 << regval;
|
||||
else
|
||||
*val = 0;
|
||||
|
||||
return IIO_VAL_INT;
|
||||
}
|
||||
|
||||
static int sx9324_read_close_debounce(struct sx_common_data *data, int *val)
|
||||
{
|
||||
unsigned int regval;
|
||||
int ret;
|
||||
|
||||
ret = regmap_read(data->regmap, SX9324_REG_PROX_CTRL5, ®val);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
regval = FIELD_GET(SX9324_REG_PROX_CTRL5_CLOSE_DEBOUNCE_MASK, regval);
|
||||
if (regval)
|
||||
*val = 1 << regval;
|
||||
else
|
||||
*val = 0;
|
||||
|
||||
return IIO_VAL_INT;
|
||||
}
|
||||
|
||||
static int sx9324_read_event_val(struct iio_dev *indio_dev,
|
||||
const struct iio_chan_spec *chan,
|
||||
enum iio_event_type type,
|
||||
enum iio_event_direction dir,
|
||||
enum iio_event_info info, int *val, int *val2)
|
||||
{
|
||||
struct sx_common_data *data = iio_priv(indio_dev);
|
||||
|
||||
if (chan->type != IIO_PROXIMITY)
|
||||
return -EINVAL;
|
||||
|
||||
switch (info) {
|
||||
case IIO_EV_INFO_VALUE:
|
||||
return sx9324_read_thresh(data, chan, val);
|
||||
case IIO_EV_INFO_PERIOD:
|
||||
switch (dir) {
|
||||
case IIO_EV_DIR_RISING:
|
||||
return sx9324_read_far_debounce(data, val);
|
||||
case IIO_EV_DIR_FALLING:
|
||||
return sx9324_read_close_debounce(data, val);
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
case IIO_EV_INFO_HYSTERESIS:
|
||||
return sx9324_read_hysteresis(data, chan, val);
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
static int sx9324_write_thresh(struct sx_common_data *data,
|
||||
const struct iio_chan_spec *chan, int _val)
|
||||
{
|
||||
unsigned int reg, val = _val;
|
||||
int ret;
|
||||
|
||||
reg = SX9324_REG_PROX_CTRL6 + chan->channel / 2;
|
||||
|
||||
if (val >= 1)
|
||||
val = int_sqrt(2 * val);
|
||||
|
||||
if (val > 0xff)
|
||||
return -EINVAL;
|
||||
|
||||
mutex_lock(&data->mutex);
|
||||
ret = regmap_write(data->regmap, reg, val);
|
||||
mutex_unlock(&data->mutex);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int sx9324_write_hysteresis(struct sx_common_data *data,
|
||||
const struct iio_chan_spec *chan, int _val)
|
||||
{
|
||||
unsigned int hyst, val = _val;
|
||||
int ret, pthresh;
|
||||
|
||||
ret = sx9324_read_thresh(data, chan, &pthresh);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
if (val == 0)
|
||||
hyst = 0;
|
||||
else if (val >= pthresh >> 2)
|
||||
hyst = 3;
|
||||
else if (val >= pthresh >> 3)
|
||||
hyst = 2;
|
||||
else if (val >= pthresh >> 4)
|
||||
hyst = 1;
|
||||
else
|
||||
return -EINVAL;
|
||||
|
||||
hyst = FIELD_PREP(SX9324_REG_PROX_CTRL5_HYST_MASK, hyst);
|
||||
mutex_lock(&data->mutex);
|
||||
ret = regmap_update_bits(data->regmap, SX9324_REG_PROX_CTRL5,
|
||||
SX9324_REG_PROX_CTRL5_HYST_MASK, hyst);
|
||||
mutex_unlock(&data->mutex);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int sx9324_write_far_debounce(struct sx_common_data *data, int _val)
|
||||
{
|
||||
unsigned int regval, val = _val;
|
||||
int ret;
|
||||
|
||||
if (val > 0)
|
||||
val = ilog2(val);
|
||||
if (!FIELD_FIT(SX9324_REG_PROX_CTRL5_FAR_DEBOUNCE_MASK, val))
|
||||
return -EINVAL;
|
||||
|
||||
regval = FIELD_PREP(SX9324_REG_PROX_CTRL5_FAR_DEBOUNCE_MASK, val);
|
||||
|
||||
mutex_lock(&data->mutex);
|
||||
ret = regmap_update_bits(data->regmap, SX9324_REG_PROX_CTRL5,
|
||||
SX9324_REG_PROX_CTRL5_FAR_DEBOUNCE_MASK,
|
||||
regval);
|
||||
mutex_unlock(&data->mutex);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int sx9324_write_close_debounce(struct sx_common_data *data, int _val)
|
||||
{
|
||||
unsigned int regval, val = _val;
|
||||
int ret;
|
||||
|
||||
if (val > 0)
|
||||
val = ilog2(val);
|
||||
if (!FIELD_FIT(SX9324_REG_PROX_CTRL5_CLOSE_DEBOUNCE_MASK, val))
|
||||
return -EINVAL;
|
||||
|
||||
regval = FIELD_PREP(SX9324_REG_PROX_CTRL5_CLOSE_DEBOUNCE_MASK, val);
|
||||
|
||||
mutex_lock(&data->mutex);
|
||||
ret = regmap_update_bits(data->regmap, SX9324_REG_PROX_CTRL5,
|
||||
SX9324_REG_PROX_CTRL5_CLOSE_DEBOUNCE_MASK,
|
||||
regval);
|
||||
mutex_unlock(&data->mutex);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int sx9324_write_event_val(struct iio_dev *indio_dev,
|
||||
const struct iio_chan_spec *chan,
|
||||
enum iio_event_type type,
|
||||
enum iio_event_direction dir,
|
||||
enum iio_event_info info, int val, int val2)
|
||||
{
|
||||
struct sx_common_data *data = iio_priv(indio_dev);
|
||||
|
||||
if (chan->type != IIO_PROXIMITY)
|
||||
return -EINVAL;
|
||||
|
||||
switch (info) {
|
||||
case IIO_EV_INFO_VALUE:
|
||||
return sx9324_write_thresh(data, chan, val);
|
||||
case IIO_EV_INFO_PERIOD:
|
||||
switch (dir) {
|
||||
case IIO_EV_DIR_RISING:
|
||||
return sx9324_write_far_debounce(data, val);
|
||||
case IIO_EV_DIR_FALLING:
|
||||
return sx9324_write_close_debounce(data, val);
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
case IIO_EV_INFO_HYSTERESIS:
|
||||
return sx9324_write_hysteresis(data, chan, val);
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
static int sx9324_write_gain(struct sx_common_data *data,
|
||||
const struct iio_chan_spec *chan, int val)
|
||||
{
|
||||
unsigned int gain, reg;
|
||||
int ret;
|
||||
|
||||
gain = ilog2(val);
|
||||
reg = SX9324_REG_PROX_CTRL0 + chan->channel / 2;
|
||||
gain = FIELD_PREP(SX9324_REG_PROX_CTRL0_GAIN_MASK, gain);
|
||||
|
||||
mutex_lock(&data->mutex);
|
||||
ret = regmap_update_bits(data->regmap, reg,
|
||||
SX9324_REG_PROX_CTRL0_GAIN_MASK,
|
||||
gain);
|
||||
mutex_unlock(&data->mutex);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int sx9324_write_raw(struct iio_dev *indio_dev,
|
||||
const struct iio_chan_spec *chan, int val, int val2,
|
||||
long mask)
|
||||
{
|
||||
struct sx_common_data *data = iio_priv(indio_dev);
|
||||
|
||||
switch (mask) {
|
||||
case IIO_CHAN_INFO_SAMP_FREQ:
|
||||
return sx9324_set_samp_freq(data, val, val2);
|
||||
case IIO_CHAN_INFO_HARDWAREGAIN:
|
||||
return sx9324_write_gain(data, chan, val);
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
|
||||
/* Activate all channels and perform an initial compensation. */
|
||||
static int sx9324_init_compensation(struct iio_dev *indio_dev)
|
||||
{
|
||||
struct sx_common_data *data = iio_priv(indio_dev);
|
||||
unsigned int val;
|
||||
int ret;
|
||||
|
||||
/* run the compensation phase on all channels */
|
||||
ret = regmap_update_bits(data->regmap, SX9324_REG_STAT2,
|
||||
SX9324_REG_STAT2_COMPSTAT_MASK,
|
||||
SX9324_REG_STAT2_COMPSTAT_MASK);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
return regmap_read_poll_timeout(data->regmap, SX9324_REG_STAT2, val,
|
||||
!(val & SX9324_REG_STAT2_COMPSTAT_MASK),
|
||||
20000, 2000000);
|
||||
}
|
||||
|
||||
static int sx9324_check_whoami(struct device *dev,
|
||||
struct iio_dev *indio_dev)
|
||||
{
|
||||
/*
|
||||
* Only one sensor for this driver. Assuming the device tree
|
||||
* is correct, just set the sensor name.
|
||||
*/
|
||||
indio_dev->name = "sx9324";
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct sx_common_chip_info sx9324_chip_info = {
|
||||
.reg_stat = SX9324_REG_STAT0,
|
||||
.reg_irq_msk = SX9324_REG_IRQ_MSK,
|
||||
.reg_enable_chan = SX9324_REG_GNRL_CTRL1,
|
||||
.reg_reset = SX9324_REG_RESET,
|
||||
|
||||
.mask_enable_chan = SX9324_REG_GNRL_CTRL1_PHEN_MASK,
|
||||
.irq_msk_offset = 3,
|
||||
.num_channels = SX9324_NUM_CHANNELS,
|
||||
|
||||
.ops = {
|
||||
.read_prox_data = sx9324_read_prox_data,
|
||||
.check_whoami = sx9324_check_whoami,
|
||||
.init_compensation = sx9324_init_compensation,
|
||||
.wait_for_sample = sx9324_wait_for_sample,
|
||||
},
|
||||
|
||||
.iio_channels = sx9324_channels,
|
||||
.num_iio_channels = ARRAY_SIZE(sx9324_channels),
|
||||
.iio_info = {
|
||||
.read_raw = sx9324_read_raw,
|
||||
.read_avail = sx9324_read_avail,
|
||||
.read_event_value = sx9324_read_event_val,
|
||||
.write_event_value = sx9324_write_event_val,
|
||||
.write_raw = sx9324_write_raw,
|
||||
.read_event_config = sx_common_read_event_config,
|
||||
.write_event_config = sx_common_write_event_config,
|
||||
},
|
||||
};
|
||||
|
||||
static int sx9324_probe(struct i2c_client *client)
|
||||
{
|
||||
return sx_common_probe(client, &sx9324_chip_info, &sx9324_regmap_config);
|
||||
}
|
||||
|
||||
static int __maybe_unused sx9324_suspend(struct device *dev)
|
||||
{
|
||||
struct sx_common_data *data = iio_priv(dev_get_drvdata(dev));
|
||||
unsigned int regval;
|
||||
int ret;
|
||||
|
||||
disable_irq_nosync(data->client->irq);
|
||||
|
||||
mutex_lock(&data->mutex);
|
||||
ret = regmap_read(data->regmap, SX9324_REG_GNRL_CTRL1, ®val);
|
||||
|
||||
data->suspend_ctrl =
|
||||
FIELD_GET(SX9324_REG_GNRL_CTRL1_PHEN_MASK, regval);
|
||||
|
||||
if (ret < 0)
|
||||
goto out;
|
||||
|
||||
/* Disable all phases, send the device to sleep. */
|
||||
ret = regmap_write(data->regmap, SX9324_REG_GNRL_CTRL1, 0);
|
||||
|
||||
out:
|
||||
mutex_unlock(&data->mutex);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int __maybe_unused sx9324_resume(struct device *dev)
|
||||
{
|
||||
struct sx_common_data *data = iio_priv(dev_get_drvdata(dev));
|
||||
int ret;
|
||||
|
||||
mutex_lock(&data->mutex);
|
||||
ret = regmap_write(data->regmap, SX9324_REG_GNRL_CTRL1,
|
||||
data->suspend_ctrl | SX9324_REG_GNRL_CTRL1_PAUSECTRL);
|
||||
mutex_unlock(&data->mutex);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
enable_irq(data->client->irq);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static SIMPLE_DEV_PM_OPS(sx9324_pm_ops, sx9324_suspend, sx9324_resume);
|
||||
|
||||
static const struct acpi_device_id sx9324_acpi_match[] = {
|
||||
{ "STH9324", SX9324_WHOAMI_VALUE },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(acpi, sx9324_acpi_match);
|
||||
|
||||
static const struct of_device_id sx9324_of_match[] = {
|
||||
{ .compatible = "semtech,sx9324", (void *)SX9324_WHOAMI_VALUE },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, sx9324_of_match);
|
||||
|
||||
static const struct i2c_device_id sx9324_id[] = {
|
||||
{ "sx9324", SX9324_WHOAMI_VALUE },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(i2c, sx9324_id);
|
||||
|
||||
static struct i2c_driver sx9324_driver = {
|
||||
.driver = {
|
||||
.name = "sx9324",
|
||||
.acpi_match_table = sx9324_acpi_match,
|
||||
.of_match_table = sx9324_of_match,
|
||||
.pm = &sx9324_pm_ops,
|
||||
|
||||
/*
|
||||
* Lots of i2c transfers in probe + over 200 ms waiting in
|
||||
* sx9324_init_compensation() mean a slow probe; prefer async
|
||||
* so we don't delay boot if we're builtin to the kernel.
|
||||
*/
|
||||
.probe_type = PROBE_PREFER_ASYNCHRONOUS,
|
||||
},
|
||||
.probe_new = sx9324_probe,
|
||||
.id_table = sx9324_id,
|
||||
};
|
||||
module_i2c_driver(sx9324_driver);
|
||||
|
||||
MODULE_AUTHOR("Gwendal Grignou <gwendal@chromium.org>");
|
||||
MODULE_DESCRIPTION("Driver for Semtech SX9324 proximity sensor");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
MODULE_IMPORT_NS(SEMTECH_PROX);
|
||||
Loading…
Reference in New Issue
Block a user