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Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Thomas Gleixner: "This update contains: - Hopefully the last ASM CLAC fixups - A fix for the Quark family related to the IMR lock which makes kexec work again - A off-by-one fix in the MPX code. Ironic, isn't it? - A fix for X86_PAE which addresses once more an unsigned long vs phys_addr_t hickup" * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/mpx: Fix off-by-one comparison with nr_registers x86/mm: Fix slow_virt_to_phys() for X86_PAE again x86/entry/compat: Add missing CLAC to entry_INT80_32 x86/entry/32: Add an ASM_CLAC to entry_SYSENTER_32 x86/platform/intel/quark: Change the kernel's IMR lock bit to false
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commit
4b696dcb1a
@ -294,6 +294,7 @@ sysenter_past_esp:
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pushl $__USER_DS /* pt_regs->ss */
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pushl %ebp /* pt_regs->sp (stashed in bp) */
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pushfl /* pt_regs->flags (except IF = 0) */
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ASM_CLAC /* Clear AC after saving FLAGS */
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orl $X86_EFLAGS_IF, (%esp) /* Fix IF */
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pushl $__USER_CS /* pt_regs->cs */
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pushl $0 /* pt_regs->ip = 0 (placeholder) */
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@ -261,6 +261,7 @@ ENTRY(entry_INT80_compat)
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* Interrupts are off on entry.
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*/
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PARAVIRT_ADJUST_EXCEPTION_FRAME
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ASM_CLAC /* Do this early to minimize exposure */
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SWAPGS
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/*
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@ -123,7 +123,7 @@ static int get_reg_offset(struct insn *insn, struct pt_regs *regs,
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break;
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}
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if (regno > nr_registers) {
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if (regno >= nr_registers) {
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WARN_ONCE(1, "decoded an instruction with an invalid register");
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return -EINVAL;
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}
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@ -419,24 +419,30 @@ pmd_t *lookup_pmd_address(unsigned long address)
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phys_addr_t slow_virt_to_phys(void *__virt_addr)
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{
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unsigned long virt_addr = (unsigned long)__virt_addr;
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unsigned long phys_addr, offset;
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phys_addr_t phys_addr;
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unsigned long offset;
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enum pg_level level;
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pte_t *pte;
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pte = lookup_address(virt_addr, &level);
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BUG_ON(!pte);
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/*
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* pXX_pfn() returns unsigned long, which must be cast to phys_addr_t
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* before being left-shifted PAGE_SHIFT bits -- this trick is to
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* make 32-PAE kernel work correctly.
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*/
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switch (level) {
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case PG_LEVEL_1G:
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phys_addr = pud_pfn(*(pud_t *)pte) << PAGE_SHIFT;
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phys_addr = (phys_addr_t)pud_pfn(*(pud_t *)pte) << PAGE_SHIFT;
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offset = virt_addr & ~PUD_PAGE_MASK;
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break;
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case PG_LEVEL_2M:
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phys_addr = pmd_pfn(*(pmd_t *)pte) << PAGE_SHIFT;
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phys_addr = (phys_addr_t)pmd_pfn(*(pmd_t *)pte) << PAGE_SHIFT;
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offset = virt_addr & ~PMD_PAGE_MASK;
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break;
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default:
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phys_addr = pte_pfn(*pte) << PAGE_SHIFT;
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phys_addr = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT;
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offset = virt_addr & ~PAGE_MASK;
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}
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@ -592,14 +592,14 @@ static void __init imr_fixup_memmap(struct imr_device *idev)
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end = (unsigned long)__end_rodata - 1;
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/*
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* Setup a locked IMR around the physical extent of the kernel
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* Setup an unlocked IMR around the physical extent of the kernel
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* from the beginning of the .text secton to the end of the
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* .rodata section as one physically contiguous block.
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*
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* We don't round up @size since it is already PAGE_SIZE aligned.
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* See vmlinux.lds.S for details.
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*/
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ret = imr_add_range(base, size, IMR_CPU, IMR_CPU, true);
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ret = imr_add_range(base, size, IMR_CPU, IMR_CPU, false);
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if (ret < 0) {
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pr_err("unable to setup IMR for kernel: %zu KiB (%lx - %lx)\n",
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size / 1024, start, end);
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