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ASoC: rt5682: fix a little pop while playback
A little pop can be heard obviously from HP while playing a silent. This patch fixes it by using two functions: 1. Enable HP 1bit output mode. 2. Change the charge pump switch size during playback on and off. Signed-off-by: Derek Fang <derek.fang@realtek.com> Link: https://lore.kernel.org/r/20211014094054.811-1-derek.fang@realtek.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -46,6 +46,8 @@ static const struct reg_sequence patch_list[] = {
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{RT5682_SAR_IL_CMD_1, 0x22b7},
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{RT5682_SAR_IL_CMD_1, 0x22b7},
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{RT5682_SAR_IL_CMD_3, 0x0365},
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{RT5682_SAR_IL_CMD_3, 0x0365},
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{RT5682_SAR_IL_CMD_6, 0x0110},
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{RT5682_SAR_IL_CMD_6, 0x0110},
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{RT5682_CHARGE_PUMP_1, 0x0210},
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{RT5682_HP_LOGIC_CTRL_2, 0x0007},
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};
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};
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void rt5682_apply_patch_list(struct rt5682_priv *rt5682, struct device *dev)
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void rt5682_apply_patch_list(struct rt5682_priv *rt5682, struct device *dev)
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@ -1515,21 +1517,29 @@ static int rt5682_hp_event(struct snd_soc_dapm_widget *w,
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switch (event) {
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switch (event) {
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case SND_SOC_DAPM_PRE_PMU:
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case SND_SOC_DAPM_PRE_PMU:
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snd_soc_component_write(component,
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snd_soc_component_update_bits(component, RT5682_HP_CTRL_2,
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RT5682_HP_LOGIC_CTRL_2, 0x0012);
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RT5682_HP_C2_DAC_AMP_MUTE, 0);
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snd_soc_component_write(component,
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snd_soc_component_update_bits(component, RT5682_HP_LOGIC_CTRL_2,
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RT5682_HP_CTRL_2, 0x6000);
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RT5682_HP_LC2_SIG_SOUR2_MASK, RT5682_HP_LC2_SIG_SOUR2_REG);
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snd_soc_component_update_bits(component,
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snd_soc_component_update_bits(component,
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RT5682_DEPOP_1, 0x60, 0x60);
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RT5682_DEPOP_1, 0x60, 0x60);
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snd_soc_component_update_bits(component,
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snd_soc_component_update_bits(component,
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RT5682_DAC_ADC_DIG_VOL1, 0x00c0, 0x0080);
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RT5682_DAC_ADC_DIG_VOL1, 0x00c0, 0x0080);
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snd_soc_component_update_bits(component, RT5682_HP_CTRL_2,
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RT5682_HP_C2_DAC_L_EN | RT5682_HP_C2_DAC_R_EN,
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RT5682_HP_C2_DAC_L_EN | RT5682_HP_C2_DAC_R_EN);
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usleep_range(5000, 10000);
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snd_soc_component_update_bits(component, RT5682_CHARGE_PUMP_1,
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RT5682_CP_SW_SIZE_MASK, RT5682_CP_SW_SIZE_L);
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break;
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break;
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case SND_SOC_DAPM_POST_PMD:
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case SND_SOC_DAPM_POST_PMD:
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snd_soc_component_update_bits(component, RT5682_HP_CTRL_2,
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RT5682_HP_C2_DAC_L_EN | RT5682_HP_C2_DAC_R_EN, 0);
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snd_soc_component_update_bits(component, RT5682_CHARGE_PUMP_1,
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RT5682_CP_SW_SIZE_MASK, RT5682_CP_SW_SIZE_M);
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snd_soc_component_update_bits(component,
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snd_soc_component_update_bits(component,
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RT5682_DEPOP_1, 0x60, 0x0);
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RT5682_DEPOP_1, 0x60, 0x0);
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snd_soc_component_write(component,
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RT5682_HP_CTRL_2, 0x0000);
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snd_soc_component_update_bits(component,
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snd_soc_component_update_bits(component,
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RT5682_DAC_ADC_DIG_VOL1, 0x00c0, 0x0000);
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RT5682_DAC_ADC_DIG_VOL1, 0x00c0, 0x0000);
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break;
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break;
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@ -1637,6 +1647,23 @@ static SOC_VALUE_ENUM_SINGLE_DECL(rt5682_adcdat_pin_enum,
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static const struct snd_kcontrol_new rt5682_adcdat_pin_ctrl =
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static const struct snd_kcontrol_new rt5682_adcdat_pin_ctrl =
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SOC_DAPM_ENUM("ADCDAT", rt5682_adcdat_pin_enum);
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SOC_DAPM_ENUM("ADCDAT", rt5682_adcdat_pin_enum);
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static const unsigned int rt5682_hpo_sig_out_values[] = {
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2,
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7,
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};
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static const char * const rt5682_hpo_sig_out_mode[] = {
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"Legacy",
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"OneBit",
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};
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static SOC_VALUE_ENUM_SINGLE_DECL(rt5682_hpo_sig_out_enum,
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RT5682_HP_LOGIC_CTRL_2, 0, RT5682_HP_LC2_SIG_SOUR1_MASK,
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rt5682_hpo_sig_out_mode, rt5682_hpo_sig_out_values);
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static const struct snd_kcontrol_new rt5682_hpo_sig_demux =
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SOC_DAPM_ENUM("HPO Signal Demux", rt5682_hpo_sig_out_enum);
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static const struct snd_soc_dapm_widget rt5682_dapm_widgets[] = {
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static const struct snd_soc_dapm_widget rt5682_dapm_widgets[] = {
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SND_SOC_DAPM_SUPPLY("LDO2", RT5682_PWR_ANLG_3, RT5682_PWR_LDO2_BIT,
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SND_SOC_DAPM_SUPPLY("LDO2", RT5682_PWR_ANLG_3, RT5682_PWR_LDO2_BIT,
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0, NULL, 0),
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0, NULL, 0),
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@ -1820,6 +1847,10 @@ static const struct snd_soc_dapm_widget rt5682_dapm_widgets[] = {
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SND_SOC_DAPM_SWITCH("HPOR Playback", SND_SOC_NOPM, 0, 0,
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SND_SOC_DAPM_SWITCH("HPOR Playback", SND_SOC_NOPM, 0, 0,
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&hpor_switch),
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&hpor_switch),
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SND_SOC_DAPM_OUT_DRV("HPO Legacy", SND_SOC_NOPM, 0, 0, NULL, 0),
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SND_SOC_DAPM_OUT_DRV("HPO OneBit", SND_SOC_NOPM, 0, 0, NULL, 0),
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SND_SOC_DAPM_DEMUX("HPO Signal Demux", SND_SOC_NOPM, 0, 0, &rt5682_hpo_sig_demux),
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/* CLK DET */
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/* CLK DET */
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SND_SOC_DAPM_SUPPLY("CLKDET SYS", RT5682_CLK_DET,
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SND_SOC_DAPM_SUPPLY("CLKDET SYS", RT5682_CLK_DET,
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RT5682_SYS_CLK_DET_SFT, 0, NULL, 0),
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RT5682_SYS_CLK_DET_SFT, 0, NULL, 0),
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@ -1987,10 +2018,19 @@ static const struct snd_soc_dapm_route rt5682_dapm_routes[] = {
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{"HP Amp", NULL, "Charge Pump"},
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{"HP Amp", NULL, "Charge Pump"},
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{"HP Amp", NULL, "CLKDET SYS"},
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{"HP Amp", NULL, "CLKDET SYS"},
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{"HP Amp", NULL, "Vref1"},
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{"HP Amp", NULL, "Vref1"},
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{"HPOL Playback", "Switch", "HP Amp"},
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{"HPOR Playback", "Switch", "HP Amp"},
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{"HPO Signal Demux", NULL, "HP Amp"},
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{"HPO Legacy", "Legacy", "HPO Signal Demux"},
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{"HPO OneBit", "OneBit", "HPO Signal Demux"},
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{"HPOL Playback", "Switch", "HPO Legacy"},
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{"HPOR Playback", "Switch", "HPO Legacy"},
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{"HPOL", NULL, "HPOL Playback"},
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{"HPOL", NULL, "HPOL Playback"},
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{"HPOR", NULL, "HPOR Playback"},
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{"HPOR", NULL, "HPOR Playback"},
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{"HPOL", NULL, "HPO OneBit"},
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{"HPOR", NULL, "HPO OneBit"},
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};
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};
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static int rt5682_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
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static int rt5682_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
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@ -375,6 +375,14 @@
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#define RT5682_R_VOL_MASK (0x3f)
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#define RT5682_R_VOL_MASK (0x3f)
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#define RT5682_R_VOL_SFT 0
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#define RT5682_R_VOL_SFT 0
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/* Headphone Amp Control 2 (0x0003) */
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#define RT5682_HP_C2_DAC_AMP_MUTE_SFT 15
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#define RT5682_HP_C2_DAC_AMP_MUTE (0x1 << 15)
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#define RT5682_HP_C2_DAC_L_EN_SFT 14
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#define RT5682_HP_C2_DAC_L_EN (0x1 << 14)
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#define RT5682_HP_C2_DAC_R_EN_SFT 13
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#define RT5682_HP_C2_DAC_R_EN (0x1 << 13)
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/*Headphone Amp L/R Analog Gain and Digital NG2 Gain Control (0x0005 0x0006)*/
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/*Headphone Amp L/R Analog Gain and Digital NG2 Gain Control (0x0005 0x0006)*/
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#define RT5682_G_HP (0xf << 8)
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#define RT5682_G_HP (0xf << 8)
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#define RT5682_G_HP_SFT 8
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#define RT5682_G_HP_SFT 8
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@ -1265,6 +1273,10 @@
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#define RT5682_HPA_CP_BIAS_6UA (0x3 << 2)
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#define RT5682_HPA_CP_BIAS_6UA (0x3 << 2)
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/* Charge Pump Internal Register1 (0x0125) */
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/* Charge Pump Internal Register1 (0x0125) */
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#define RT5682_CP_SW_SIZE_MASK (0x7 << 8)
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#define RT5682_CP_SW_SIZE_L (0x4 << 8)
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#define RT5682_CP_SW_SIZE_M (0x2 << 8)
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#define RT5682_CP_SW_SIZE_S (0x1 << 8)
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#define RT5682_CP_CLK_HP_MASK (0x3 << 4)
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#define RT5682_CP_CLK_HP_MASK (0x3 << 4)
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#define RT5682_CP_CLK_HP_100KHZ (0x0 << 4)
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#define RT5682_CP_CLK_HP_100KHZ (0x0 << 4)
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#define RT5682_CP_CLK_HP_200KHZ (0x1 << 4)
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#define RT5682_CP_CLK_HP_200KHZ (0x1 << 4)
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@ -1315,6 +1327,14 @@
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#define RT5682_DEB_STO_DAC_MASK (0x7 << 4)
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#define RT5682_DEB_STO_DAC_MASK (0x7 << 4)
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#define RT5682_DEB_80_MS (0x0 << 4)
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#define RT5682_DEB_80_MS (0x0 << 4)
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/* HP Behavior Logic Control 2 (0x01db) */
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#define RT5682_HP_LC2_SIG_SOUR2_MASK (0x1 << 4)
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#define RT5682_HP_LC2_SIG_SOUR2_REG (0x1 << 4)
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#define RT5682_HP_LC2_SIG_SOUR2_DC_CAL (0x0 << 4)
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#define RT5682_HP_LC2_SIG_SOUR1_MASK (0x7)
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#define RT5682_HP_LC2_SIG_SOUR1_1BIT (0x7)
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#define RT5682_HP_LC2_SIG_SOUR1_LEGA (0x2)
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/* SAR ADC Inline Command Control 1 (0x0210) */
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/* SAR ADC Inline Command Control 1 (0x0210) */
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#define RT5682_SAR_BUTT_DET_MASK (0x1 << 15)
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#define RT5682_SAR_BUTT_DET_MASK (0x1 << 15)
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#define RT5682_SAR_BUTT_DET_EN (0x1 << 15)
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#define RT5682_SAR_BUTT_DET_EN (0x1 << 15)
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