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drm/i915/bdw: BWGTLB clock gate disable
Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Jesse Barnes <jbarnes@virtuosugeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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drivers/gpu/drm/i915
@ -660,6 +660,7 @@
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#define ARB_MODE_SWIZZLE_SNB (1<<4)
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#define ARB_MODE_SWIZZLE_IVB (1<<5)
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#define GAMTARBMODE 0x04a08
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#define ARB_MODE_BWGTLB_DISABLE (1<<9)
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#define ARB_MODE_SWIZZLE_BDW (1<<1)
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#define RENDER_HWS_PGA_GEN7 (0x04080)
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#define RING_FAULT_REG(ring) (0x4094 + 0x100*(ring)->id)
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@ -5286,6 +5286,8 @@ static void gen8_init_clock_gating(struct drm_device *dev)
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/* FIXME(BDW): Check all the w/a, some might only apply to
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* pre-production hw. */
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I915_WRITE(GAMTARBMODE, _MASKED_BIT_ENABLE(ARB_MODE_BWGTLB_DISABLE));
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/* WaSwitchSolVfFArbitrationPriority */
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I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) | HSW_ECOCHK_ARB_PRIO_SOL);
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