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Merge branch 'phy-microchip-ksz-9897-errata'
Enguerrand de Ribaucourt says: ==================== Handle new Microchip KSZ 9897 Errata These patches implement some suggested workarounds from the Microchip KSZ 9897 Errata [1]. [1] https://ww1.microchip.com/downloads/aemDocuments/documents/UNG/ProductDocuments/Errata/KSZ9897R-Errata-DS80000758.pdf --- v7: - use dev_crit_once instead of dev_crit_ratelimited - add a comment to help users understand the consequences of half-duplex errors v6: https://lore.kernel.org/netdev/20240614094642.122464-1-enguerrand.de-ribaucourt@savoirfairelinux.com/ - remove KSZ9897 phy_id workaround (was a configuration issue) - use macros for checking link down in monitoring function - check if VLAN is enabled before monitoring resources v5: https://lore.kernel.org/all/20240604092304.314636-1-enguerrand.de-ribaucourt@savoirfairelinux.com/ - use macros for bitfields - rewrap comments - check ksz_pread* return values - fix spelling mistakes - remove KSZ9477 suspend/resume deletion patch v4: https://lore.kernel.org/all/20240531142430.678198-1-enguerrand.de-ribaucourt@savoirfairelinux.com/ - Rebase on net/main - Add Fixes: tags to the patches - reverse x-mas tree order - use pseudo phy_id instead of match_phy_device v3: https://lore.kernel.org/all/20240530102436.226189-1-enguerrand.de-ribaucourt@savoirfairelinux.com/ ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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commit
4ae2c67840
@ -427,6 +427,57 @@ void ksz9477_freeze_mib(struct ksz_device *dev, int port, bool freeze)
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mutex_unlock(&p->mib.cnt_mutex);
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}
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int ksz9477_errata_monitor(struct ksz_device *dev, int port,
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u64 tx_late_col)
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{
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u32 pmavbc;
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u8 status;
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u16 pqm;
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int ret;
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ret = ksz_pread8(dev, port, REG_PORT_STATUS_0, &status);
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if (ret)
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return ret;
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if (!(FIELD_GET(PORT_INTF_SPEED_MASK, status) == PORT_INTF_SPEED_NONE) &&
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!(status & PORT_INTF_FULL_DUPLEX)) {
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/* Errata DS80000754 recommends monitoring potential faults in
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* half-duplex mode. The switch might not be able to communicate anymore
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* in these states.
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* If you see this message, please read the errata-sheet for more information:
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* https://ww1.microchip.com/downloads/aemDocuments/documents/UNG/ProductDocuments/Errata/KSZ9477S-Errata-DS80000754.pdf
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* To workaround this issue, half-duplex mode should be avoided.
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* A software reset could be implemented to recover from this state.
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*/
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dev_warn_once(dev->dev,
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"Half-duplex detected on port %d, transmission halt may occur\n",
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port);
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if (tx_late_col != 0) {
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/* Transmission halt with late collisions */
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dev_crit_once(dev->dev,
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"TX late collisions detected, transmission may be halted on port %d\n",
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port);
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}
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ret = ksz_read8(dev, REG_SW_LUE_CTRL_0, &status);
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if (ret)
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return ret;
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if (status & SW_VLAN_ENABLE) {
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ret = ksz_pread16(dev, port, REG_PORT_QM_TX_CNT_0__4, &pqm);
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if (ret)
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return ret;
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ret = ksz_read32(dev, REG_PMAVBC, &pmavbc);
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if (ret)
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return ret;
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if ((FIELD_GET(PMAVBC_MASK, pmavbc) <= PMAVBC_MIN) ||
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(FIELD_GET(PORT_QM_TX_CNT_M, pqm) >= PORT_QM_TX_CNT_MAX)) {
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/* Transmission halt with Half-Duplex and VLAN */
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dev_crit_once(dev->dev,
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"resources out of limits, transmission may be halted\n");
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}
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}
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}
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return ret;
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}
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void ksz9477_port_init_cnt(struct ksz_device *dev, int port)
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{
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struct ksz_port_mib *mib = &dev->ports[port].mib;
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@ -1297,6 +1348,10 @@ int ksz9477_setup(struct dsa_switch *ds)
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/* Enable REG_SW_MTU__2 reg by setting SW_JUMBO_PACKET */
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ksz_cfg(dev, REG_SW_MAC_CTRL_1, SW_JUMBO_PACKET, true);
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/* Use collision based back pressure mode. */
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ksz_cfg(dev, REG_SW_MAC_CTRL_1, SW_BACK_PRESSURE,
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SW_BACK_PRESSURE_COLLISION);
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/* Now we can configure default MTU value */
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ret = regmap_update_bits(ksz_regmap_16(dev), REG_SW_MTU__2, REG_SW_MTU_MASK,
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VLAN_ETH_FRAME_LEN + ETH_FCS_LEN);
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@ -36,6 +36,8 @@ int ksz9477_port_mirror_add(struct ksz_device *dev, int port,
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bool ingress, struct netlink_ext_ack *extack);
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void ksz9477_port_mirror_del(struct ksz_device *dev, int port,
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struct dsa_mall_mirror_tc_entry *mirror);
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int ksz9477_errata_monitor(struct ksz_device *dev, int port,
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u64 tx_late_col);
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void ksz9477_get_caps(struct ksz_device *dev, int port,
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struct phylink_config *config);
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int ksz9477_fdb_dump(struct ksz_device *dev, int port,
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@ -247,6 +247,7 @@
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#define REG_SW_MAC_CTRL_1 0x0331
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#define SW_BACK_PRESSURE BIT(5)
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#define SW_BACK_PRESSURE_COLLISION 0
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#define FAIR_FLOW_CTRL BIT(4)
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#define NO_EXC_COLLISION_DROP BIT(3)
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#define SW_JUMBO_PACKET BIT(2)
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@ -842,8 +843,8 @@
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#define REG_PORT_STATUS_0 0x0030
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#define PORT_INTF_SPEED_M 0x3
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#define PORT_INTF_SPEED_S 3
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#define PORT_INTF_SPEED_MASK GENMASK(4, 3)
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#define PORT_INTF_SPEED_NONE GENMASK(1, 0)
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#define PORT_INTF_FULL_DUPLEX BIT(2)
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#define PORT_TX_FLOW_CTRL BIT(1)
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#define PORT_RX_FLOW_CTRL BIT(0)
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@ -1167,6 +1168,11 @@
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#define PORT_RMII_CLK_SEL BIT(7)
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#define PORT_MII_SEL_EDGE BIT(5)
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#define REG_PMAVBC 0x03AC
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#define PMAVBC_MASK GENMASK(26, 16)
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#define PMAVBC_MIN 0x580
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/* 4 - MAC */
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#define REG_PORT_MAC_CTRL_0 0x0400
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@ -1494,6 +1500,7 @@
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#define PORT_QM_TX_CNT_USED_S 0
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#define PORT_QM_TX_CNT_M (BIT(11) - 1)
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#define PORT_QM_TX_CNT_MAX 0x200
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#define REG_PORT_QM_TX_CNT_1__4 0x0A14
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@ -1382,6 +1382,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {
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.tc_cbs_supported = true,
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.ops = &ksz9477_dev_ops,
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.phylink_mac_ops = &ksz9477_phylink_mac_ops,
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.phy_errata_9477 = true,
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.mib_names = ksz9477_mib_names,
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.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),
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.reg_mib_cnt = MIB_COUNTER_NUM,
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@ -1416,6 +1417,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {
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.num_ipms = 8,
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.ops = &ksz9477_dev_ops,
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.phylink_mac_ops = &ksz9477_phylink_mac_ops,
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.phy_errata_9477 = true,
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.mib_names = ksz9477_mib_names,
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.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),
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.reg_mib_cnt = MIB_COUNTER_NUM,
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@ -1450,6 +1452,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {
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.num_ipms = 8,
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.ops = &ksz9477_dev_ops,
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.phylink_mac_ops = &ksz9477_phylink_mac_ops,
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.phy_errata_9477 = true,
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.mib_names = ksz9477_mib_names,
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.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),
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.reg_mib_cnt = MIB_COUNTER_NUM,
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@ -1540,6 +1543,7 @@ const struct ksz_chip_data ksz_switch_chips[] = {
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.tc_cbs_supported = true,
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.ops = &ksz9477_dev_ops,
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.phylink_mac_ops = &ksz9477_phylink_mac_ops,
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.phy_errata_9477 = true,
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.mib_names = ksz9477_mib_names,
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.mib_cnt = ARRAY_SIZE(ksz9477_mib_names),
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.reg_mib_cnt = MIB_COUNTER_NUM,
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@ -1820,6 +1824,7 @@ void ksz_r_mib_stats64(struct ksz_device *dev, int port)
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struct rtnl_link_stats64 *stats;
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struct ksz_stats_raw *raw;
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struct ksz_port_mib *mib;
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int ret;
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mib = &dev->ports[port].mib;
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stats = &mib->stats64;
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@ -1861,6 +1866,12 @@ void ksz_r_mib_stats64(struct ksz_device *dev, int port)
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pstats->rx_pause_frames = raw->rx_pause;
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spin_unlock(&mib->stats64_lock);
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if (dev->info->phy_errata_9477) {
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ret = ksz9477_errata_monitor(dev, port, raw->tx_late_col);
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if (ret)
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dev_err(dev->dev, "Failed to monitor transmission halt\n");
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}
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}
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void ksz88xx_r_mib_stats64(struct ksz_device *dev, int port)
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@ -66,6 +66,7 @@ struct ksz_chip_data {
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bool tc_cbs_supported;
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const struct ksz_dev_ops *ops;
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const struct phylink_mac_ops *phylink_mac_ops;
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bool phy_errata_9477;
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bool ksz87xx_eee_link_erratum;
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const struct ksz_mib_names *mib_names;
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int mib_cnt;
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@ -5607,6 +5607,7 @@ static struct mdio_device_id __maybe_unused micrel_tbl[] = {
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{ PHY_ID_KSZ8081, MICREL_PHY_ID_MASK },
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{ PHY_ID_KSZ8873MLL, MICREL_PHY_ID_MASK },
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{ PHY_ID_KSZ886X, MICREL_PHY_ID_MASK },
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{ PHY_ID_KSZ9477, MICREL_PHY_ID_MASK },
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{ PHY_ID_LAN8814, MICREL_PHY_ID_MASK },
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{ PHY_ID_LAN8804, MICREL_PHY_ID_MASK },
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{ PHY_ID_LAN8841, MICREL_PHY_ID_MASK },
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