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drm/edid: Split deep color modes between RGB and YUV444
The current code assumes that the RGB444 and YUV444 formats are the
same, but the HDMI 2.0 specification states that:
The three DC_XXbit bits above only indicate support for RGB 4:4:4 at
that pixel size. Support for YCBCR 4:4:4 in Deep Color modes is
indicated with the DC_Y444 bit. If DC_Y444 is set, then YCBCR 4:4:4
is supported for all modes indicated by the DC_XXbit flags.
So if we have YUV444 support and any DC_XXbit flag set but the DC_Y444
flag isn't, we'll assume that we support that deep colour mode for
YUV444 which breaks the specification.
In order to fix this, let's split the edid_hdmi_dc_modes field in struct
drm_display_info into two fields, one for RGB444 and one for YUV444.
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Fixes: d0c94692e0
("drm/edid: Parse and handle HDMI deep color modes.")
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220120151625.594595-4-maxime@cerno.tech
This commit is contained in:
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@ -175,7 +175,7 @@ int amdgpu_connector_get_monitor_bpc(struct drm_connector *connector)
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/* Check if bpc is within clock limit. Try to degrade gracefully otherwise */
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if ((bpc == 12) && (mode_clock * 3/2 > max_tmds_clock)) {
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if ((connector->display_info.edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_30) &&
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if ((connector->display_info.edid_hdmi_rgb444_dc_modes & DRM_EDID_HDMI_DC_30) &&
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(mode_clock * 5/4 <= max_tmds_clock))
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bpc = 10;
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else
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@ -5086,21 +5086,21 @@ static void drm_parse_hdmi_deep_color_info(struct drm_connector *connector,
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if (hdmi[6] & DRM_EDID_HDMI_DC_30) {
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dc_bpc = 10;
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info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_30;
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info->edid_hdmi_rgb444_dc_modes |= DRM_EDID_HDMI_DC_30;
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DRM_DEBUG("%s: HDMI sink does deep color 30.\n",
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connector->name);
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}
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if (hdmi[6] & DRM_EDID_HDMI_DC_36) {
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dc_bpc = 12;
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info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_36;
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info->edid_hdmi_rgb444_dc_modes |= DRM_EDID_HDMI_DC_36;
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DRM_DEBUG("%s: HDMI sink does deep color 36.\n",
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connector->name);
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}
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if (hdmi[6] & DRM_EDID_HDMI_DC_48) {
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dc_bpc = 16;
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info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_48;
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info->edid_hdmi_rgb444_dc_modes |= DRM_EDID_HDMI_DC_48;
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DRM_DEBUG("%s: HDMI sink does deep color 48.\n",
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connector->name);
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}
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@ -5117,6 +5117,7 @@ static void drm_parse_hdmi_deep_color_info(struct drm_connector *connector,
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/* YCRCB444 is optional according to spec. */
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if (hdmi[6] & DRM_EDID_HDMI_DC_Y444) {
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info->edid_hdmi_ycbcr444_dc_modes = info->edid_hdmi_rgb444_dc_modes;
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DRM_DEBUG("%s: HDMI sink does YCRCB444 in deep color.\n",
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connector->name);
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}
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@ -1912,7 +1912,7 @@ static bool intel_hdmi_sink_bpc_possible(struct drm_connector *connector,
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if (ycbcr420_output)
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return hdmi->y420_dc_modes & DRM_EDID_YCBCR420_DC_36;
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else
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return info->edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_36;
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return info->edid_hdmi_rgb444_dc_modes & DRM_EDID_HDMI_DC_36;
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case 10:
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if (!has_hdmi_sink)
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return false;
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@ -1920,7 +1920,7 @@ static bool intel_hdmi_sink_bpc_possible(struct drm_connector *connector,
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if (ycbcr420_output)
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return hdmi->y420_dc_modes & DRM_EDID_YCBCR420_DC_30;
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else
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return info->edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_30;
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return info->edid_hdmi_rgb444_dc_modes & DRM_EDID_HDMI_DC_30;
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case 8:
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return true;
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default:
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@ -204,7 +204,7 @@ int radeon_get_monitor_bpc(struct drm_connector *connector)
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/* Check if bpc is within clock limit. Try to degrade gracefully otherwise */
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if ((bpc == 12) && (mode_clock * 3/2 > max_tmds_clock)) {
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if ((connector->display_info.edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_30) &&
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if ((connector->display_info.edid_hdmi_rgb444_dc_modes & DRM_EDID_HDMI_DC_30) &&
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(mode_clock * 5/4 <= max_tmds_clock))
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bpc = 10;
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else
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@ -592,10 +592,16 @@ struct drm_display_info {
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bool rgb_quant_range_selectable;
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/**
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* @edid_hdmi_dc_modes: Mask of supported hdmi deep color modes. Even
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* more stuff redundant with @bus_formats.
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* @edid_hdmi_dc_rgb444_modes: Mask of supported hdmi deep color modes
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* in RGB 4:4:4. Even more stuff redundant with @bus_formats.
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*/
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u8 edid_hdmi_dc_modes;
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u8 edid_hdmi_rgb444_dc_modes;
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/**
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* @edid_hdmi_dc_ycbcr444_modes: Mask of supported hdmi deep color
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* modes in YCbCr 4:4:4. Even more stuff redundant with @bus_formats.
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*/
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u8 edid_hdmi_ycbcr444_dc_modes;
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/**
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* @cea_rev: CEA revision of the HDMI sink.
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