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arm64: dts: qcom: align DWC3 USB interrupts with DT schema
Align order of interrupts with Qualcomm DWC3 USB DT schema. No functional impact expected. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220504131923.214367-14-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -2934,11 +2934,13 @@
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assigned-clock-rates = <19200000>, <200000000>;
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interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
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<&pdc 14 IRQ_TYPE_EDGE_BOTH>,
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<&pdc 17 IRQ_TYPE_EDGE_BOTH>,
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<&pdc 15 IRQ_TYPE_EDGE_BOTH>,
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<&pdc 17 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "hs_phy_irq", "dp_hs_phy_irq",
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"dm_hs_phy_irq", "ss_phy_irq";
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<&pdc 14 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "hs_phy_irq",
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"ss_phy_irq",
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"dm_hs_phy_irq",
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"dp_hs_phy_irq";
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power-domains = <&gcc GCC_USB30_PRIM_GDSC>;
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@ -1462,11 +1462,13 @@
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assigned-clock-rates = <19200000>, <200000000>;
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interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
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<&pdc 14 IRQ_TYPE_EDGE_BOTH>,
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<&pdc 17 IRQ_TYPE_LEVEL_HIGH>,
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<&pdc 15 IRQ_TYPE_EDGE_BOTH>,
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<&pdc 17 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "hs_phy_irq", "dp_hs_phy_irq",
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"dm_hs_phy_irq", "ss_phy_irq";
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<&pdc 14 IRQ_TYPE_EDGE_BOTH>;
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interrupt-names = "hs_phy_irq",
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"ss_phy_irq",
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"dm_hs_phy_irq",
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"dp_hs_phy_irq";
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power-domains = <&gcc USB30_PRIM_GDSC>;
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