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ARM: 6064/1: pmu: register IRQs at runtime
The current PMU infrastructure for ARM requires that the IRQs for the PMU device are fixed at compile time and are selected based on the ARCH_ or MACH_ flags. This has the disadvantage of tying the Kernel down to a particular board as far as profiling is concerned. This patch replaces the compile-time IRQ registration with a runtime mechanism which allows the IRQs to be registered with the framework as a platform_device. A further advantage of this change is that there is scope for registering different types of performance counters in the future by changing the id of the platform_device and attaching different resources to it. Acked-by: Jamie Iles <jamie.iles@picochip.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -19,31 +19,26 @@ enum arm_pmu_type {
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#ifdef CONFIG_CPU_HAS_PMU
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struct pmu_irqs {
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const int *irqs;
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int num_irqs;
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};
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/**
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* reserve_pmu() - reserve the hardware performance counters
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*
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* Reserve the hardware performance counters in the system for exclusive use.
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* The 'struct pmu_irqs' for the system is returned on success, ERR_PTR()
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* The platform_device for the system is returned on success, ERR_PTR()
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* encoded error on failure.
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*/
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extern const struct pmu_irqs *
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reserve_pmu(void);
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extern struct platform_device *
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reserve_pmu(enum arm_pmu_type device);
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/**
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* release_pmu() - Relinquish control of the performance counters
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*
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* Release the performance counters and allow someone else to use them.
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* Callers must have disabled the counters and released IRQs before calling
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* this. The 'struct pmu_irqs' returned from reserve_pmu() must be passed as
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* this. The platform_device returned from reserve_pmu() must be passed as
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* a cookie.
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*/
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extern int
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release_pmu(const struct pmu_irqs *irqs);
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release_pmu(struct platform_device *pdev);
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/**
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* init_pmu() - Initialise the PMU.
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@ -53,24 +48,26 @@ release_pmu(const struct pmu_irqs *irqs);
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* the actual hardware initialisation.
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*/
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extern int
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init_pmu(void);
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init_pmu(enum arm_pmu_type device);
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#else /* CONFIG_CPU_HAS_PMU */
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static inline const struct pmu_irqs *
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reserve_pmu(void)
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#include <linux/err.h>
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static inline struct platform_device *
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reserve_pmu(enum arm_pmu_type device)
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{
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return ERR_PTR(-ENODEV);
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}
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static inline int
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release_pmu(const struct pmu_irqs *irqs)
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release_pmu(struct platform_device *pdev)
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{
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return -ENODEV;
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}
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static inline int
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init_pmu(void)
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init_pmu(enum arm_pmu_type device)
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{
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return -ENODEV;
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}
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@ -17,6 +17,7 @@
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/perf_event.h>
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#include <linux/platform_device.h>
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#include <linux/spinlock.h>
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#include <linux/uaccess.h>
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@ -26,7 +27,7 @@
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#include <asm/pmu.h>
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#include <asm/stacktrace.h>
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static const struct pmu_irqs *pmu_irqs;
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static struct platform_device *pmu_device;
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/*
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* Hardware lock to serialize accesses to PMU registers. Needed for the
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@ -314,38 +315,44 @@ validate_group(struct perf_event *event)
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static int
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armpmu_reserve_hardware(void)
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{
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int i;
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int err;
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int i, err = -ENODEV, irq;
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pmu_irqs = reserve_pmu();
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if (IS_ERR(pmu_irqs)) {
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pmu_device = reserve_pmu(ARM_PMU_DEVICE_CPU);
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if (IS_ERR(pmu_device)) {
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pr_warning("unable to reserve pmu\n");
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return PTR_ERR(pmu_irqs);
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return PTR_ERR(pmu_device);
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}
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init_pmu();
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init_pmu(ARM_PMU_DEVICE_CPU);
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if (pmu_irqs->num_irqs < 1) {
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if (pmu_device->num_resources < 1) {
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pr_err("no irqs for PMUs defined\n");
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return -ENODEV;
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}
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for (i = 0; i < pmu_irqs->num_irqs; ++i) {
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err = request_irq(pmu_irqs->irqs[i], armpmu->handle_irq,
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for (i = 0; i < pmu_device->num_resources; ++i) {
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irq = platform_get_irq(pmu_device, i);
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if (irq < 0)
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continue;
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err = request_irq(irq, armpmu->handle_irq,
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IRQF_DISABLED | IRQF_NOBALANCING,
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"armpmu", NULL);
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if (err) {
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pr_warning("unable to request IRQ%d for ARM "
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"perf counters\n", pmu_irqs->irqs[i]);
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pr_warning("unable to request IRQ%d for ARM perf "
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"counters\n", irq);
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break;
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}
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}
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if (err) {
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for (i = i - 1; i >= 0; --i)
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free_irq(pmu_irqs->irqs[i], NULL);
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release_pmu(pmu_irqs);
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pmu_irqs = NULL;
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for (i = i - 1; i >= 0; --i) {
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irq = platform_get_irq(pmu_device, i);
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if (irq >= 0)
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free_irq(irq, NULL);
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}
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release_pmu(pmu_device);
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pmu_device = NULL;
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}
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return err;
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@ -354,14 +361,17 @@ armpmu_reserve_hardware(void)
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static void
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armpmu_release_hardware(void)
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{
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int i;
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int i, irq;
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for (i = pmu_irqs->num_irqs - 1; i >= 0; --i)
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free_irq(pmu_irqs->irqs[i], NULL);
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for (i = pmu_device->num_resources - 1; i >= 0; --i) {
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irq = platform_get_irq(pmu_device, i);
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if (irq >= 0)
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free_irq(irq, NULL);
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}
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armpmu->stop();
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release_pmu(pmu_irqs);
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pmu_irqs = NULL;
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release_pmu(pmu_device);
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pmu_device = NULL;
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}
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static atomic_t active_events = ATOMIC_INIT(0);
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@ -2,6 +2,7 @@
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* linux/arch/arm/kernel/pmu.c
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*
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* Copyright (C) 2009 picoChip Designs Ltd, Jamie Iles
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* Copyright (C) 2010 ARM Ltd, Will Deacon
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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@ -9,65 +10,78 @@
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*
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*/
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#define pr_fmt(fmt) "PMU: " fmt
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#include <linux/cpumask.h>
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#include <linux/err.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <asm/pmu.h>
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/*
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* Define the IRQs for the system. We could use something like a platform
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* device but that seems fairly heavyweight for this. Also, the performance
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* counters can't be removed or hotplugged.
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*
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* Ordering is important: init_pmu() will use the ordering to set the affinity
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* to the corresponding core. e.g. the first interrupt will go to cpu 0, the
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* second goes to cpu 1 etc.
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*/
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static const int irqs[] = {
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#if defined(CONFIG_ARCH_OMAP2)
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3,
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#elif defined(CONFIG_ARCH_BCMRING)
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IRQ_PMUIRQ,
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#elif defined(CONFIG_MACH_REALVIEW_EB)
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IRQ_EB11MP_PMU_CPU0,
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IRQ_EB11MP_PMU_CPU1,
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IRQ_EB11MP_PMU_CPU2,
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IRQ_EB11MP_PMU_CPU3,
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#elif defined(CONFIG_ARCH_OMAP3)
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INT_34XX_BENCH_MPU_EMUL,
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#elif defined(CONFIG_ARCH_IOP32X)
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IRQ_IOP32X_CORE_PMU,
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#elif defined(CONFIG_ARCH_IOP33X)
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IRQ_IOP33X_CORE_PMU,
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#elif defined(CONFIG_ARCH_PXA)
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IRQ_PMU,
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#endif
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};
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static const struct pmu_irqs pmu_irqs = {
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.irqs = irqs,
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.num_irqs = ARRAY_SIZE(irqs),
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};
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static volatile long pmu_lock;
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const struct pmu_irqs *
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reserve_pmu(void)
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static struct platform_device *pmu_devices[ARM_NUM_PMU_DEVICES];
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static int __devinit pmu_device_probe(struct platform_device *pdev)
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{
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return test_and_set_bit_lock(0, &pmu_lock) ? ERR_PTR(-EBUSY) :
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&pmu_irqs;
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if (pdev->id < 0 || pdev->id >= ARM_NUM_PMU_DEVICES) {
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pr_warning("received registration request for unknown "
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"device %d\n", pdev->id);
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return -EINVAL;
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}
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if (pmu_devices[pdev->id])
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pr_warning("registering new PMU device type %d overwrites "
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"previous registration!\n", pdev->id);
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else
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pr_info("registered new PMU device of type %d\n",
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pdev->id);
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pmu_devices[pdev->id] = pdev;
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return 0;
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}
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static struct platform_driver pmu_driver = {
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.driver = {
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.name = "arm-pmu",
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},
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.probe = pmu_device_probe,
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};
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static int __init register_pmu_driver(void)
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{
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return platform_driver_register(&pmu_driver);
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}
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device_initcall(register_pmu_driver);
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struct platform_device *
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reserve_pmu(enum arm_pmu_type device)
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{
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struct platform_device *pdev;
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if (test_and_set_bit_lock(device, &pmu_lock)) {
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pdev = ERR_PTR(-EBUSY);
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} else if (pmu_devices[device] == NULL) {
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clear_bit_unlock(device, &pmu_lock);
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pdev = ERR_PTR(-ENODEV);
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} else {
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pdev = pmu_devices[device];
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}
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return pdev;
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}
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EXPORT_SYMBOL_GPL(reserve_pmu);
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int
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release_pmu(const struct pmu_irqs *irqs)
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release_pmu(struct platform_device *pdev)
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{
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if (WARN_ON(irqs != &pmu_irqs))
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if (WARN_ON(pdev != pmu_devices[pdev->id]))
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return -EINVAL;
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clear_bit_unlock(0, &pmu_lock);
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clear_bit_unlock(pdev->id, &pmu_lock);
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return 0;
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}
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EXPORT_SYMBOL_GPL(release_pmu);
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@ -87,17 +101,42 @@ set_irq_affinity(int irq,
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#endif
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}
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int
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init_pmu(void)
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static int
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init_cpu_pmu(void)
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{
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int i, err = 0;
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struct platform_device *pdev = pmu_devices[ARM_PMU_DEVICE_CPU];
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for (i = 0; i < pmu_irqs.num_irqs; ++i) {
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err = set_irq_affinity(pmu_irqs.irqs[i], i);
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if (!pdev) {
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err = -ENODEV;
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goto out;
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}
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for (i = 0; i < pdev->num_resources; ++i) {
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err = set_irq_affinity(platform_get_irq(pdev, i), i);
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if (err)
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break;
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}
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out:
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return err;
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}
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int
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init_pmu(enum arm_pmu_type device)
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{
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int err = 0;
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switch (device) {
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case ARM_PMU_DEVICE_CPU:
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err = init_cpu_pmu();
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break;
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default:
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pr_warning("attempt to initialise unknown device %d\n",
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device);
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err = -EINVAL;
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}
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return err;
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}
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EXPORT_SYMBOL_GPL(init_pmu);
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