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clk: sprd: Composite driver support offset config
The composite interface support the offset configuration, which is used to support mux and div in different registers. Because some sprd projects, the divider has different addresses from mux for one composite clk. Signed-off-by: Zhifeng Tang <zhifeng.tang@unisoc.com> Reviewed-by: Chunyan Zhang <zhang.lyra@gmail.com> Link: https://lore.kernel.org/r/20230913115211.11512-1-zhifeng.tang@unisoc.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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@ -19,24 +19,24 @@ struct sprd_comp {
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};
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#define SPRD_COMP_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, _table, \
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_mshift, _mwidth, _dshift, _dwidth, \
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_flags, _fn) \
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_mshift, _mwidth, _doffset, _dshift, \
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_dwidth, _flags, _fn) \
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struct sprd_comp _struct = { \
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.mux = _SPRD_MUX_CLK(_mshift, _mwidth, _table), \
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.div = _SPRD_DIV_CLK(_dshift, _dwidth), \
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.div = _SPRD_DIV_CLK(_doffset, _dshift, _dwidth), \
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.common = { \
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.regmap = NULL, \
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.reg = _reg, \
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.hw.init = _fn(_name, _parent, \
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&sprd_comp_ops, _flags), \
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} \
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} \
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}
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#define SPRD_COMP_CLK_TABLE(_struct, _name, _parent, _reg, _table, \
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_mshift, _mwidth, _dshift, _dwidth, _flags) \
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SPRD_COMP_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, _table, \
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_mshift, _mwidth, _dshift, _dwidth, \
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_flags, CLK_HW_INIT_PARENTS)
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_mshift, _mwidth, 0x0, _dshift, \
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_dwidth, _flags, CLK_HW_INIT_PARENTS)
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#define SPRD_COMP_CLK(_struct, _name, _parent, _reg, _mshift, \
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_mwidth, _dshift, _dwidth, _flags) \
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@ -47,15 +47,33 @@ struct sprd_comp {
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_mshift, _mwidth, _dshift, \
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_dwidth, _flags) \
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SPRD_COMP_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, _table, \
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_mshift, _mwidth, _dshift, _dwidth, \
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_flags, CLK_HW_INIT_PARENTS_DATA)
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_mshift, _mwidth, 0x0, _dshift, \
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_dwidth, _flags, \
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CLK_HW_INIT_PARENTS_DATA)
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#define SPRD_COMP_CLK_DATA(_struct, _name, _parent, _reg, _mshift, \
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_mwidth, _dshift, _dwidth, _flags) \
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SPRD_COMP_CLK_DATA_TABLE(_struct, _name, _parent, _reg, NULL, \
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SPRD_COMP_CLK_DATA_TABLE(_struct, _name, _parent, _reg, NULL, \
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_mshift, _mwidth, _dshift, _dwidth, \
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_flags)
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#define SPRD_COMP_CLK_DATA_TABLE_OFFSET(_struct, _name, _parent, _reg, \
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_table, _mshift, _mwidth, \
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_doffset, _dshift, _dwidth, \
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_flags) \
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SPRD_COMP_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, _table, \
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_mshift, _mwidth, _doffset, _dshift, \
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_dwidth, _flags, \
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CLK_HW_INIT_PARENTS_DATA)
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#define SPRD_COMP_CLK_DATA_OFFSET(_struct, _name, _parent, _reg, \
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_mshift, _mwidth, _doffset, _dshift, \
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_dwidth, _flags) \
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SPRD_COMP_CLK_DATA_TABLE_OFFSET(_struct, _name, _parent, _reg, \
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NULL, _mshift, _mwidth, \
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_doffset, _dshift, _dwidth, \
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_flags)
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static inline struct sprd_comp *hw_to_sprd_comp(const struct clk_hw *hw)
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{
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struct sprd_clk_common *common = hw_to_sprd_clk_common(hw);
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@ -25,7 +25,7 @@ unsigned long sprd_div_helper_recalc_rate(struct sprd_clk_common *common,
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unsigned long val;
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unsigned int reg;
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regmap_read(common->regmap, common->reg, ®);
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regmap_read(common->regmap, common->reg + div->offset, ®);
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val = reg >> div->shift;
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val &= (1 << div->width) - 1;
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@ -53,10 +53,10 @@ int sprd_div_helper_set_rate(const struct sprd_clk_common *common,
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val = divider_get_val(rate, parent_rate, NULL,
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div->width, 0);
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regmap_read(common->regmap, common->reg, ®);
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regmap_read(common->regmap, common->reg + div->offset, ®);
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reg &= ~GENMASK(div->width + div->shift - 1, div->shift);
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regmap_write(common->regmap, common->reg,
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regmap_write(common->regmap, common->reg + div->offset,
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reg | (val << div->shift));
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return 0;
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@ -20,12 +20,14 @@
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* classes.
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*/
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struct sprd_div_internal {
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s32 offset;
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u8 shift;
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u8 width;
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};
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#define _SPRD_DIV_CLK(_shift, _width) \
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#define _SPRD_DIV_CLK(_offset, _shift, _width) \
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{ \
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.offset = _offset, \
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.shift = _shift, \
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.width = _width, \
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}
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@ -35,10 +37,10 @@ struct sprd_div {
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struct sprd_clk_common common;
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};
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#define SPRD_DIV_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, \
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#define SPRD_DIV_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, _offset, \
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_shift, _width, _flags, _fn) \
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struct sprd_div _struct = { \
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.div = _SPRD_DIV_CLK(_shift, _width), \
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.div = _SPRD_DIV_CLK(_offset, _shift, _width), \
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.common = { \
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.regmap = NULL, \
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.reg = _reg, \
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@ -49,12 +51,17 @@ struct sprd_div {
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#define SPRD_DIV_CLK(_struct, _name, _parent, _reg, \
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_shift, _width, _flags) \
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SPRD_DIV_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, \
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SPRD_DIV_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, 0x0, \
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_shift, _width, _flags, CLK_HW_INIT)
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#define SPRD_DIV_CLK_FW_NAME(_struct, _name, _parent, _reg, \
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_shift, _width, _flags) \
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SPRD_DIV_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, 0x0, \
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_shift, _width, _flags, CLK_HW_INIT_FW_NAME)
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#define SPRD_DIV_CLK_HW(_struct, _name, _parent, _reg, \
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_shift, _width, _flags) \
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SPRD_DIV_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, \
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SPRD_DIV_CLK_HW_INIT_FN(_struct, _name, _parent, _reg, 0x0, \
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_shift, _width, _flags, CLK_HW_INIT_HW)
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static inline struct sprd_div *hw_to_sprd_div(const struct clk_hw *hw)
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