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i.MX fixes for 6.6:

Browse Source 
- A couple of i.MX8MP device tree changes from Adam Ford to fix clock
   configuration regressions caused by 16c9845248 ("arm64: dts: imx8mp:
   don't initialize audio clocks from CCM node").
 - Fix pmic-irq-hog GPIO line in imx93-tqma9352 device tree.
 - Fix a mmemory leak with error handling path of imx_dsp_setup_channels()
   in imx-dsp driver.
 - Fix HDMI node in imx8mm-evk device tree.
 - Add missing clock enable functionality for imx8mm_soc_uid() function
   in soc-imx8m driver.
 - Add missing imx8mm-prt8mm.dtb build target.
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Merge tag 'imx-fixes-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 6.6:

- A couple of i.MX8MP device tree changes from Adam Ford to fix clock
  configuration regressions caused by 16c9845248 ("arm64: dts: imx8mp:
  don't initialize audio clocks from CCM node").
- Fix pmic-irq-hog GPIO line in imx93-tqma9352 device tree.
- Fix a mmemory leak with error handling path of imx_dsp_setup_channels()
  in imx-dsp driver.
- Fix HDMI node in imx8mm-evk device tree.
- Add missing clock enable functionality for imx8mm_soc_uid() function
  in soc-imx8m driver.
- Add missing imx8mm-prt8mm.dtb build target.

* tag 'imx-fixes-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: dts: imx: Add imx8mm-prt8mm.dtb to build
  arm64: dts: imx8mm-evk: Fix hdmi@3d node
  soc: imx8m: Enable OCOTP clock for imx8mm before reading registers
  arm64: dts: imx8mp-beacon-kit: Fix audio_pll2 clock
  arm64: dts: imx8mp: Fix SDMA2/3 clocks
  arm64: dts: freescale: tqma9352: Fix gpio hog
  firmware: imx-dsp: Fix an error handling path in imx_dsp_setup_channels()

Link: https://lore.kernel.org/r/20230926123710.GT7231@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2023-09-27 11:02:51 +02:00
commit 48519d648b
7 changed files with 42 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm64/boot/dts/freescale/Makefile
View File

@ -66,6 +66,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-mx8menlo.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-nitrogen-r2.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mm-nitrogen-r2.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-phg.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mm-phg.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-phyboard-polis-rdk.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mm-phyboard-polis-rdk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-prt8mm.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-tqma8mqml-mba8mx.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mm-tqma8mqml-mba8mx.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-var-som-symphony.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mm-var-som-symphony.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw71xx-0x.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw71xx-0x.dtb

32
arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
View File

@ -26,7 +26,7 @@
port { port {
hdmi_connector_in: endpoint { hdmi_connector_in: endpoint {
remote-endpoint = <&adv7533_out>; remote-endpoint = <&adv7535_out>;
}; };
}; };
}; };
@ -72,6 +72,13 @@
enable-active-high; enable-active-high;
}; };
reg_vddext_3v3: regulator-vddext-3v3 {
compatible = "regulator-fixed";
regulator-name = "VDDEXT_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
backlight: backlight { backlight: backlight {
compatible = "pwm-backlight"; compatible = "pwm-backlight";
pwms = <&pwm1 0 5000000 0>; pwms = <&pwm1 0 5000000 0>;
@ -317,15 +324,16 @@
hdmi@3d { hdmi@3d {
compatible = "adi,adv7535"; compatible = "adi,adv7535";
reg = <0x3d>, <0x3c>, <0x3e>, <0x3f>; reg = <0x3d>;
reg-names = "main", "cec", "edid", "packet"; interrupt-parent = <&gpio1>;
interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
adi,dsi-lanes = <4>; adi,dsi-lanes = <4>;
avdd-supply = <&buck5_reg>;
adi,input-depth = <8>; dvdd-supply = <&buck5_reg>;
adi,input-colorspace = "rgb"; pvdd-supply = <&buck5_reg>;
adi,input-clock = "1x"; a2vdd-supply = <&buck5_reg>;
adi,input-style = <1>; v3p3-supply = <&reg_vddext_3v3>;
adi,input-justification = "evenly"; v1p2-supply = <&buck5_reg>;
ports { ports {
#address-cells = <1>; #address-cells = <1>;
@ -334,7 +342,7 @@
port@0 { port@0 {
reg = <0>; reg = <0>;
adv7533_in: endpoint { adv7535_in: endpoint {
remote-endpoint = <&dsi_out>; remote-endpoint = <&dsi_out>;
}; };
}; };
@ -342,7 +350,7 @@
port@1 { port@1 {
reg = <1>; reg = <1>;
adv7533_out: endpoint { adv7535_out: endpoint {
remote-endpoint = <&hdmi_connector_in>; remote-endpoint = <&hdmi_connector_in>;
}; };
}; };
@ -448,7 +456,7 @@
reg = <1>; reg = <1>;
dsi_out: endpoint { dsi_out: endpoint {
remote-endpoint = <&adv7533_in>; remote-endpoint = <&adv7535_in>;
data-lanes = <1 2 3 4>; data-lanes = <1 2 3 4>;
}; };
}; };

5
arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts
View File

@ -381,9 +381,10 @@
&sai3 { &sai3 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai3>; pinctrl-0 = <&pinctrl_sai3>;
assigned-clocks = <&clk IMX8MP_CLK_SAI3>; assigned-clocks = <&clk IMX8MP_CLK_SAI3>,
<&clk IMX8MP_AUDIO_PLL2> ;
assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>; assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>;
assigned-clock-rates = <12288000>; assigned-clock-rates = <12288000>, <361267200>;
fsl,sai-mclk-direction-output; fsl,sai-mclk-direction-output;
status = "okay"; status = "okay";
}; };

6
arch/arm64/boot/dts/freescale/imx8mp.dtsi
View File

@ -790,6 +790,12 @@
reg = <IMX8MP_POWER_DOMAIN_AUDIOMIX>; reg = <IMX8MP_POWER_DOMAIN_AUDIOMIX>;
clocks = <&clk IMX8MP_CLK_AUDIO_ROOT>, clocks = <&clk IMX8MP_CLK_AUDIO_ROOT>,
<&clk IMX8MP_CLK_AUDIO_AXI>; <&clk IMX8MP_CLK_AUDIO_AXI>;
assigned-clocks = <&clk IMX8MP_CLK_AUDIO_AHB>,
<&clk IMX8MP_CLK_AUDIO_AXI_SRC>;
assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
<&clk IMX8MP_SYS_PLL1_800M>;
assigned-clock-rates = <400000000>,
<600000000>;
}; };
pgc_gpu2d: power-domain@6 { pgc_gpu2d: power-domain@6 {

2
arch/arm64/boot/dts/freescale/imx93-tqma9352.dtsi
View File

@ -81,7 +81,7 @@
&gpio1 { &gpio1 {
pmic-irq-hog { pmic-irq-hog {
gpio-hog; gpio-hog;
gpios = <2 GPIO_ACTIVE_LOW>; gpios = <3 GPIO_ACTIVE_LOW>;
input; input;
line-name = "PMIC_IRQ#"; line-name = "PMIC_IRQ#";
}; };

1
drivers/firmware/imx/imx-dsp.c
View File

@ -114,6 +114,7 @@ static int imx_dsp_setup_channels(struct imx_dsp_ipc *dsp_ipc)
dsp_chan->idx = i % 2; dsp_chan->idx = i % 2;
dsp_chan->ch = mbox_request_channel_byname(cl, chan_name); dsp_chan->ch = mbox_request_channel_byname(cl, chan_name);
if (IS_ERR(dsp_chan->ch)) { if (IS_ERR(dsp_chan->ch)) {
kfree(dsp_chan->name);
ret = PTR_ERR(dsp_chan->ch); ret = PTR_ERR(dsp_chan->ch);
if (ret != -EPROBE_DEFER) if (ret != -EPROBE_DEFER)
dev_err(dev, "Failed to request mbox chan %s ret %d\n", dev_err(dev, "Failed to request mbox chan %s ret %d\n",

10
drivers/soc/imx/soc-imx8m.c
View File

@ -100,6 +100,7 @@ static void __init imx8mm_soc_uid(void)
{ {
void __iomem *ocotp_base; void __iomem *ocotp_base;
struct device_node *np; struct device_node *np;
struct clk *clk;
u32 offset = of_machine_is_compatible("fsl,imx8mp") ? u32 offset = of_machine_is_compatible("fsl,imx8mp") ?
IMX8MP_OCOTP_UID_OFFSET : 0; IMX8MP_OCOTP_UID_OFFSET : 0;
@ -109,11 +110,20 @@ static void __init imx8mm_soc_uid(void)
ocotp_base = of_iomap(np, 0); ocotp_base = of_iomap(np, 0);
WARN_ON(!ocotp_base); WARN_ON(!ocotp_base);
clk = of_clk_get_by_name(np, NULL);
if (IS_ERR(clk)) {
WARN_ON(IS_ERR(clk));
return;
}
clk_prepare_enable(clk);
soc_uid = readl_relaxed(ocotp_base + OCOTP_UID_HIGH + offset); soc_uid = readl_relaxed(ocotp_base + OCOTP_UID_HIGH + offset);
soc_uid <<= 32; soc_uid <<= 32;
soc_uid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW + offset); soc_uid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW + offset);
clk_disable_unprepare(clk);
clk_put(clk);
iounmap(ocotp_base); iounmap(ocotp_base);
of_node_put(np); of_node_put(np);
} }