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cxgb4: add Tx and Rx path for ETHOFLD traffic
Implement Tx path for traffic flowing through software EOSW_TXQ and EOHW_TXQ. Since multiple EOSW_TXQ can post packets to a single EOHW_TXQ, protect the hardware queue with necessary spinlock. Also, move common code used to generate TSO work request to a common function. Implement Rx path to handle Tx completions for successfully transmitted packets. Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Rahul Lakkireddy
David S. Miller
parent
2d0cb84dd9
commit
4846d5330d
@ -805,6 +805,7 @@ struct sge_uld_txq_info {
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enum sge_eosw_state {
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CXGB4_EO_STATE_CLOSED = 0, /* Not ready to accept traffic */
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CXGB4_EO_STATE_ACTIVE, /* Ready to accept traffic */
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};
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struct sge_eosw_desc {
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@ -1951,6 +1952,8 @@ void free_tx_desc(struct adapter *adap, struct sge_txq *q,
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void cxgb4_eosw_txq_free_desc(struct adapter *adap, struct sge_eosw_txq *txq,
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u32 ndesc);
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void cxgb4_ethofld_restart(unsigned long data);
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int cxgb4_ethofld_rx_handler(struct sge_rspq *q, const __be64 *rsp,
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const struct pkt_gl *si);
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void free_txq(struct adapter *adap, struct sge_txq *q);
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void cxgb4_reclaim_completed_tx(struct adapter *adap,
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struct sge_txq *q, bool unmap);
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@ -174,7 +174,8 @@ static int cxgb4_mqprio_alloc_hw_resources(struct net_device *dev)
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eorxq->fl.size = CXGB4_EOHW_FLQ_DEFAULT_DESC_NUM;
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ret = t4_sge_alloc_rxq(adap, &eorxq->rspq, false,
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dev, msix, &eorxq->fl, NULL,
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dev, msix, &eorxq->fl,
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cxgb4_ethofld_rx_handler,
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NULL, 0);
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if (ret)
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goto out_free_queues;
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@ -55,6 +55,7 @@
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#include "t4fw_api.h"
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#include "cxgb4_ptp.h"
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#include "cxgb4_uld.h"
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#include "cxgb4_tc_mqprio.h"
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/*
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* Rx buffer size. We use largish buffers if possible but settle for single
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@ -1309,6 +1310,35 @@ static inline void t6_fill_tnl_lso(struct sk_buff *skb,
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tnl_lso->EthLenOffset_Size = htonl(CPL_TX_TNL_LSO_SIZE_V(skb->len));
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}
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static inline void *write_tso_wr(struct adapter *adap, struct sk_buff *skb,
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struct cpl_tx_pkt_lso_core *lso)
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{
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int eth_xtra_len = skb_network_offset(skb) - ETH_HLEN;
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int l3hdr_len = skb_network_header_len(skb);
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const struct skb_shared_info *ssi;
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bool ipv6 = false;
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ssi = skb_shinfo(skb);
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if (ssi->gso_type & SKB_GSO_TCPV6)
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ipv6 = true;
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lso->lso_ctrl = htonl(LSO_OPCODE_V(CPL_TX_PKT_LSO) |
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LSO_FIRST_SLICE_F | LSO_LAST_SLICE_F |
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LSO_IPV6_V(ipv6) |
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LSO_ETHHDR_LEN_V(eth_xtra_len / 4) |
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LSO_IPHDR_LEN_V(l3hdr_len / 4) |
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LSO_TCPHDR_LEN_V(tcp_hdr(skb)->doff));
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lso->ipid_ofst = htons(0);
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lso->mss = htons(ssi->gso_size);
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lso->seqno_offset = htonl(0);
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if (is_t4(adap->params.chip))
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lso->len = htonl(skb->len);
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else
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lso->len = htonl(LSO_T5_XFER_SIZE_V(skb->len));
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return (void *)(lso + 1);
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}
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/**
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* t4_sge_eth_txq_egress_update - handle Ethernet TX Queue update
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* @adap: the adapter
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@ -1498,9 +1528,6 @@ static netdev_tx_t cxgb4_eth_xmit(struct sk_buff *skb, struct net_device *dev)
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len += sizeof(*cpl);
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if (ssi->gso_size) {
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struct cpl_tx_pkt_lso_core *lso = (void *)(wr + 1);
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bool v6 = (ssi->gso_type & SKB_GSO_TCPV6) != 0;
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int l3hdr_len = skb_network_header_len(skb);
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int eth_xtra_len = skb_network_offset(skb) - ETH_HLEN;
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struct cpl_tx_tnl_lso *tnl_lso = (void *)(wr + 1);
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if (tnl_type)
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@ -1527,30 +1554,8 @@ static netdev_tx_t cxgb4_eth_xmit(struct sk_buff *skb, struct net_device *dev)
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if (skb->ip_summed == CHECKSUM_PARTIAL)
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cntrl = hwcsum(adap->params.chip, skb);
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} else {
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lso->lso_ctrl = htonl(LSO_OPCODE_V(CPL_TX_PKT_LSO) |
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LSO_FIRST_SLICE_F | LSO_LAST_SLICE_F |
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LSO_IPV6_V(v6) |
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LSO_ETHHDR_LEN_V(eth_xtra_len / 4) |
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LSO_IPHDR_LEN_V(l3hdr_len / 4) |
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LSO_TCPHDR_LEN_V(tcp_hdr(skb)->doff));
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lso->ipid_ofst = htons(0);
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lso->mss = htons(ssi->gso_size);
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lso->seqno_offset = htonl(0);
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if (is_t4(adap->params.chip))
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lso->len = htonl(skb->len);
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else
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lso->len = htonl(LSO_T5_XFER_SIZE_V(skb->len));
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cpl = (void *)(lso + 1);
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if (CHELSIO_CHIP_VERSION(adap->params.chip)
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<= CHELSIO_T5)
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cntrl = TXPKT_ETHHDR_LEN_V(eth_xtra_len);
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else
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cntrl = T6_TXPKT_ETHHDR_LEN_V(eth_xtra_len);
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cntrl |= TXPKT_CSUM_TYPE_V(v6 ?
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TX_CSUM_TCPIP6 : TX_CSUM_TCPIP) |
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TXPKT_IPHDR_LEN_V(l3hdr_len);
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cpl = write_tso_wr(adap, skb, lso);
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cntrl = hwcsum(adap->params.chip, skb);
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}
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sgl = (u64 *)(cpl + 1); /* sgl start here */
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if (unlikely((u8 *)sgl >= (u8 *)q->q.stat)) {
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@ -1996,6 +2001,26 @@ out_free:
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return NETDEV_TX_OK;
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}
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/**
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* reclaim_completed_tx_imm - reclaim completed control-queue Tx descs
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* @q: the SGE control Tx queue
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*
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* This is a variant of cxgb4_reclaim_completed_tx() that is used
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* for Tx queues that send only immediate data (presently just
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* the control queues) and thus do not have any sk_buffs to release.
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*/
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static inline void reclaim_completed_tx_imm(struct sge_txq *q)
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{
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int hw_cidx = ntohs(READ_ONCE(q->stat->cidx));
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int reclaim = hw_cidx - q->cidx;
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if (reclaim < 0)
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reclaim += q->size;
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q->in_use -= reclaim;
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q->cidx = hw_cidx;
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}
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static inline void eosw_txq_advance_index(u32 *idx, u32 n, u32 max)
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{
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u32 val = *idx + n;
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@ -2027,15 +2052,263 @@ void cxgb4_eosw_txq_free_desc(struct adapter *adap,
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}
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}
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static inline void eosw_txq_advance(struct sge_eosw_txq *eosw_txq, u32 n)
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{
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eosw_txq_advance_index(&eosw_txq->pidx, n, eosw_txq->ndesc);
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eosw_txq->inuse += n;
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}
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static inline int eosw_txq_enqueue(struct sge_eosw_txq *eosw_txq,
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struct sk_buff *skb)
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{
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if (eosw_txq->inuse == eosw_txq->ndesc)
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return -ENOMEM;
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eosw_txq->desc[eosw_txq->pidx].skb = skb;
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return 0;
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}
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static inline struct sk_buff *eosw_txq_peek(struct sge_eosw_txq *eosw_txq)
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{
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return eosw_txq->desc[eosw_txq->last_pidx].skb;
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}
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static inline u8 ethofld_calc_tx_flits(struct adapter *adap,
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struct sk_buff *skb, u32 hdr_len)
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{
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u8 flits, nsgl = 0;
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u32 wrlen;
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wrlen = sizeof(struct fw_eth_tx_eo_wr) + sizeof(struct cpl_tx_pkt_core);
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if (skb_shinfo(skb)->gso_size)
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wrlen += sizeof(struct cpl_tx_pkt_lso_core);
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wrlen += roundup(hdr_len, 16);
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/* Packet headers + WR + CPLs */
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flits = DIV_ROUND_UP(wrlen, 8);
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if (skb_shinfo(skb)->nr_frags > 0)
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nsgl = sgl_len(skb_shinfo(skb)->nr_frags);
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else if (skb->len - hdr_len)
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nsgl = sgl_len(1);
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return flits + nsgl;
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}
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static inline void *write_eo_wr(struct adapter *adap,
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struct sge_eosw_txq *eosw_txq,
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struct sk_buff *skb, struct fw_eth_tx_eo_wr *wr,
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u32 hdr_len, u32 wrlen)
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{
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const struct skb_shared_info *ssi = skb_shinfo(skb);
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struct cpl_tx_pkt_core *cpl;
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u32 immd_len, wrlen16;
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bool compl = false;
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wrlen16 = DIV_ROUND_UP(wrlen, 16);
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immd_len = sizeof(struct cpl_tx_pkt_core);
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if (skb_shinfo(skb)->gso_size) {
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if (skb->encapsulation &&
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CHELSIO_CHIP_VERSION(adap->params.chip) > CHELSIO_T5)
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immd_len += sizeof(struct cpl_tx_tnl_lso);
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else
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immd_len += sizeof(struct cpl_tx_pkt_lso_core);
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}
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immd_len += hdr_len;
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if (!eosw_txq->ncompl ||
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eosw_txq->last_compl >= adap->params.ofldq_wr_cred / 2) {
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compl = true;
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eosw_txq->ncompl++;
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eosw_txq->last_compl = 0;
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}
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wr->op_immdlen = cpu_to_be32(FW_WR_OP_V(FW_ETH_TX_EO_WR) |
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FW_ETH_TX_EO_WR_IMMDLEN_V(immd_len) |
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FW_WR_COMPL_V(compl));
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wr->equiq_to_len16 = cpu_to_be32(FW_WR_LEN16_V(wrlen16) |
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FW_WR_FLOWID_V(eosw_txq->hwtid));
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wr->r3 = 0;
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wr->u.tcpseg.type = FW_ETH_TX_EO_TYPE_TCPSEG;
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wr->u.tcpseg.ethlen = skb_network_offset(skb);
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wr->u.tcpseg.iplen = cpu_to_be16(skb_network_header_len(skb));
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wr->u.tcpseg.tcplen = tcp_hdrlen(skb);
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wr->u.tcpseg.tsclk_tsoff = 0;
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wr->u.tcpseg.r4 = 0;
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wr->u.tcpseg.r5 = 0;
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wr->u.tcpseg.plen = cpu_to_be32(skb->len - hdr_len);
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if (ssi->gso_size) {
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struct cpl_tx_pkt_lso_core *lso = (void *)(wr + 1);
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wr->u.tcpseg.mss = cpu_to_be16(ssi->gso_size);
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cpl = write_tso_wr(adap, skb, lso);
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} else {
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wr->u.tcpseg.mss = cpu_to_be16(0xffff);
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cpl = (void *)(wr + 1);
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}
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eosw_txq->cred -= wrlen16;
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eosw_txq->last_compl += wrlen16;
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return cpl;
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}
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static void ethofld_hard_xmit(struct net_device *dev,
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struct sge_eosw_txq *eosw_txq)
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{
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struct port_info *pi = netdev2pinfo(dev);
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struct adapter *adap = netdev2adap(dev);
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u32 wrlen, wrlen16, hdr_len, data_len;
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u64 cntrl, *start, *end, *sgl;
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struct sge_eohw_txq *eohw_txq;
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struct cpl_tx_pkt_core *cpl;
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struct fw_eth_tx_eo_wr *wr;
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struct sge_eosw_desc *d;
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struct sk_buff *skb;
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u8 flits, ndesc;
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int left;
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eohw_txq = &adap->sge.eohw_txq[eosw_txq->hwqid];
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spin_lock(&eohw_txq->lock);
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reclaim_completed_tx_imm(&eohw_txq->q);
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d = &eosw_txq->desc[eosw_txq->last_pidx];
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skb = d->skb;
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skb_tx_timestamp(skb);
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wr = (struct fw_eth_tx_eo_wr *)&eohw_txq->q.desc[eohw_txq->q.pidx];
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hdr_len = eth_get_headlen(dev, skb->data, skb_headlen(skb));
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data_len = skb->len - hdr_len;
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flits = ethofld_calc_tx_flits(adap, skb, hdr_len);
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ndesc = flits_to_desc(flits);
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wrlen = flits * 8;
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wrlen16 = DIV_ROUND_UP(wrlen, 16);
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/* If there are no CPL credits, then wait for credits
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* to come back and retry again
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*/
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if (unlikely(wrlen16 > eosw_txq->cred))
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goto out_unlock;
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cpl = write_eo_wr(adap, eosw_txq, skb, wr, hdr_len, wrlen);
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cntrl = hwcsum(adap->params.chip, skb);
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if (skb_vlan_tag_present(skb))
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cntrl |= TXPKT_VLAN_VLD_F | TXPKT_VLAN_V(skb_vlan_tag_get(skb));
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cpl->ctrl0 = cpu_to_be32(TXPKT_OPCODE_V(CPL_TX_PKT_XT) |
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TXPKT_INTF_V(pi->tx_chan) |
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TXPKT_PF_V(adap->pf));
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cpl->pack = 0;
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cpl->len = cpu_to_be16(skb->len);
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cpl->ctrl1 = cpu_to_be64(cntrl);
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start = (u64 *)(cpl + 1);
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sgl = (u64 *)inline_tx_skb_header(skb, &eohw_txq->q, (void *)start,
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hdr_len);
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if (data_len) {
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if (unlikely(cxgb4_map_skb(adap->pdev_dev, skb, d->addr))) {
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memset(d->addr, 0, sizeof(d->addr));
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eohw_txq->mapping_err++;
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goto out_unlock;
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}
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end = (u64 *)wr + flits;
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if (unlikely(start > sgl)) {
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left = (u8 *)end - (u8 *)eohw_txq->q.stat;
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end = (void *)eohw_txq->q.desc + left;
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}
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if (unlikely((u8 *)sgl >= (u8 *)eohw_txq->q.stat)) {
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/* If current position is already at the end of the
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* txq, reset the current to point to start of the queue
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* and update the end ptr as well.
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*/
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left = (u8 *)end - (u8 *)eohw_txq->q.stat;
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end = (void *)eohw_txq->q.desc + left;
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sgl = (void *)eohw_txq->q.desc;
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}
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cxgb4_write_sgl(skb, &eohw_txq->q, (void *)sgl, end, hdr_len,
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d->addr);
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}
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txq_advance(&eohw_txq->q, ndesc);
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cxgb4_ring_tx_db(adap, &eohw_txq->q, ndesc);
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eosw_txq_advance_index(&eosw_txq->last_pidx, 1, eosw_txq->ndesc);
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out_unlock:
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spin_unlock(&eohw_txq->lock);
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}
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static void ethofld_xmit(struct net_device *dev, struct sge_eosw_txq *eosw_txq)
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{
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struct sk_buff *skb;
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int pktcount;
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switch (eosw_txq->state) {
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case CXGB4_EO_STATE_ACTIVE:
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pktcount = eosw_txq->pidx - eosw_txq->last_pidx;
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if (pktcount < 0)
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pktcount += eosw_txq->ndesc;
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break;
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case CXGB4_EO_STATE_CLOSED:
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default:
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return;
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};
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while (pktcount--) {
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skb = eosw_txq_peek(eosw_txq);
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if (!skb) {
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eosw_txq_advance_index(&eosw_txq->last_pidx, 1,
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eosw_txq->ndesc);
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continue;
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}
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ethofld_hard_xmit(dev, eosw_txq);
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}
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}
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static netdev_tx_t cxgb4_ethofld_xmit(struct sk_buff *skb,
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struct net_device *dev)
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{
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struct cxgb4_tc_port_mqprio *tc_port_mqprio;
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struct port_info *pi = netdev2pinfo(dev);
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struct adapter *adap = netdev2adap(dev);
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struct sge_eosw_txq *eosw_txq;
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u32 qid;
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int ret;
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ret = cxgb4_validate_skb(skb, dev, ETH_HLEN);
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if (ret)
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goto out_free;
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|
||||
tc_port_mqprio = &adap->tc_mqprio->port_mqprio[pi->port_id];
|
||||
qid = skb_get_queue_mapping(skb) - pi->nqsets;
|
||||
eosw_txq = &tc_port_mqprio->eosw_txq[qid];
|
||||
spin_lock_bh(&eosw_txq->lock);
|
||||
if (eosw_txq->state != CXGB4_EO_STATE_ACTIVE)
|
||||
goto out_unlock;
|
||||
|
||||
ret = eosw_txq_enqueue(eosw_txq, skb);
|
||||
if (ret)
|
||||
goto out_unlock;
|
||||
|
||||
/* SKB is queued for processing until credits are available.
|
||||
* So, call the destructor now and we'll free the skb later
|
||||
* after it has been successfully transmitted.
|
||||
*/
|
||||
skb_orphan(skb);
|
||||
|
||||
eosw_txq_advance(eosw_txq, 1);
|
||||
ethofld_xmit(dev, eosw_txq);
|
||||
spin_unlock_bh(&eosw_txq->lock);
|
||||
return NETDEV_TX_OK;
|
||||
|
||||
out_unlock:
|
||||
spin_unlock_bh(&eosw_txq->lock);
|
||||
out_free:
|
||||
dev_kfree_skb_any(skb);
|
||||
return NETDEV_TX_OK;
|
||||
@ -2055,26 +2328,6 @@ netdev_tx_t t4_start_xmit(struct sk_buff *skb, struct net_device *dev)
|
||||
return cxgb4_eth_xmit(skb, dev);
|
||||
}
|
||||
|
||||
/**
|
||||
* reclaim_completed_tx_imm - reclaim completed control-queue Tx descs
|
||||
* @q: the SGE control Tx queue
|
||||
*
|
||||
* This is a variant of cxgb4_reclaim_completed_tx() that is used
|
||||
* for Tx queues that send only immediate data (presently just
|
||||
* the control queues) and thus do not have any sk_buffs to release.
|
||||
*/
|
||||
static inline void reclaim_completed_tx_imm(struct sge_txq *q)
|
||||
{
|
||||
int hw_cidx = ntohs(READ_ONCE(q->stat->cidx));
|
||||
int reclaim = hw_cidx - q->cidx;
|
||||
|
||||
if (reclaim < 0)
|
||||
reclaim += q->size;
|
||||
|
||||
q->in_use -= reclaim;
|
||||
q->cidx = hw_cidx;
|
||||
}
|
||||
|
||||
/**
|
||||
* is_imm - check whether a packet can be sent as immediate data
|
||||
* @skb: the packet
|
||||
@ -3375,12 +3628,86 @@ void cxgb4_ethofld_restart(unsigned long data)
|
||||
if (pktcount < 0)
|
||||
pktcount += eosw_txq->ndesc;
|
||||
|
||||
if (pktcount)
|
||||
if (pktcount) {
|
||||
cxgb4_eosw_txq_free_desc(netdev2adap(eosw_txq->netdev),
|
||||
eosw_txq, pktcount);
|
||||
eosw_txq->inuse -= pktcount;
|
||||
}
|
||||
|
||||
/* There may be some packets waiting for completions. So,
|
||||
* attempt to send these packets now.
|
||||
*/
|
||||
ethofld_xmit(eosw_txq->netdev, eosw_txq);
|
||||
spin_unlock(&eosw_txq->lock);
|
||||
}
|
||||
|
||||
/* cxgb4_ethofld_rx_handler - Process ETHOFLD Tx completions
|
||||
* @q: the response queue that received the packet
|
||||
* @rsp: the response queue descriptor holding the CPL message
|
||||
* @si: the gather list of packet fragments
|
||||
*
|
||||
* Process a ETHOFLD Tx completion. Increment the cidx here, but
|
||||
* free up the descriptors in a tasklet later.
|
||||
*/
|
||||
int cxgb4_ethofld_rx_handler(struct sge_rspq *q, const __be64 *rsp,
|
||||
const struct pkt_gl *si)
|
||||
{
|
||||
u8 opcode = ((const struct rss_header *)rsp)->opcode;
|
||||
|
||||
/* skip RSS header */
|
||||
rsp++;
|
||||
|
||||
if (opcode == CPL_FW4_ACK) {
|
||||
const struct cpl_fw4_ack *cpl;
|
||||
struct sge_eosw_txq *eosw_txq;
|
||||
struct eotid_entry *entry;
|
||||
struct sk_buff *skb;
|
||||
u32 hdr_len, eotid;
|
||||
u8 flits, wrlen16;
|
||||
int credits;
|
||||
|
||||
cpl = (const struct cpl_fw4_ack *)rsp;
|
||||
eotid = CPL_FW4_ACK_FLOWID_G(ntohl(OPCODE_TID(cpl))) -
|
||||
q->adap->tids.eotid_base;
|
||||
entry = cxgb4_lookup_eotid(&q->adap->tids, eotid);
|
||||
if (!entry)
|
||||
goto out_done;
|
||||
|
||||
eosw_txq = (struct sge_eosw_txq *)entry->data;
|
||||
if (!eosw_txq)
|
||||
goto out_done;
|
||||
|
||||
spin_lock(&eosw_txq->lock);
|
||||
credits = cpl->credits;
|
||||
while (credits > 0) {
|
||||
skb = eosw_txq->desc[eosw_txq->cidx].skb;
|
||||
if (!skb)
|
||||
break;
|
||||
|
||||
hdr_len = eth_get_headlen(eosw_txq->netdev, skb->data,
|
||||
skb_headlen(skb));
|
||||
flits = ethofld_calc_tx_flits(q->adap, skb, hdr_len);
|
||||
eosw_txq_advance_index(&eosw_txq->cidx, 1,
|
||||
eosw_txq->ndesc);
|
||||
wrlen16 = DIV_ROUND_UP(flits * 8, 16);
|
||||
credits -= wrlen16;
|
||||
}
|
||||
|
||||
eosw_txq->cred += cpl->credits;
|
||||
eosw_txq->ncompl--;
|
||||
|
||||
spin_unlock(&eosw_txq->lock);
|
||||
|
||||
/* Schedule a tasklet to reclaim SKBs and restart ETHOFLD Tx,
|
||||
* if there were packets waiting for completion.
|
||||
*/
|
||||
tasklet_schedule(&eosw_txq->qresume_tsk);
|
||||
}
|
||||
|
||||
out_done:
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* The MSI-X interrupt handler for an SGE response queue.
|
||||
*/
|
||||
|
||||
@ -1421,6 +1421,11 @@ enum {
|
||||
CPL_FW4_ACK_FLAGS_FLOWC = 0x4, /* fw_flowc_wr complete */
|
||||
};
|
||||
|
||||
#define CPL_FW4_ACK_FLOWID_S 0
|
||||
#define CPL_FW4_ACK_FLOWID_M 0xffffff
|
||||
#define CPL_FW4_ACK_FLOWID_G(x) \
|
||||
(((x) >> CPL_FW4_ACK_FLOWID_S) & CPL_FW4_ACK_FLOWID_M)
|
||||
|
||||
struct cpl_fw6_msg {
|
||||
u8 opcode;
|
||||
u8 type;
|
||||
|
||||
@ -87,6 +87,7 @@ enum fw_wr_opcodes {
|
||||
FW_ULPTX_WR = 0x04,
|
||||
FW_TP_WR = 0x05,
|
||||
FW_ETH_TX_PKT_WR = 0x08,
|
||||
FW_ETH_TX_EO_WR = 0x1c,
|
||||
FW_OFLD_CONNECTION_WR = 0x2f,
|
||||
FW_FLOWC_WR = 0x0a,
|
||||
FW_OFLD_TX_DATA_WR = 0x0b,
|
||||
@ -534,6 +535,35 @@ struct fw_eth_tx_pkt_wr {
|
||||
__be64 r3;
|
||||
};
|
||||
|
||||
enum fw_eth_tx_eo_type {
|
||||
FW_ETH_TX_EO_TYPE_TCPSEG = 1,
|
||||
};
|
||||
|
||||
struct fw_eth_tx_eo_wr {
|
||||
__be32 op_immdlen;
|
||||
__be32 equiq_to_len16;
|
||||
__be64 r3;
|
||||
union fw_eth_tx_eo {
|
||||
struct fw_eth_tx_eo_tcpseg {
|
||||
__u8 type;
|
||||
__u8 ethlen;
|
||||
__be16 iplen;
|
||||
__u8 tcplen;
|
||||
__u8 tsclk_tsoff;
|
||||
__be16 r4;
|
||||
__be16 mss;
|
||||
__be16 r5;
|
||||
__be32 plen;
|
||||
} tcpseg;
|
||||
} u;
|
||||
};
|
||||
|
||||
#define FW_ETH_TX_EO_WR_IMMDLEN_S 0
|
||||
#define FW_ETH_TX_EO_WR_IMMDLEN_M 0x1ff
|
||||
#define FW_ETH_TX_EO_WR_IMMDLEN_V(x) ((x) << FW_ETH_TX_EO_WR_IMMDLEN_S)
|
||||
#define FW_ETH_TX_EO_WR_IMMDLEN_G(x) \
|
||||
(((x) >> FW_ETH_TX_EO_WR_IMMDLEN_S) & FW_ETH_TX_EO_WR_IMMDLEN_M)
|
||||
|
||||
struct fw_ofld_connection_wr {
|
||||
__be32 op_compl;
|
||||
__be32 len16_pkd;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user