korg/linux
0
0
Fork 0
mirror of https://mirrors.bfsu.edu.cn/git/linux.git synced 2024-12-22 18:44:44 +08:00
Code Issues Packages Projects Releases Wiki Activity

media: ccs-pll: Differentiate between CSI-2 D-PHY and C-PHY

Browse Source 
Differentiate between CSI-2 D-PHY and C-PHY. This does not yet include
support for C-PHY.

Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
This commit is contained in:
Sakari Ailus 2020-06-22 12:37:45 +02:00 committed by Mauro Carvalho Chehab
parent 6aadbff9d4
commit 47b6eaf36e
3 changed files with 4 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/media/i2c/ccs-pll.c
View File

@ -430,7 +430,7 @@ int ccs_pll_calculate(struct device *dev, const struct ccs_pll_limits *lim,
pll->binning_vertical);
switch (pll->bus_type) {
case CCS_PLL_BUS_TYPE_CSI2:
case CCS_PLL_BUS_TYPE_CSI2_DPHY:
/* CSI transfers 2 bits per clock per lane; thus times 2 */
op_pll_fr->pll_op_clk_freq_hz = pll->link_freq * 2
* (pll->csi2.lanes / lane_op_clock_ratio);

3
drivers/media/i2c/ccs-pll.h
View File

@ -13,7 +13,8 @@
#define CCS_PLL_H
/* CSI-2 or CCP-2 */
#define CCS_PLL_BUS_TYPE_CSI2 0x00
#define CCS_PLL_BUS_TYPE_CSI2_DPHY 0x00
#define CCS_PLL_BUS_TYPE_CSI2_CPHY 0x01
/* op pix clock is for all lanes in total normally */
#define CCS_PLL_FLAG_OP_PIX_CLOCK_PER_LANE (1 << 0)

2
drivers/media/i2c/ccs/ccs-core.c
View File

@ -3200,7 +3200,7 @@ static int ccs_probe(struct i2c_client *client)
sensor->scale_m = CCS_LIM(sensor, SCALER_N_MIN);
/* prepare PLL configuration input values */
sensor->pll.bus_type = CCS_PLL_BUS_TYPE_CSI2;
sensor->pll.bus_type = CCS_PLL_BUS_TYPE_CSI2_DPHY;
sensor->pll.csi2.lanes = sensor->hwcfg.lanes;
sensor->pll.ext_clk_freq_hz = sensor->hwcfg.ext_clk;
sensor->pll.scale_n = CCS_LIM(sensor, SCALER_N_MIN);